2. 2
Functions
Sept 24 2012
• In Verilog, functions differ from tasks in
important ways:
• Function must return a value.
• Function must take zero time.
• Function cannot contain delay (#) or event
controls (@) or wait statement.
• A function can not invoke (call, enable) a
task.
Lecture 13
3. 3
Functions
Sept 24 2012
• A function definition must contain at least
one input argument.
• A function returns a value by assigning a
value back to a pseudo-variable represented by
the function name.
•The definition of a function is the following:
function <range or type> <function name>; // Notice: no
parameter list or ()s
<argument ports>
<declarations>
<statements>
endfunction
Lecture 13
4. 4
Functions
Sept 24 2012
• When you declare a function, you must also
declare the type and size of the return value.
// Example: How can we use Function…
module muxfunc_mod(a, b, c, d, sel, y) ;
input [7:0] a, b, c, d ;
input [1:0] sel ;
output [7:0] y ;
wire [7:0] y ;
assign y = muxfunct(a, b, c, d, sel) ;
Lecture 13
5. 5
Functions
Sept 24 2012
function [7:0] muxfunct;
input [1:0] sel;
input [7:0] a, b, c, d ;
begin
case(sel)
2’b00 : muxfunct = a ;
2’b01 : muxfunct = b ;
2’b10 : muxfunct = c ;
2’b11 : muxfunct = d ;
default : muxfunct = 16’b0 ;
endcase
Lecture 13
