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Reza Sadri, Levyx
Mutema Pittman, Intel
June 2018
Financial Risk Analytics
Acceleration Framework Using
Intel FPGAs, Apache Spark, and
Persistent DataFrames
#HWCSAIS15
The Deluge O Data Is Here And Accelerating
2 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential
Modern Financial Institutions are Cutting-Edge
Technology Companies
Goldman Sachs at AWS Re:Invent Keynote 2017
The Deluge O Data Is Here And Accelerating
3 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential
Risk Management is a Critical Capability
The Deluge O Data Is Here And Accelerating
4 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential
Risk Management is Driving Insatiable Demand
for More Compute
4
The Deluge O Data Is Here And Accelerating
5 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential
Market Need for Improving the Metrics of Financial
Risk Analysis
Time = Money for financial firms
§  Investing in new approaches using
alternative data
§  Budgets shifting from compliance
to competitive advantage models
Shift to public cloud enables Risk
Management for more areas:
•  More data
•  More diverse data
•  More calculations
•  Sharing live data becomes important
Case Study: Financial Risk Analytics
•  Application: Risk analytics acceleration framework (financial backtesting)
•  Current solution: Deploy a cluster of CPUs or GPUs with complex data access
•  Challenge: Compute intensive, time consuming applications --10+ hours for
financial backtesting
•  Solution Value Proposition:
–  > 5x performance improvement using FPGA acceleration and SSD-optimized data
engines
–  Financial Derivatives calculations of risk and pricing simultaneously
–  Integrated solution with Apache Spark, SSD access and FPGA implementation
abstracted away
6
The Deluge O Data Is Here And Accelerating
7 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential
Why Persistent Dataframes are Important
• Reside on Flash, cached in memory à better
use of hardware
• Same exact syntax
• No need to re-compute after the job is done
• Shareable across jobs
The Deluge O Data Is Here And Accelerating
8 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential
Using Levyx Xenon™ with Intel’s Optane™ and
FPGA/Finlib in a Risk Analytics Platform
™
Optane™
Xeon
Cores
Intel
FPGA(s)
NIC/
RDMA
Xenon Spark Connector
Direct Interface To Hardware
Risk Management Spark Applications
(Written in Python, R or Scala)
Finlib User
Defined Functions
- Historical Market Data
- Private Transaction Data
- Alternative Data
Institution’s Data Lake
-  Reference Data
-  Risk and Back
Testing Results
9 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential
4 584,396,032 53,681,757 17,218,533
20 2,968,752,864 54,329,582 18,697,911
80 11,309,534,720 45,834,352 16,867,758
SYMBOLS XENON/FPGA TIME
OPTIONS/SEC
# OF OPTIONS
Levyx Xenon™ Combined With Intel FPGAs &
SSDs is 3X Faster than Conventional Spark
SPARK CALCULATION
OPTIONS/SEC
Symbols: The number of stock symbols used i.e. IBM, APPL, MSFT, etc.
Options: An individual “Black-Scholes Function” call to value a specific Call or Put option with a
specific set of parameters as might be traded on the Chicago Board of Options Exchange
FPGA Acceleration Stack with Libraries
10
BSP (Board Support Package)Driver
Low-Level FPGA Management
OpenCL SDKOpenCL Runtime
OpenCL API Provides Kernel
Abstraction and Accelerator
Management
User DesignUser Application
Library Infrastructure
Library Kernels
Compute
Primitives
Infra.
Primitives
Library Orchestration
Software Frameworks Increase
Abstraction
Increase
User Base
Libraries are callable from high level languages (e.g. C/C++, Python) and software
frameworks (MKL) - making FPGA accelerated computation easy to access
Intel
Programmable
Acceleration Card
11
Completion of all three FinLib phases will provide functionality equivalent to
top commercial financial analytics libraries
FinLib – Functionality Roadmap
The Deluge O Data Is Here And Accelerating
12 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential
Summary
• Using of accelerated standardized risk functions to
compute JIT large-scale data tables using FPGAs
yields breakthrough performance
• No custom coding required
• DRAM consumption “right-sized” using Flash/NVM
• Bypass kernel for I/O

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Risk Management Framework Using Intel FPGA, Apache Spark, and Persistent RDDs with Reza Sadri and Mutema Pittman

  • 1. Reza Sadri, Levyx Mutema Pittman, Intel June 2018 Financial Risk Analytics Acceleration Framework Using Intel FPGAs, Apache Spark, and Persistent DataFrames #HWCSAIS15
  • 2. The Deluge O Data Is Here And Accelerating 2 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential Modern Financial Institutions are Cutting-Edge Technology Companies Goldman Sachs at AWS Re:Invent Keynote 2017
  • 3. The Deluge O Data Is Here And Accelerating 3 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential Risk Management is a Critical Capability
  • 4. The Deluge O Data Is Here And Accelerating 4 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential Risk Management is Driving Insatiable Demand for More Compute 4
  • 5. The Deluge O Data Is Here And Accelerating 5 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential Market Need for Improving the Metrics of Financial Risk Analysis Time = Money for financial firms §  Investing in new approaches using alternative data §  Budgets shifting from compliance to competitive advantage models Shift to public cloud enables Risk Management for more areas: •  More data •  More diverse data •  More calculations •  Sharing live data becomes important
  • 6. Case Study: Financial Risk Analytics •  Application: Risk analytics acceleration framework (financial backtesting) •  Current solution: Deploy a cluster of CPUs or GPUs with complex data access •  Challenge: Compute intensive, time consuming applications --10+ hours for financial backtesting •  Solution Value Proposition: –  > 5x performance improvement using FPGA acceleration and SSD-optimized data engines –  Financial Derivatives calculations of risk and pricing simultaneously –  Integrated solution with Apache Spark, SSD access and FPGA implementation abstracted away 6
  • 7. The Deluge O Data Is Here And Accelerating 7 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential Why Persistent Dataframes are Important • Reside on Flash, cached in memory à better use of hardware • Same exact syntax • No need to re-compute after the job is done • Shareable across jobs
  • 8. The Deluge O Data Is Here And Accelerating 8 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential Using Levyx Xenon™ with Intel’s Optane™ and FPGA/Finlib in a Risk Analytics Platform ™ Optane™ Xeon Cores Intel FPGA(s) NIC/ RDMA Xenon Spark Connector Direct Interface To Hardware Risk Management Spark Applications (Written in Python, R or Scala) Finlib User Defined Functions - Historical Market Data - Private Transaction Data - Alternative Data Institution’s Data Lake -  Reference Data -  Risk and Back Testing Results
  • 9. 9 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential 4 584,396,032 53,681,757 17,218,533 20 2,968,752,864 54,329,582 18,697,911 80 11,309,534,720 45,834,352 16,867,758 SYMBOLS XENON/FPGA TIME OPTIONS/SEC # OF OPTIONS Levyx Xenon™ Combined With Intel FPGAs & SSDs is 3X Faster than Conventional Spark SPARK CALCULATION OPTIONS/SEC Symbols: The number of stock symbols used i.e. IBM, APPL, MSFT, etc. Options: An individual “Black-Scholes Function” call to value a specific Call or Put option with a specific set of parameters as might be traded on the Chicago Board of Options Exchange
  • 10. FPGA Acceleration Stack with Libraries 10 BSP (Board Support Package)Driver Low-Level FPGA Management OpenCL SDKOpenCL Runtime OpenCL API Provides Kernel Abstraction and Accelerator Management User DesignUser Application Library Infrastructure Library Kernels Compute Primitives Infra. Primitives Library Orchestration Software Frameworks Increase Abstraction Increase User Base Libraries are callable from high level languages (e.g. C/C++, Python) and software frameworks (MKL) - making FPGA accelerated computation easy to access Intel Programmable Acceleration Card
  • 11. 11 Completion of all three FinLib phases will provide functionality equivalent to top commercial financial analytics libraries FinLib – Functionality Roadmap
  • 12. The Deluge O Data Is Here And Accelerating 12 © Copyright 2013-2018 Levyx Inc. Proprietary and Confidential Summary • Using of accelerated standardized risk functions to compute JIT large-scale data tables using FPGAs yields breakthrough performance • No custom coding required • DRAM consumption “right-sized” using Flash/NVM • Bypass kernel for I/O