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1. Security Level:
Parallel Connection of SiC MOS and IGBT
in a T-type Three-level PV Inverter
Yunlei Jiang, Yanfeng Shen
Applied Power Electronics Lab.
Supervisor: Dr. Teng Long
University of Cambridge

2. HUAWEI TECHNOLOGIES CO., LTD. Huawei Confidential 2
Technical Requirement
 1. The 1200 V SiC MOS and 1200 V IGBT are connected in parallel.
 2. The first quadrant uses SiC MOS first on and last off. SiC MOS synchronous rectification in the
fourth quadrant or freewheeling by using the parasitic diode in SiC MOS;
 3. Inverter prototype design: Based on the three-phase three-wire output and T-type three-level
topology, the vertical bridge uses 1200 V-IGBT and SiC MOS in parallel, the horizontal bridge
uses 650 V IGBT, the switching frequency is greater than or equal to 40 kHz, and the bus voltage is
620 V, the output voltage is 400 V AC, the total output power is 3 kW, and the maximum efficiency
is greater than or equal to 99%

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T-type Inverter Motivation:
1. Low switching loss from SiC MOSFET switching and low
conduction loss from IGBT conduction;
2. Low output THD and switching loss enabled by the T-type
topology;
Challenge:
1. Ensure safe operation area (SOA) of the SiC MOSFET;
2. Proper turn ON/OFF delay time between IGBT & SiC
MOSFET;
3. Large switching loss of the clamping leg when power
factor ≠ 1;
Q1 M1
Q4 M4
P
N
O
Q2
Q3
IGBT
SiC-MOS

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Switching Loss Analysis
Observations:
when PF ≈ 1(voltage and current are in phase),
1. S2,3 are operated with ZVS ON/OFF;
2. Reverse recovery loss of S2,3 still exist even ZVS is achieved;
3. S1 and S4 are hard turned ON/OFF;
when PF ≠ 1 (reactive power injection)
1. S2,3 are hard switching turned ON when current and voltage are outphase;
2. Switching loss will increase;
switching
action
switching state
P -> O
switching state
O -> P
switching state
N->O
switching state
O -> N
switching
loss
(iL > 0)
S1: hard switching
turn OFF
S3: ZVS turn ON
S1: hard switching
turn ON
S3: ZVS turn OFF
S4: ZVS turn OFF
S2: hard-switching
turn ON
S4: ZVS turn ON
S2: hard-switching
turn OFF
switching
loss
(iL < 0)
S1: ZVS turn OFF
S3: hard switching
turn ON
S1: ZVS turn ON
S3: hard-switching turn
OFF
S4: hard switching
turn OFF
S2: ZVS turn ON
S4: hard switching
turn ON
S2: ZVS turn OFF
Quadrant 1
Quadrant 3

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Proposed Solution:
Resonant Commutation Pole + Multi-freedom Gate Driver
1. Resonant Commutation Pole(RCP) enables the soft-
switching turn-on of midpoint/clamp bridge – ALL the
IGBTs are able to work under ZVS and the switching
loss is further reduced;
2. Multi-freedom gate driver enables the adjustment of turn-
ON voltage, which is able to change the on-state
resistance of SiC MOSFET within a small range;
Q1 M1
Q4 M4
P
N
O
Q2
Q3
IGBT
SiC-MOS
auxiliary
MOSFET
Sa1
Sa2
Lr

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Selection of Devices
1. Horizontal IGBT: IKW30N65EL5 – Infineon L5 series IGBTs
for minimized conduction loss;
2. Vertical IGBT: IKW40N120T2 from Infineon for minimized
conduction loss;
3. Vertical SiC MOSFET: C2M0160120D from Cree
, which yields current sharing ratio = 2.5:1 @iload = 15A
Curve of conduction-switching characteristics
*switching loss optimized IGBTs have to tendency to
have high switching loss
C2M0160120D IKW40N120T2 IKW30N65EL5
Function Vertical SiC MOSFET Vertical IGBT Horizontal IGBT
Package TO247-3 TO247-3 TO247-3
On-state
resistance
160mΩ N/A N/A
Vce @ 15A N/A 1.2V 0.85V
vce @ 20A
0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5
0.5
1
1.5
2
2.5
3
3.5
EON+EOFF@20A
L5 series optimized. for
conduction loss
F5 series for
mini. switching
loss
H5 series
S5 series
WR5 series

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Methodology
Device Level Simulation: LTSPICE
Converter Level Simulation: PLECS
1. Switching Loss Model of Various Switching Pairs is estimated by LTSPICE;
2. Control algorithm and converter-level Loss is evaluated by PLECS.
LTSpice Model
Parasitic
inductance

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Conduction Loss Model of the Hybrid Switch
V-I characteristics of IGBT, SiC MOSFET and
the paralleled switch
ids ice
iload
rce
Vth
vce/vds
Rds_ON
ids id
iload
Rd
VF
vce/vds
Rds_ON
quadrant 1 quadrant 3
Current
distribution:
(1.05V, 7A)
*derivation of the conduction loss is detailed in the technical teport

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Switching Loss Model of the Hybrid Switch
vgM
vgI
iL
idsice
t0 t1 t2 t3 t4 t5
Typical switching pattern: SiC is first turned ON and late off
LTSpice Model
Parasitic
inductance
ids ice
vds vce
vds ids
vce ice

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Switching Loss Model of the Hybrid Switch
switching loss v.s. turn-on delay: t12
1. Total turn ON switching loss is the sum of two devices’ turn-ON loss;
2. Local minimum total turn ON loss is obtained when the IGBT is
slightly turned ON earlier (~-5ns) than the MOSFET;
3. The current rise (di/dt) of the IGBT and SiC MOSFET has overlap
when IGBT is turned ON slightly early, yielding a higher di/dt than
other conditions;
-100 -80 -60 -40 -20 0 20 40 60
0
0.5
1.0
1.5
Turn-onLoss(mJ)
Turn-on Delay (ns)
Eon_MOSFET
Eon_MOSFET
Eon_Total

11. HUAWEI TECHNOLOGIES CO., LTD. Huawei Confidential 11
Switching Loss Model of the Hybrid Switch
1. IGBT’s turn-OFF tail current can cause a large loss;
2. Turn-OFF delay time is much larger than the turn-ON delay
can the additional conduction loss ∆Ec of the SiC MOSFET
should be considered;
switching loss v.s. turn-off delay: t45
0 200 400 600 800 1000 1200
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
Eoff_MOSFET+ Ec
Eoff_IGBT
Eoff_Total
Turn-offLoss(mJ)
Turn-off Delay (ns)

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1. Multi-freedom gate driver provides at least 4 control
freedoms: turn-ON delay, turn-OFF delay, turn-ON
voltage #1, turn-ON voltage #2;
2. The control object is to ensure the IGBT and SiC have the
same junction temperature;
3. Output characteristics of the hybrid switch is adjusted
according to load current;
4. Solve thermal imbalance challenge: eliminate the risk of
overheating and reliability degradation;
FPGA
#1 Variable
Voltage
control
#2 Variable
Voltage
control
#1 Gate
driver
#2 Gate
driver
IOsIOs
SiC
MOSFETIGBT
Design of the Multi-freedom Gate Driver

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Design of the Multi-freedom Gate Driver
GateDriver
PWM
VH
VL
Gate
DigitalIsolator
Op1
Op2
Vctr
Rx
Rb
Ra
Ro
R1
R2
R3
R4
V1
VH
4-digitcontrolsignals
1. Turn-ON voltage is adjusted by 4 digit control signals (from
FPGA);
2.
3. VH is the turn ON voltage and the resistance values are
designed to be:
4. The turn-ON voltage can be adjusted in the range of
[7.5V,21.5V], and the adjustment step is 1.25V;
5. High-output drive Op-amp is selected;

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Operation of the Multi-freedom Gate Driver
Current distribution ratio = 14.29A:5.81A
Current distribution ratio = 13.5A:7A
SiC MOSFET static current =
7A, VgsH = 20V;
SiC MOSFET static current =
5.8A, VgsH = 15V;
0 0.5 1 1.5 2 2.5 3
0
5
10
15
20
25
30
35
40
45
50
IGBT
SiC MOSFET
Hybrid Switch
Currentids+ice,ice,ids(A)
Voltage vce, vds (V)
Rds,ON is adjusted by turn-ON voltage and V-I
characteristics is changed accordingly

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Loss Breakdown under Unity Power Factor
Po = 3000 W
0
5
10
15
20
25
Pcon_vert.
Pcon_hori.
PrecD.
PEon.
PEoff.
Po = 2000 WPo = 1000 W
PowerLoss(W)
η=99.03%
η=99.12%
η=99.22%
* Capacitor loss and other stray loss is not included

16. HUAWEI TECHNOLOGIES CO., LTD. Huawei Confidential 16
Loss Breakdown under Nonunit Power Factor (PF =
0.8)
* Capacitor loss and other stray loss is not included
Po = 3000 W
0
5
10
15
20
25
Po = 2000 WPo = 1000 W
PowerLoss(W) η=98.6%
η=98.87%
η=98.9%
Pcon_vert.
Pcon_hori.
PrecD.
PEon_vert.
PEoff._vert.
PEon._hori.
PEoff._hori.
PrecD._vert.

17. HUAWEI TECHNOLOGIES CO., LTD. Huawei Confidential 17
Soft switching turn-on of Clamping Leg
Q4 M4
N
O
Sa2
Lr
Q2 OFF
Q3 ON
OFF
Q4 M4
N
O
Sa2
Lr
Q2 OFF
Q3 ON
ON
Q4 M4
N
O
Sa2
Lr
Q2 OFF
Q3 ON
ON
Q4 M4
Sa2
Lr
Q2 ON
Q3 ON
ON
I II
IV
V
Cr4
Cr23
Q4 M4
N
O
Sa2
Lr
Q2 OFF
Q3 ON
ON
III
io io
io
Q4 M4
Sa2
Lr
Q2 ON
Q3 ON
OFF
VI
Main
switches
I
vCr4
vCr23
iQ4+M4
io
io
iQ2
M1, Q1 Q2
Aux.
switch Sa2
Aux. inductor
current iLr
Voltage across
devices
II III IV V
t
t
t
t
t
Main switch
current
VI

18. HUAWEI TECHNOLOGIES CO., LTD. Huawei Confidential 18
Thank you for your
attention!
Applied Power Electronics Lab (APEL), the Long Group
University of Cambridge
Dec 2020