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          E     E         E



SPARC

Александр Трубин
Sun Campus Ambassador, УрГУ
SPARC
    SPARC – Scalable Processor ARChitecture



    Открытая архитектура



        система команд – стандарт IEEE 1754-1994
    


        доступна для лицензирования
    


        некоммерческая организация SPARC
    

        International, Inc. (1989)
    лицензия - 99$



    SPARC V8 – 32bit



    SPARC V9 – 64bit

SPARC: Возможности

    RISC архитектура



    128 регистров общего назначения



    FPU



            32 single-precision (32-bit) f[0], f[1], ... , f[31]
        


            32 double-precision (64-bit) f[0], f[2], ... , f[62]
        


            16 quad-precision (128-bit) f[0], f[4], ... , f[60]
        



    масштабируемость



            core instruction set
        


            количество реализованых register windows
        



    big-endian (SPARC V9 – both)

SPARC: register window

    8 глобальных: %g0 – %g7



    register window – 24 регистра



              %o0 - %o5 – arguments out
          


              %sp, %o7 – stack pointer, sub return addr
          


              %l1 - %l7 – internal
          


              $i0 - %i5 – arguments in
          


              %fp, %i7 – frame pointer, func return address
          



        cwp
    


        ...
    
SPARC: register window
Hello, world !
.text

.align 4

.global start

start:

mov 0,%o0        ! stdout

set string,%o1 ! address of string

mov 14,%o2       ! number of bytes in string

mov 4,%g1        ! write(2) system call - write(0, string, 14);

ta 0             ! get the kernel to do syscall #4
                                                                  Register layout for a NetBSD/SunOS system call:
mov 0,%o0        ! exit code 0
                                                                  %g1 - syscall number
                                                                  (See /usr/include/sys/syscall.h)
mov 1,%g1        ! _exit(2) system call - exit(0);
                                                                  %o0 - 1st argument
ta 0             ! get the kernel to do syscall #1
                                                                  %o1 - 2nd argument (if there that syscall takes a
.align 4                                                          2nd arg)
                                                                  %o2 - 3rd argument (if there that syscall takes a
string:
                                                                  3rd arg)
.ascii quot;Hello, World!nquot;
OpenSPARC: История

    MAJC (Microprocessor Architecture for Java


    Computing)
    Stanford Hydra Single-Chip Multiprocessor



        Kunle Olukotun
    


             Afara Websystems
         


             4xMIPS 10000
         



    UltraSPARC T1



    OpenSPARC ( декбарь 2005 )

VHDL & Verilog

VHDL (Very high speed integrated circuits
 Hardware Description Language) — язык
 описания аппаратуры высокоскоростных
 интегральных схем. (является базовым
 языком при разработке аппаратуры
 современных вычислительных систем)
Verilog - это язык            Verilog: Hello World
описания аппаратуры,          module main;
используемый для               initial
                                 begin
описания и                        $display(quot;Hello world!quot;);
                                  $finish;
моделирования                    end
электронных систем.           endmodule
Design flow using Verilog
OpenSPARC
             Что можно делать?

             использовать as-is
             добавлять/убирать ядра
             расширять набор
            инструкций
             изменять FPU
             добавлять сетевые
            интерфейсы
             редактировать интерфейс
            ввода/вывода
             ...
             Что делают?
             Simply RISC — одноядерный
            процессор
             Портирование Linux (6 недель)
             RAMP project
                 http://ramp.eecs.berkeley.edu
             ...
OpenSPARC pipeline




    ALU + shift,multiply,divide, thread-select stage, cryptogtaphic co-processor

SPARC v9 соответствие
    Уровень 1 (*)



           Реализация корректно интерпретирует все
       

           непривилегированные инструкции (включая прямое
           исполнение, имитацию или эмуляцию). Этот уровень
           корректно работает с приложениями пользователя и
           входит в архитектуру SPARC-V9 ABI
    Уровень 2



           Реализация корректно интерпретирует все
       

           привилегированные и непривилегированные
           инструкции, а так же включает в себя всё
           необходимое аппаратное, програмное обеспечение и
           програмно-аппаратные средства(firmware) для полной
           и корректной реализации.
OpenSPARC: FPGA
OpenSPARC сообщества
Links


    http://www.opensparc.net



    http://www.opensparc.net/projects/ - проекты



    http://www.sun.com/processors/opensparc/



    остальное: http://blogs.sun.com/atr

US     IMPROV          EVANGELIZ
                E      E               E




Спасибо!
             Александр Трубин
       Sun Campus Ambassador, УрГУ
         Alexander.Trubin@sun.com
           http://blogs.sun.com/atr


                          “open” artwork and icons by chandan:
                              http://blogs.sun.com/chandan

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OpenSPARC

  • 1. US IMPROV EVANGELIZ E E E SPARC Александр Трубин Sun Campus Ambassador, УрГУ
  • 2. SPARC SPARC – Scalable Processor ARChitecture  Открытая архитектура  система команд – стандарт IEEE 1754-1994  доступна для лицензирования  некоммерческая организация SPARC  International, Inc. (1989) лицензия - 99$  SPARC V8 – 32bit  SPARC V9 – 64bit 
  • 3. SPARC: Возможности RISC архитектура  128 регистров общего назначения  FPU  32 single-precision (32-bit) f[0], f[1], ... , f[31]  32 double-precision (64-bit) f[0], f[2], ... , f[62]  16 quad-precision (128-bit) f[0], f[4], ... , f[60]  масштабируемость  core instruction set  количество реализованых register windows  big-endian (SPARC V9 – both) 
  • 4. SPARC: register window 8 глобальных: %g0 – %g7  register window – 24 регистра  %o0 - %o5 – arguments out  %sp, %o7 – stack pointer, sub return addr  %l1 - %l7 – internal  $i0 - %i5 – arguments in  %fp, %i7 – frame pointer, func return address  cwp  ... 
  • 6. Hello, world ! .text .align 4 .global start start: mov 0,%o0 ! stdout set string,%o1 ! address of string mov 14,%o2 ! number of bytes in string mov 4,%g1 ! write(2) system call - write(0, string, 14); ta 0 ! get the kernel to do syscall #4 Register layout for a NetBSD/SunOS system call: mov 0,%o0 ! exit code 0 %g1 - syscall number (See /usr/include/sys/syscall.h) mov 1,%g1 ! _exit(2) system call - exit(0); %o0 - 1st argument ta 0 ! get the kernel to do syscall #1 %o1 - 2nd argument (if there that syscall takes a .align 4 2nd arg) %o2 - 3rd argument (if there that syscall takes a string: 3rd arg) .ascii quot;Hello, World!nquot;
  • 7. OpenSPARC: История MAJC (Microprocessor Architecture for Java  Computing) Stanford Hydra Single-Chip Multiprocessor  Kunle Olukotun  Afara Websystems  4xMIPS 10000  UltraSPARC T1  OpenSPARC ( декбарь 2005 ) 
  • 8. VHDL & Verilog VHDL (Very high speed integrated circuits Hardware Description Language) — язык описания аппаратуры высокоскоростных интегральных схем. (является базовым языком при разработке аппаратуры современных вычислительных систем) Verilog - это язык Verilog: Hello World описания аппаратуры, module main; используемый для initial begin описания и $display(quot;Hello world!quot;); $finish; моделирования end электронных систем. endmodule
  • 10. OpenSPARC Что можно делать? использовать as-is добавлять/убирать ядра расширять набор инструкций изменять FPU добавлять сетевые интерфейсы редактировать интерфейс ввода/вывода ... Что делают? Simply RISC — одноядерный процессор Портирование Linux (6 недель) RAMP project http://ramp.eecs.berkeley.edu ...
  • 11. OpenSPARC pipeline ALU + shift,multiply,divide, thread-select stage, cryptogtaphic co-processor 
  • 12. SPARC v9 соответствие Уровень 1 (*)  Реализация корректно интерпретирует все  непривилегированные инструкции (включая прямое исполнение, имитацию или эмуляцию). Этот уровень корректно работает с приложениями пользователя и входит в архитектуру SPARC-V9 ABI Уровень 2  Реализация корректно интерпретирует все  привилегированные и непривилегированные инструкции, а так же включает в себя всё необходимое аппаратное, програмное обеспечение и програмно-аппаратные средства(firmware) для полной и корректной реализации.
  • 15. Links http://www.opensparc.net  http://www.opensparc.net/projects/ - проекты  http://www.sun.com/processors/opensparc/  остальное: http://blogs.sun.com/atr 
  • 16. US IMPROV EVANGELIZ E E E Спасибо! Александр Трубин Sun Campus Ambassador, УрГУ Alexander.Trubin@sun.com http://blogs.sun.com/atr “open” artwork and icons by chandan: http://blogs.sun.com/chandan