This resume is for M.MADHU SUDHAN. He has a B.Tech in ECE from TRR College of Engineering and his educational qualifications also include an intermediate in MPC and SSC. His technical skills include knowledge of Windows operating systems, SAP BW/BI, MS Office, and basic hardware and internet skills. He has completed mini projects on designing a serializer and deserializer using Verilog and main projects on designing low-power CMOS full adders for energy efficient arithmetic applications. His personal details include his name, date of birth, languages known, addresses and contact details.
Economic reports and outlooks - Québec City CMA, 2014-2015Université Laval
This study, entitled Economic Report and Outlooks for the Québec City Census Metropolitan Area - 2014-2015, was conducted by Québec International. In addition to addressing key economic indicators for assessing regional performance, it takes an objective look at the results achieved in 2014 and those expected in 2015. Changes in a number of regional economic variables are also compared with those of seven other metropolitan areas in Canada: Montréal, Toronto, Ottawa, Winnipeg, Calgary, Edmonton and Vancouver.
Economic reports and outlooks - Québec City CMA, 2014-2015Université Laval
This study, entitled Economic Report and Outlooks for the Québec City Census Metropolitan Area - 2014-2015, was conducted by Québec International. In addition to addressing key economic indicators for assessing regional performance, it takes an objective look at the results achieved in 2014 and those expected in 2015. Changes in a number of regional economic variables are also compared with those of seven other metropolitan areas in Canada: Montréal, Toronto, Ottawa, Winnipeg, Calgary, Edmonton and Vancouver.
Analysis of the vertical roller mill equipmentlinxiaomo
The vertical roller mill is an important equipment for grinding, it is used for all kinds of ores, slag, coal, lime and other materials grinding. How to improve the vertical roller mill grinding fineness of the user has been a topic of concern, but also manufacturers concerned about the topic, to solve the problem we must first fineness, fully understand the influencing factors of grinding fineness. Generally, the influence of many factors.
WWE Legend "Rowdy" Roddy Piper Teams Up with Stand for the Silent for Timely...Paige Guyan
PR consulting sample for the Agencies Advertising Group, Stand for the Silent, and Roddy Piper.
WWE Legend "Rowdy" Roddy Piper Teams Up with
Stand for the Silent for Timely Anti-Bullying Campaign
New PSAs highlight teen suicide epidemic and the tragedy that caught the attention of the White House.
Los Angeles, April 21, 2015 - In May of 2010, after two years of constant bullying, eleven-year-old Ty Smalley took his own life. In the wake of this tragedy, Ty’s parents Kirk and Laura Smalley founded Stand for the Silent, an organization that exposes the grim reality of bullying and its devastating consequences. Stand for the Silent is also a platform for Kirk and Laura to share their story and offer education and tools that will hopefully prevent their tragedy from happening to another family — a mission that took the Smalley family all the way to Washington, DC for a private meeting with President Obama regarding the first-ever conference on bullying.
Cetelem Observatorio Consumo Europa 2015. Datos MacroeconómicosCetelem
El Observatorio Cetelem Consumo Europa 2015 tiene dos objetivos principales: A corto plazo trata de observar y analizar la situación económica y social en el entorno europeo. Además, a medio/largo trata de comprender y analizar los cambios en los comportamientos de consumo de los europeos. En este sentido, se presentan datos macro económicos al respecto
OFDM synchronization system using wavelet transform for symbol rate detectionTELKOMNIKA JOURNAL
In radio communications, using wavelet signal analysis to recover the symbol rate timing clock of orthogonal frequency-division multiplexing (OFDM) is a new approach that can tolerate signal distortion from intersymbol interference (ISI) and intercarrier interference of encoding digital data on multiple carrier frequencies. Typically, the reception synchronization with wavelet signal analysis in OFDM can improve the performance over the fourier transform-based OFDM. However, a synchronization procedure that is stable against distortion and noise is essential to diminish the symbol synchronization establishment and operation sampling period. In this paper, we propose an OFDM synchronization system and analyze the impact of the wavelet denoise procedure on the OFDM system, which extracts the symbol rate of the OFDM frame. The evaluation results show that the proposed system can optimize the frequency window size to enable an efficient timing and frequency offset estimation with high and stable performance in terms of bit error rate (BER) and Frame Error Rate (FER) especially when the value of EbN0 (a normalized signal-to-noise ratio SNR measure) is greater than 8 dB, thanks to the wavelet transform.
SE PAI Unit 5_Serial Port Programming in 8051 microcontroller_Part 1KanchanPatil34
2015 course SPPU SEIT syllabus of subject Processor Architecture and Interfacing (PAI) This covers the basics of serial communication, Data framing and Baud Rate in 8051 microcontroller.
Performance analysis of al fec raptor code over 3 gpp embms networkeSAT Journals
Abstract Long Term Evolution (LTE) is the current standard for mobile networks based on Third Generation Partnership Project. LTE includes enhanced multimedia broadcast and multicast services (MBMS), also called as Evolved multimedia broadcast and multicast services (eMBMS) where the same content is transmitted to multiple users in one specific area. eMBMS is a new function defined in 3GPP Release 8 specification that supports the delivery of content and streaming to group users into LTE mobile networks. In LTE an important point of demanding multimedia services is to improve the robustness against packet losses. In this direction, in order to support effective point-to-multipoint download and streaming delivery, 3GPP has included an Application Layer Forward Error Correction (AL-FEC) scheme in the standard eMBMS. The standard AL-FEC system is based on systematic, fountain Raptor codes. Raptor coding is very useful in case of packet loss during transmission as it recover all data back from insufficient data at receiver terminal .In our work, in response to the emergence of an enhanced AL-FEC scheme, a raptor code has been implemented and performance is evaluated and the simulation results are obtained. Index Terms: long term evolution; multimedia broadcast multicast services; forward error correction; raptor codes
Performance analysis of al fec raptor code over 3 gpp embms networkeSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
Analysis of the vertical roller mill equipmentlinxiaomo
The vertical roller mill is an important equipment for grinding, it is used for all kinds of ores, slag, coal, lime and other materials grinding. How to improve the vertical roller mill grinding fineness of the user has been a topic of concern, but also manufacturers concerned about the topic, to solve the problem we must first fineness, fully understand the influencing factors of grinding fineness. Generally, the influence of many factors.
WWE Legend "Rowdy" Roddy Piper Teams Up with Stand for the Silent for Timely...Paige Guyan
PR consulting sample for the Agencies Advertising Group, Stand for the Silent, and Roddy Piper.
WWE Legend "Rowdy" Roddy Piper Teams Up with
Stand for the Silent for Timely Anti-Bullying Campaign
New PSAs highlight teen suicide epidemic and the tragedy that caught the attention of the White House.
Los Angeles, April 21, 2015 - In May of 2010, after two years of constant bullying, eleven-year-old Ty Smalley took his own life. In the wake of this tragedy, Ty’s parents Kirk and Laura Smalley founded Stand for the Silent, an organization that exposes the grim reality of bullying and its devastating consequences. Stand for the Silent is also a platform for Kirk and Laura to share their story and offer education and tools that will hopefully prevent their tragedy from happening to another family — a mission that took the Smalley family all the way to Washington, DC for a private meeting with President Obama regarding the first-ever conference on bullying.
Cetelem Observatorio Consumo Europa 2015. Datos MacroeconómicosCetelem
El Observatorio Cetelem Consumo Europa 2015 tiene dos objetivos principales: A corto plazo trata de observar y analizar la situación económica y social en el entorno europeo. Además, a medio/largo trata de comprender y analizar los cambios en los comportamientos de consumo de los europeos. En este sentido, se presentan datos macro económicos al respecto
OFDM synchronization system using wavelet transform for symbol rate detectionTELKOMNIKA JOURNAL
In radio communications, using wavelet signal analysis to recover the symbol rate timing clock of orthogonal frequency-division multiplexing (OFDM) is a new approach that can tolerate signal distortion from intersymbol interference (ISI) and intercarrier interference of encoding digital data on multiple carrier frequencies. Typically, the reception synchronization with wavelet signal analysis in OFDM can improve the performance over the fourier transform-based OFDM. However, a synchronization procedure that is stable against distortion and noise is essential to diminish the symbol synchronization establishment and operation sampling period. In this paper, we propose an OFDM synchronization system and analyze the impact of the wavelet denoise procedure on the OFDM system, which extracts the symbol rate of the OFDM frame. The evaluation results show that the proposed system can optimize the frequency window size to enable an efficient timing and frequency offset estimation with high and stable performance in terms of bit error rate (BER) and Frame Error Rate (FER) especially when the value of EbN0 (a normalized signal-to-noise ratio SNR measure) is greater than 8 dB, thanks to the wavelet transform.
SE PAI Unit 5_Serial Port Programming in 8051 microcontroller_Part 1KanchanPatil34
2015 course SPPU SEIT syllabus of subject Processor Architecture and Interfacing (PAI) This covers the basics of serial communication, Data framing and Baud Rate in 8051 microcontroller.
Performance analysis of al fec raptor code over 3 gpp embms networkeSAT Journals
Abstract Long Term Evolution (LTE) is the current standard for mobile networks based on Third Generation Partnership Project. LTE includes enhanced multimedia broadcast and multicast services (MBMS), also called as Evolved multimedia broadcast and multicast services (eMBMS) where the same content is transmitted to multiple users in one specific area. eMBMS is a new function defined in 3GPP Release 8 specification that supports the delivery of content and streaming to group users into LTE mobile networks. In LTE an important point of demanding multimedia services is to improve the robustness against packet losses. In this direction, in order to support effective point-to-multipoint download and streaming delivery, 3GPP has included an Application Layer Forward Error Correction (AL-FEC) scheme in the standard eMBMS. The standard AL-FEC system is based on systematic, fountain Raptor codes. Raptor coding is very useful in case of packet loss during transmission as it recover all data back from insufficient data at receiver terminal .In our work, in response to the emergence of an enhanced AL-FEC scheme, a raptor code has been implemented and performance is evaluated and the simulation results are obtained. Index Terms: long term evolution; multimedia broadcast multicast services; forward error correction; raptor codes
Performance analysis of al fec raptor code over 3 gpp embms networkeSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
An ECG-on-Chip with 535-nW/Channel Integrated Lossless Data Compressor for Wi...ecgpapers
Abstract—This paper presents a low-power ECG recording
system-on-chip (SoC) with on-chip low-complexity lossless ECG
compression for data reduction in wireless/ambulatory ECG
sensor devices. The chip uses a linear slope predictor for data
compression, and incorporates a novel low-complexity dynamic
coding-packaging scheme to frame the prediction error into
fixed-length 16 bit format. The proposed technique achieves an
average compression ratio of 2.25× on MIT/BIH ECG database.
Implemented in a standard 0.35 μm process, the compressor uses
0.565 K gates/channel occupying 0.4 mm for four channels, and
consumes 535 nW/channel at 2.4 V for ECG sampled at 512 Hz.
Small size and ultra-low-power consumption makes the proposed
technique suitable for wearable ECG sensor applications.
Distributed differential beamforming and power allocation for cooperative com...IJECEIAES
Many coherent cooperative diversity techniques for wireless relay networks have recently been suggested to improve the overall system performance in terms of the achievable data rate or bit error rate (BER) with low decoding complexity and delay. However, these techniques require channel state information (CSI) at the transmitter side, at the receiver side, or at both sides. Therefore, due to the overhead associated with estimating CSI, distributed differential space-time coding techniques have been suggested to overcome this overhead by detecting the information symbols without requiring any (CSI) at any transmitting or receiving antenna. However, the latter techniques suffer from low performance in terms of BER as well as high latency and decoding complexity. In this paper, a distributed differential beamforming technique with power allocation is proposed to overcome all drawbacks associated with the later techniques without needing CSI at any antenna and to be used for cooperative communication networks. We prove through our simulation results which is based on error probability that the proposed technique outperforms the conventional technique with comparably low decoding complexity and latency.
The numerically controlled oscillator (NCO) is one of the digital oscillator
signal generators. It can generate the clocked, synchronous, discrete
waveform, and generally sinusoidal. Often NCOs care utilized in the
combinations of digital to analog converter (DAC) at the outputs for creating
direct digital synthesizer (DDS). The network on chips (NOCs) are utilized
in various communication systems that are fully digital or mixed signals
such as synthesis of arbitrary wave, precise control for sonar systems or
phased array radar, digital down/up converters, all the digital phase locked
loops (PLLs) for cellular and personal communication system (PCS) base
stations and drivers for acoustic or optical transmissions and multilevel
phase shift keying/frequency shift keying (PSK/FSK) modulators or
demodulators (modem). The basic architecture of NCO will be enhanced
and improved with less hardware for facilitating complete system level
support to various sorts of modulation with minimum FPGA resources. In
this paper design and memory optimization of hybrid gate diffusion input
(GDI) numerically controlled oscillator based on field programmable gate
array (FPGA) is implemented. compared with NCO based 8-bit microchip,
memory optimization of hybrid GDI numerically controlled oscillator based
on FPGA gives effective outcome in terms of delay, metal-oxidesemiconductor field-effect transistors (MOSFET’s) and nodes.
These slides cover a topic on Terminal handling & polling in Data Communication. All the slides are explained in a very simple manner. It is useful for engineering students & also for the candidates who want to master data communication & computer networking.
1. RESUME
M.MADH SUDHAN
E-Mail : madhumachireddypally@gmail.com
Phone : 9000089545
Career Objective:
Seeking a challenging position, where I can utilize my technical and personal skills for personal
as well as organization’s growth. Work in an competitive and healthy environment where all my
skill’s and talent can be used for the growth of organization.
Self-motivated and hardworking fresher seeking for an opportunity to work in a challenging
environment to prove my skills and utilize my knowledge & intelligence in the growth of
organization.
Educational Qualification:
Course Discipline
College /
School
University/
Board
Year of
Passing
U.G B.TECH
(ECE)
TRR COLLEGE
OF
ENGINEERING
JNTUH
University
2014
Intermediate MPC
SHAANKARY
JR. COLLEGE
B.I.E.A.P 2009
S.S.C -
GEETHANJALI
HIGH SCHOOL
AP SSC 2007
Technical Skills:
OS: Widows XP ,Windows 7.Windows 8.
SAP BW/BI,BEX,REPORTING TOOLS DASHBOARDS,CRYSTAL,WEBI
MS-Office
Basic Hardware & Internet Knowledge
2. Mini project
Title : Serializer and De-serializer using Verilog
Description : Serializer/Deserializers (Ser-Des) commonly used in
telecommunication networks are now becoming widespread in computer and
embedded systems to meet higher data bandwidth demand and support higher
peripheral device performance requirements. These input/output (IOs) peripherals
are design to provide reliable high speed data transfer capabilities to computers and
embedded devices.
The basic Ser Des function is made up of two functional blocks: the Parallel In
Serial Out (PISO) block (aka Parallel-to-Serial converter) and the Serial In Parallel
Out (SIPO) block (aka Serial-to-Parallel converter). There are 4 different Ser-Des
architectures: (1) Parallel clock Ser-Des, (2) Embedded clock Ser-Des, (3) 8b/10b
Ser-Des, (4) Bit interleaved Ser-Des.
The PISO (Parallel Input, Serial Output) block typically has a parallel clock input,
a set of data input lines, and input data latches. It may use an internal or
external phase-locked loop (PLL) to multiply the incoming parallel clock up to the
serial frequency. The simplest form of the PISO has a single shift register that
receives the parallel data once per parallel clock, and shifts it out at the higher
serial clock rate. Implementations may also make use of a double-buffered register
to avoid metastability when transferring data between clock domains.
The SIPO (Serial Input, Parallel Output) block typically has a receive clock output,
a set of data output lines and output data latches. The receive clock may have been
recovered from the data by the serial clock recovery technique. However, Ser-Des
which do not transmit a clock use reference clock to lock the PLL to the correct Tx
frequency, avoiding low harmonic frequencies present in the data stream. The
SIPO block then divides the incoming clock down to the parallel rate.
Implementations typically have two registers connected as a double buffer. One
register is used to clock in the serial stream, and the other is used to hold the data
for the slower, parallel side.
Some types of Ser-Des include encoding/decoding blocks. The purpose of this
encoding/decoding is typically to place at least statistical bounds on the rate of
signal transitions to allow for easier clock recovery in the receiver, to
provide framing, and to provide DC balance.
3. Main project
Title : CMOS full-adders for energy efficient arithmetic
applications.
Description : We present two high-speed and low-power full-adder
cells designed with an alternative internal logic structure and pass-transistor logic
styles that lead to have a reduced power-delay product (PDP). We carried out a
comparison against other full-adders reported as having a low PDP, in terms of
speed, power consumption and area.
1. There is no requirement of internal signal for controlling the select line of
multiplexers. Instead, the Carry input signal, which has full voltage swing and
without delay, is used to drive the select line of multiplexers, which reduces the
overall propagation delay of full adder.
2. It reduces the capacitive load for the carry input, because it is connected only to
some transistor gates and not to some drain or source terminals, where the
diffusion capacitance is becoming very large. Hence, the overall delay for larger
modules where the carry signal falls on the critical path can be reduced.
3. The propagation delay can be tuned up individually by adjusting the
XOR/XNOR and the AND/OR gates for the So and Co outputs; this criteria is
advantageous for applications where the skew between arriving signals is critical
for a proper operation (e.g., wave pipelining). 4. By interchanging the XOR/XNOR
signals, and the AND/OR gates to NAND/NOR gates at the input of the
multiplexers, the placement of buffers at the full-adder outputs can be implemented
which can improve the performance for load sensitive applications.
Interpersonal Skills:
.Quick Learning & Dedication.
.Self confidence.
.good Communication Skill.
.Sincere and honest.
.Work proficiency.
4. Personal Information:
Name : M.MADHU SUDHAN
Father’s name : MOHAN.M
Date of birth : 13-07-1992
Languages known : English, Hindi, Telugu.
Nationality : Indian
Residency : HNO: 11-345,
SHANTHI NAGAR COLONY,
PATANCHERU,HYDERABAD.
Permanent address : M.MADHU SUDHAN
S/O:M.MOHAN
HNO:1-1
VILL:PICHARAGADI,
MDL:KOHIR
DIST:MEDAK-TELANGANA
Declaration:
I here by declare that all the information furnished above is true to the best of my knowledge and
belief.
Place : Hyderabad
Date :
M.MADHU SUDHAN