The document discusses the architecture and components of PIC18 microcontrollers. It describes the arithmetic logic unit (ALU) and its associated registers. It explains machine cycles, instruction execution, and pipelining. It also covers oscillators, configuration bits, reset options, low power modes, watchdog timers, and the program counter. It compares Harvard and von Neumann architectures.
PIC-MICROCONTROLLER TUTORIALS FOR BEGINNERSVISHNU KP
PIC microcontroller programming based on micro c IDE.Those who really want to build a base in microcontroller programming,just keep going through this. ;) :)
PIC-MICROCONTROLLER TUTORIALS FOR BEGINNERSVISHNU KP
PIC microcontroller programming based on micro c IDE.Those who really want to build a base in microcontroller programming,just keep going through this. ;) :)
This note is more helpful to S7 CSE students Under kerala University. It Contains the architecture and memory organization PIC 16f873 Microcontrollers.
Mechatronics is a multidisciplinary field that refers to the skill sets needed in the contemporary, advanced automated manufacturing industry. At the intersection of mechanics, electronics, and computing, mechatronics specialists create simpler, smarter systems.
Final project report on grocery store management system..pdfKamal Acharya
In today’s fast-changing business environment, it’s extremely important to be able to respond to client needs in the most effective and timely manner. If your customers wish to see your business online and have instant access to your products or services.
Online Grocery Store is an e-commerce website, which retails various grocery products. This project allows viewing various products available enables registered users to purchase desired products instantly using Paytm, UPI payment processor (Instant Pay) and also can place order by using Cash on Delivery (Pay Later) option. This project provides an easy access to Administrators and Managers to view orders placed using Pay Later and Instant Pay options.
In order to develop an e-commerce website, a number of Technologies must be studied and understood. These include multi-tiered architecture, server and client-side scripting techniques, implementation technologies, programming language (such as PHP, HTML, CSS, JavaScript) and MySQL relational databases. This is a project with the objective to develop a basic website where a consumer is provided with a shopping cart website and also to know about the technologies used to develop such a website.
This document will discuss each of the underlying technologies to create and implement an e- commerce website.
This note is more helpful to S7 CSE students Under kerala University. It Contains the architecture and memory organization PIC 16f873 Microcontrollers.
Mechatronics is a multidisciplinary field that refers to the skill sets needed in the contemporary, advanced automated manufacturing industry. At the intersection of mechanics, electronics, and computing, mechatronics specialists create simpler, smarter systems.
Final project report on grocery store management system..pdfKamal Acharya
In today’s fast-changing business environment, it’s extremely important to be able to respond to client needs in the most effective and timely manner. If your customers wish to see your business online and have instant access to your products or services.
Online Grocery Store is an e-commerce website, which retails various grocery products. This project allows viewing various products available enables registered users to purchase desired products instantly using Paytm, UPI payment processor (Instant Pay) and also can place order by using Cash on Delivery (Pay Later) option. This project provides an easy access to Administrators and Managers to view orders placed using Pay Later and Instant Pay options.
In order to develop an e-commerce website, a number of Technologies must be studied and understood. These include multi-tiered architecture, server and client-side scripting techniques, implementation technologies, programming language (such as PHP, HTML, CSS, JavaScript) and MySQL relational databases. This is a project with the objective to develop a basic website where a consumer is provided with a shopping cart website and also to know about the technologies used to develop such a website.
This document will discuss each of the underlying technologies to create and implement an e- commerce website.
Immunizing Image Classifiers Against Localized Adversary Attacksgerogepatton
This paper addresses the vulnerability of deep learning models, particularly convolutional neural networks
(CNN)s, to adversarial attacks and presents a proactive training technique designed to counter them. We
introduce a novel volumization algorithm, which transforms 2D images into 3D volumetric representations.
When combined with 3D convolution and deep curriculum learning optimization (CLO), itsignificantly improves
the immunity of models against localized universal attacks by up to 40%. We evaluate our proposed approach
using contemporary CNN architectures and the modified Canadian Institute for Advanced Research (CIFAR-10
and CIFAR-100) and ImageNet Large Scale Visual Recognition Challenge (ILSVRC12) datasets, showcasing
accuracy improvements over previous techniques. The results indicate that the combination of the volumetric
input and curriculum learning holds significant promise for mitigating adversarial attacks without necessitating
adversary training.
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)MdTanvirMahtab2
This presentation is about the working procedure of Shahjalal Fertilizer Company Limited (SFCL). A Govt. owned Company of Bangladesh Chemical Industries Corporation under Ministry of Industries.
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...Dr.Costas Sachpazis
Terzaghi's soil bearing capacity theory, developed by Karl Terzaghi, is a fundamental principle in geotechnical engineering used to determine the bearing capacity of shallow foundations. This theory provides a method to calculate the ultimate bearing capacity of soil, which is the maximum load per unit area that the soil can support without undergoing shear failure. The Calculation HTML Code included.
Welcome to WIPAC Monthly the magazine brought to you by the LinkedIn Group Water Industry Process Automation & Control.
In this month's edition, along with this month's industry news to celebrate the 13 years since the group was created we have articles including
A case study of the used of Advanced Process Control at the Wastewater Treatment works at Lleida in Spain
A look back on an article on smart wastewater networks in order to see how the industry has measured up in the interim around the adoption of Digital Transformation in the Water Industry.
Student information management system project report ii.pdfKamal Acharya
Our project explains about the student management. This project mainly explains the various actions related to student details. This project shows some ease in adding, editing and deleting the student details. It also provides a less time consuming process for viewing, adding, editing and deleting the marks of the students.
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About
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Technical Specifications
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
Key Features
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface
• Compatible with MAFI CCR system
• Copatiable with IDM8000 CCR
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
Application
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Overview of the fundamental roles in Hydropower generation and the components involved in wider Electrical Engineering.
This paper presents the design and construction of hydroelectric dams from the hydrologist’s survey of the valley before construction, all aspects and involved disciplines, fluid dynamics, structural engineering, generation and mains frequency regulation to the very transmission of power through the network in the United Kingdom.
Author: Robbie Edward Sayers
Collaborators and co editors: Charlie Sims and Connor Healey.
(C) 2024 Robbie E. Sayers
Using recycled concrete aggregates (RCA) for pavements is crucial to achieving sustainability. Implementing RCA for new pavement can minimize carbon footprint, conserve natural resources, reduce harmful emissions, and lower life cycle costs. Compared to natural aggregate (NA), RCA pavement has fewer comprehensive studies and sustainability assessments.
Hierarchical Digital Twin of a Naval Power SystemKerry Sado
A hierarchical digital twin of a Naval DC power system has been developed and experimentally verified. Similar to other state-of-the-art digital twins, this technology creates a digital replica of the physical system executed in real-time or faster, which can modify hardware controls. However, its advantage stems from distributing computational efforts by utilizing a hierarchical structure composed of lower-level digital twin blocks and a higher-level system digital twin. Each digital twin block is associated with a physical subsystem of the hardware and communicates with a singular system digital twin, which creates a system-level response. By extracting information from each level of the hierarchy, power system controls of the hardware were reconfigured autonomously. This hierarchical digital twin development offers several advantages over other digital twins, particularly in the field of naval power systems. The hierarchical structure allows for greater computational efficiency and scalability while the ability to autonomously reconfigure hardware controls offers increased flexibility and responsiveness. The hierarchical decomposition and models utilized were well aligned with the physical twin, as indicated by the maximum deviations between the developed digital twin hierarchy and the hardware.
5. Arithmetic and Logic Unit (ALU),
Working Register in PIC Microcontrollers,
Machine Cycles and Execution of Instructions,
Pipelining for Instruction Execution,
Oscillators,
Configuration Bits,
Reset Options,
Low Power Consumption Mode,
Watchdog Timer,
Program Counter,
RISC, CISC
Compare Harvard architecture with von Neumann architecture.
Main Characteristics of PIC Microcontrollers
6. The ALU executes the arithmetic and logic operations available in the instruction
set.
Arithmetic and Logic Unit (ALU)
(a) ALU in microprocessors (b) ALU in microcontrollers
7. STATUS or FLAG Register:
The ALU also has bits to indicate specific characteristics of the resulting value, such as if the result is
zero, the sign of the resulting value, or the existence of carryover. These bits are normally part of the
STATUS register.
Carry flag (D0 bit of status reg) =1 or else 0.
Digital Carry from the 4th bit (D3) to the 5th bit (D4) after an arithmetic or logical operation the DC flag
(D1 bit of status reg) =1 or as 0.
Result of any arithmetic or logical operation is a zero it is the zero flag (D2 bit of status reg) = 1 or else
0.
Signed number exceeds the range (00-7F for positive numbers and FF-80 for negative numbers) then
the overflow (D3 bit of status reg) = 1 or else 0.
D4 bit of the status register is Negative flag . If D7 bit is 1 then the result is interpreted as –ve and if
D7 bit is 0 then the result is interpreted as +ve .
Arithmetic and Logic Unit (ALU)
8. WREG:
8-bit Register, Same as ACC in Microprocessor
In PIC microcontrollers, an operation’s result can be placed in the W register or any data memory
register.
Arithmetic and Logic Unit (ALU)
Sample program: add two 8 bit numbers:
ORG 0X00
GOTO START
START
MOVLW 0XFE
MOVWF 0X30
MOVLW 0X06
MOVWF 0X31
MOVF 0X30,W
ADDWF 0X31,W
MOVWF 0X32
END
ALU is associated with two registers- WREG and status.
Result may be stored in WREG register.
Status register gives the status of the current
arithmetic and logical operation.
One of the input to the ALU has to be the WREG
9. A machine cycle (MC) is defined as four pulses from the main oscillator (OSC1).
These signals synchronize fetching, decode, and execute of instructions. TMC is the
duration of a machine cycle
Machine Cycles and Execution of Instructions
10. In the fetching phase, the microcontroller reads the instruction in the program
memory and brings it to the CPU.
During the decoding phase, the CPU determines the operation to carry out as
described by the instruction.
Finally, the operation is executed during the execution phase.
Instructions are executed in one machine cycle.
Machine Cycles and Execution of Instructions
11. Overlap two or more instructions as they are being executed. This introduces some
parallelism in the execution of instructions, thus reducing the required execution
time.
In an n-stage pipeline, each instruction spends a time equal to TMC for any stage,
with TMC being the time length of a machine cycle. Therefore, the time needed to
move through all the stages is n × TMC. The average time to execute any instruction
is TMC.
Some instructions, such as control transfer instructions, require additional machine
cycles, the average instruction execution time for these instructions is slightly longer
than TMC.
Pipelining for Instruction Execution
13. Overlap two or more instructions as they are being executed. This introduces some
parallelism in the execution of instructions, thus reducing the required execution
time.
Pipelining for Instruction Execution
14. The main oscillator in PIC microcontrollers can be a crystal oscillator, an RC oscillator,
or an external clock. Some devices also have an internal RC oscillator at 4 MHz.
Oscillators
15. Increasing the oscillator frequency shortens the length of the machine cycles and
therefore the time needed for executing instructions but also increases power
consumption.
The type of oscillator can be selected by the configuration bits.
These also select specific modes of operation for crystal or ceramic oscillators: LP,
XT, and HS. The LP mode selects oscillator frequencies between 32 kHz and 200 kHz,
and is used in very low power-consumption applications. The XT mode selects
oscillator frequencies between 100 kHz and 4 MHz. The HS mode selects oscillator
frequencies between 8 MHz and 20 MHz.
The RC oscillator is the least expensive option for the main oscillator in the
microcontroller. used when frequency accuracy and stability are not critical.
medium-end PIC.
Oscillators
Oscillator type Frequency range
LP 32khz to 200khz
XT 100khz-4Mhz
HS 8Mhz -20 Mhz
17. All PIC microcontrollers have specific bits for their configuration.
stored in non-volatile memory (EEPROM) when the device is being programmed.
microcontroller to better fit the intended application.
Configuration bits can modify
• Type of oscillator
• Watchdog timer on or off
• Program memory protection
• Protection of EEPROM data if available
• Specifications for reset and power supply
Configuration bits in a medium-end PIC make up a word stored in address 2007h in
program memory. This address is only accessible during the programming of the
microcontroller. Once the program is executed, it cannot access this address.
Configuration Bits
18.
19.
20. the microcontroller is temporarily paralyzed and not executing any program
instructions. Following this transient state, the device moves to a predetermined
state.
In PIC microcontrollers, reset sets the program counter to zero. After the reset has
finished, the first instruction executed is the one located at this memory address.
most PIC microcontrollers Reset Sources :
• External reset - An external reset occurs when the pin MCLR# is set to 0
• Power-on reset - MCLR# is connected to the microcontroller’s power supply.
detects the triggering of VDD it creates a reset signal.
• Watchdog reset - Program running in the microcontroller cannot clear the internal
counter of the watchdog time before reaching its maximum value. regular working
mode or when it is in the low-power consumption mode.
• Brown-out reset - transient or glitch in the voltage (VDD).
Reset Options
Fig: Reset signal due to brown-out in several situations. The timer PWRT
guarantees that VDD will be at its nominal value once it leaves the reset state.
21. this circuit needs to guarantee that the microcontroller will only leave the reset
state if the voltage has reached a stable and high enough value. This is the task of
the blocks associated with the VDD signal.
Reset Options
22. The OST/PWRT, oscillator start-up timer (OST), and power-up timer (PWRT). It takes
a certain amount of time for the main oscillator to reach stable values for its
frequency and amplitude after it has been turned on.
power-up timer (PWRT): An internal RC oscillator, independent of the main
oscillator, introduces a 72 ms delay to the signal PWRT after the oscillator has been
powered. ]
oscillator start-up timer (OST): The OST introduces an additional delay of 1024
pulses. This delay is long enough for the oscillator to reach stable amplitude and
frequency values. The OST starts its operation only after the PWRT has reached its
maximum value.
Reset Options
Figure: Time diagrams showing the sequence of signals
associated with the OST/PWRT block. (a)
Power-on reset—MCLR# pin connected to VDD
23. Reset Options
Figure: Reset signal due to brown-out in several situations. The
timer PWRT guarantees that VDD will be at its nominal value
once it leaves the reset state.
24. Special function registers such as STATUS and PCON. register STATUS in which the bit
TO# is set to 0 when the watchdog timer produces a reset.
Reset Options
Figure: Two bits in the special function registry PCON in
PIC18F4550 are used to determine the origin of a reset
signal.
25. Power consumed less than 1 μA, In low-power consumption mode (sleep mode) all
functions are stopped including oscillator.
The instruction sleep, values stored in the data memory registers are not changed.
The microcontroller will wake up leaving the low-consumption mode in any of these three
events:
• Reset
• Overflow of watchdog timer counter (if not disabled)
• Interrupt, either external or from its internal peripherals
instruction after sleep has already entered the CPU, this same instruction will be executed
once the microcontroller wakes up.
Reset - it will execute the instruction stored at address 0 in the program memory.
Watchdog timer - it will continue running the program, executing the instruction after the
sleep instruction.
External interrupt with the interrupt system enabled - it will execute the instruction
immediately after the sleep instruction, and then the program counter will jump to address
4 in the program memory searching for the interrupt routine.
Low-Power Consumption Mode
26. Low-Power Consumption Mode
• The interrupt system can be enabled or disabled by modifying the
global interrupt enable (GIE) bit.
• GIE = 1 the interrupt system is enabled;
• GIE = 0 it is disabled.
• GIE is bit number 7 in the special function register INTCON.
27. Pulse counter, Timer, Internal Oscillator.
If the pulse counter reaches its maximum value (overflows) -- the WDT times out --
generates a reset signal for the microcontroller.
Watchdog Timer
Figure: Block diagram of the circuits associated with a watchdog timer in medium-
end PICs. PSA and PS2:PS0 are bits from the special function registry OPTION. WDTE
is the configuration bit that enables the watchdog timer.
28. Once the program is running normally, the WDT cannot be disabled.
The WDT times out every 18 ms. to avoid the WDT timing out and generating the
reset signal for the microcontroller, the internal pulse counter needs to be set to 0
before the 18 ms have elapsed. The instruction clrwdt is used for this purpose. It is
possible to extend the 18 ms timeout up to 2.3 s by assigning an additional counter
to the WDT. This counter is called Prescaler.
Watchdog Timer
29. The program counter is used by the CPU to point to the address in ROM of the next
instruction to be executed.
As the CPU fetches the opcode from the program ROM, the program counter is
incremented automatically to point to the next instruction.
The wider the program counter, more the memory locations.
14-bit program counter - (214 = 16K) of code - addresses 0000-3FFFH – PIC 16F
16-bit program counter - (216 = 64K) of code
21-bit program counter - (221 = 2M) of code in ROM
PIC 18 family can access program HEX addresses
000000 to IFFFFFH
0 0000 0000 0000 0000 B – Min Address
1 1111 1111 1111 1111 B – Max Address
PCL is readable and writable while PCH and PCU are not directly readable or writable.
Updates to PCH and PCU are provided by PCLATH and PCLATU registers resp.
Program counter in the PIC – 21 bit – 2 MB
32. Program memory (ROM) for PIC18 family
[1] Fernando E. Valdes-Perez, Ramon Pallas-Areny, “Microcontrollers - Fundamentals and Applications with PIC”, CRC Press, 1st Edition, 2009
[2] Mazidi M. A., McKinlay R. D., Causey D., “PIC Microcontroller And Embedded Systems.”, Pearson Education International, 2008
[3] https://ww1.microchip.com/downloads/en/devicedoc/39632c.pdf