Lec_3_MPMC.pdf

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MICROPROCESSOR & MICROCONTROLLER-MTE301
Dr. Susanta Kumar Rout
School of Engineering
Ajeenkya D Y Patil University,
Pune, Maharashtra, India
Email: susanta.rout@adypu.edu.in
Cont.No:7978072036, 9937681996
2/4/2023
ADYPU, Pune, Maharashtra, India Dr. Susanta kumar Rout

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1.Course number and name : MTE301-Microprocessor & Microcontroller
2.Credits and contact hours : 3-Credits and 3-hours/week
3.Instructor’s or course coordinator’s name: Dr. Susanta Kumar Rout
4.Text book, title, and author
A. The 8051 Microcontroller and Embedded Systems using Assembly and C,
MuhammasMazidi, Janice Mazidi and RolinMcKinlay, Pearson Education, 2nd
edition.
B. The 8051 Microcontroller, Kenneth J. Ayala, Cengage Learning.
5. Reference book, title, and author
A. Microcontrollers Theory and Applications, Ajay Deshmukh, TATA McGraw Hill.
B. Embedded Systems and Robots- Projects using the 8051 Microcontroller, Subrata
Ghoshal, Cengage Learning.
2/4/2023
Microprocessor & Microcontroller-MTE301

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MPMC SYLLABUS
1. Introduction to Microprocessors
 Study of Microprocessor architecture with suitable examples, Study of Von Newman and
Harvard architecture, comparison of CISC and RISC Processors, Study of microcontroller
architecture and special features and its advantages, Memory interfacing with
microprocessors and microcontrollers. Memory mapped and IO mapped interfacing.
Clock frequency and speed of instruction execution. Measurement of performance of
microprocessor.
2. Architecture of 8051 Microcontroller
 8051 architecture, Pin description, Internal and external memories, timing diagrams for
memory interfacing, Counters and Timers, Serial communication, Stack and Stack
Pointer, Port Structure and Interrupts.
2/4/2023

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3. Addressing Mode and Instruction Set of 8051
 8051 Addressing modes, 8051 Instruction set, Microcontroller Application Development
tools- Simulator, Emulator, In-circuit Emulator (ICE), Logic Analyzer, ISP, Cross
assembler, Introduction to Embedded C programming.
4. Real World Interfacing
 Interfacing 8051/89C51 to LED with and without interrupt, ADC, DAC, LCD and keypad
(consider debounce), Stepper motor, SPI bus. RS 232, RS 485, I2C bus standard,
Interfacing ADC, DAC, memory, RTC with 8051 using I2C bus.
5. Case Study: Data Acquisition System Design
 Designing microcontroller-based Data Acquisition System. Design of sensor interfacing,
signal conditioning of input stage, selection of ADC, selection of output drivers. Writing
efficient programs using Assembly language or Embedded C.
2/4/2023
MPMC SYLLABUS

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1. Introduction to Microprocessors
 Study of Microprocessor architecture with suitable examples.
 Study of Von-Newman and Harvard architecture.
 Comparison of CISC and RISC Processors.
 Study of microcontroller architecture and special features and its advantages.
 Memory interfacing with microprocessors and microcontrollers.
 Memory mapped and IO mapped interfacing.
 Clock frequency and speed of instruction execution.
 Measurement of performance of microprocessor.
Microprocessor & Microcontroller-MTE301

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8085-Microprocessor
Here, we will discuss about,
1. Feature of 8085.
2. Pin Configuration of 8085.
3. Architecture of 8085.
4. Register Structure of 8085.
5. Bus Organisation of 8085.
6. Timing, control, and instruction set of 8085 microprocessor.

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Microprocessor and microcontroller
Dr. Susanta Kumar Rout
FUNCTIONAL BLOCK DIAGRAM OF 8085

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Functional Block Diagram of 8085

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Functional Block Diagram of 8085

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DATA BUS
A. The data bus is a group of eight lines used for data flow.
B. These lines are bi-directional data flow in both directions between the
microprocessor and memory and peripheral devices.
C. The microprocessor uses the data bus to perform the second function i.e.
transferring binary information.
D. The largest number that can appear on the data bus is 11111111B.
Bus Structure

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ADDRESS BUS
A. The address bus is a group of 16 lines generally identified as A0 to A15.
B. The address bus is unidirectional: bits flow in one direction-from the MPU to
peripheral devices.
C. The MPU uses the address bus to perform the function is identifying a peripheral or
a memory location.
CONTROL BUS
A. The control bus carries synchronization signals and providing timing signals.
B. The MPU generates specific control signals for every operation it performs. These
signals are used to identify a device type with which the MPU wants to
communicate.
Bus Structure (Cont...)

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A. The 8085 microprocessor have
six general-purpose registers to
store 8-bit data during program
execution.
B. These registers are identified as
B, C, D, E, H and L.
C. They can be combined as
register pair- BC, DE and HL to
perform some 16-bit operation.
Register of 8085 Microprocessor

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Accumulator
A. The accumulator is an 8-bit register that is part of the arithmetic/logic unit (ALU).
B. It is extensively used in arithmetical, logical, load and store operation as well as in ,
input/output instruction.
C. It used to hold one of the operands of an arithmetic or logical operation. It serves as
one input to the ALU. The other operand for an arithmetic or logical operation may
be stored in memory or in one of the general purpose registers.
ARITHMETIC AND LOGIC UNIT (ALU)
A. It is used to perform the arithmetic operations like addition, subtraction,
multiplication, division, increment and decrement and logical operations like AND,
OR and EX-OR.
B. It receives the data from accumulator and registers.
C. According to the result it set or reset the flags.

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Flag Register
A. The INTEL 8085 microprocessor contains five flip-flop to serve as status flag.
B. The microprocessor uses the 8-bit flag register for testing the data condition.
PSW
D0 : CARRY FLAG (CY)
A. After the execution of an arithmetic and logical instruction if a carry is produce, the
carry flag is set to 1,otherwise it is 0.
B. Also in case of subtraction, if any borrow occurs then the carry flag is set to 1.
D4 : AUXILIARY CARRY FLAG (AC)
A. The auxiliary carry flag hold carry out of the bit number 3 to the bit number 4
resulting from the execution of an arithmetic and logical operation.
B. If D3 generates any carry when doing any arithmetic and logical operation, this
flag is set otherwise it is reset.

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D2 : PARITY FLAG (P)
A. It defined by the number of 1-bits present in the accumulator.
B. For EVEN parity, P= 1.
C. For ODD parity, P= 0.
D6 : ZERO FLAG (Z)
A. The zero status flag Z is set to 1, if the result of an arithmetic or logical operation is
zero.
B. For non-zero result it is reset i.e. value = 0.
Flag Register (Cont…)

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D7: SIGN FLAGS (S) (-128 to +127)
A. This flag is set to 1 (for negative), if the 7th bit (MSB) of the result of an arithmetic
or logical operation is 1 and 0 (for positive), if the 7th bit of the result of an
arithmetic or logical operation is 0.
B. After execution of any arithmetic and logical operation, if D7 of the result is 1, the
sign flag is set. Otherwise it is reset.
C. D7 is reserved for indicating the sign; the remaining is the magnitude of number.
D. If D7 is 1, the number will be viewed as negative number. If D7 is 0, the number
will be viewed as positive number.
Flag Register (Cont…)

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A. This is a 16-bit register which is known as memory pointer.
B. The program counter is a special purpose register in which at a particular time it
stores the address of the next instruction to be executed.
or
The program counter point/contain that address of memory location from which the
next byte is to be fetched.
C. For one-byte instruction it updates the PC by one.
For two-byte instruction it updates the PC by two.
D. PC is update by the processor and always contain 16-bit address of memory
location.
Program Counter (PC)

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A. It is a 16-bit special function register.
B. Any portion of the memory can be used as a stack. So stack is an area of the RAM
(read-write memory) in which temporary information is stored on FIRST-IN-
LAST-OUT (FILO) basis.
C. The SP register ordinarily hold the address of the last byte written onto the stack.
This is also called TOP of stack or simply STACK TOP.
Instruction Register And Decoder
 After fetching an instruction from the memory, the processor loads it in the
instruction register. This instruction is decodes by decoder and the processor then
executes the instruction.
Stack Pointer (SP)

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Lec_3_MPMC.pdf

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