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Implementation of a Classification System of
EEG Signals Based on FPGA
Víctor Asanza , Alisson Constantine, Stephany Valarezo, and Enrique Peláez
Escuela Superior Politécnica del Litoral, ESPOL, Guayaquil, Ecuador
April 22 2020 to April 24 2020
Buenos Aires, Argentina
Implementation of a Classification System of EEG Signals Based on FPGA
64 surface EEG Electrodes International
System 10-10
DC artifact present on the 64 electrodes of the
EEG signal
EEG-BCI (0,1 - 100)Hz, (10uV - 10mV)
EEG Signals
Data Set
Signals
Preprocessing
7-30 Hz
Features Extraction Classification
Implementation of a Classification System of EEG Signals Based on FPGA
0.5 –4 Hz
• Delta
waves
• Sleep
REM
4 –7 Hz
• Theta
waves
• Meditation
8 –12 Hz
• Alpha waves
• Relax
• μ waves (7,5-
12,5Hz)
• Imaginary Motor
16 –31 Hz
• Beta waves
• Alert
• Concentration
32 –110 Hz
• Gamma
• High brain
activity
Implementation of a Classification System of EEG Signals Based on FPGA
RMS(PSD(1:64))
64 surface EEG Electrodes
Periodogram estimation of the Power
Spectral Density (PSD)
Time-domain representation of the EEG
signal from motor activity of both feet
(ME2)
EEG Signals
Data Set
Signals
Preprocessing
7-30 Hz
Features Extraction Classification
Implementation of a Classification System of EEG Signals Based on FPGA
656 samples (4,1s / Fs 160Hz)
x 64 surface EEG Electrodes
Electrodes
S
A
M
P
L
E
S
1 …. 64
0x01 0x32
.
.
.
.
0x25 0x21
64
656
• EEG Signals Data Set
• https://physionet.org/
• 8 healthy subjects
⁓7 motor activity of both feet (ME2)
⁓9 imaginary motor activity of both feet (IE2)
Features
64 x 1
Label
S
A
M
P
L
E
S
[1 0]
[1 0]
[1 0]
[1 0]
[1 0]
128
65
EEG Signals
Data Set
Signals
Preprocessing
7-30 Hz
Features Extraction Classification
Implementation of a Classification System of EEG Signals Based on FPGA
Block diagram of data processing in FPGA
NIOS II processor
Diagram of the pattern recognition function of neural
networks in Simulink Multi-Layer Perceptron (MLP)
EEG Signals
Data Set
Signals
Preprocessing
7-30 Hz
Features Extraction Classification
Implementation of a Classification System of EEG Signals Based on FPGA
Confusion Matrix of the classification
of all events
Logic utilization (Cyclone V)
1,303 / 41,910
(4%)
Total block memory bits
47,360 /5,662,720
(<1%)
Total pins
45/499
(9%)
Resources used by the fpga
Analysis of Results
crossval(trainedClassifier.Classification, 'KFold', 5);
• ME2 events with 92,1% accuracy
• IE2 events with 93,8% accuracy
Time to look for the file in the SD 21,26 [us]
Time to open the file in the SD 22,30 [us]
Processing time of the neural
network
27,36 [us]
For citations
• V. Asanza, A. Constantine, S. Valarezo and E. Peláez, "Implementation of a Classification
System of EEG Signals Based on FPGA," 2020 Seventh International Conference
on eDemocracy & eGovernment (ICEDEG), Buenos Aires, Argentina, 2020, pp. 87-92, doi:
10.1109/ICEDEG48599.2020.9096752.
• Published in: https://ieeexplore.ieee.org/document/9096752
• Proceedings: https://www.computer.org/csdl/proceedings/icedeg/2020/1jZacXR14xa
For more information
Víctor Asanza
Mail: vasanza@espol.edu.ec
Facultad de Ingeniería en Electricidad y Computación, FIEC
Escuela Superior Politécnica del Litoral, ESPOL
Campus Gustavo Galindo Km 30.5 Vía Perimetral, P.O. Box 09-01-5863
090150 Guayaquil, Ecuador
Personal Blog: Orcid: ResearchGate: Google Schoolar:
Thank you!

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⭐⭐⭐⭐⭐ Implementation of a Classification System of #EEG Signals Based on #FPGA

  • 1. Implementation of a Classification System of EEG Signals Based on FPGA Víctor Asanza , Alisson Constantine, Stephany Valarezo, and Enrique Peláez Escuela Superior Politécnica del Litoral, ESPOL, Guayaquil, Ecuador April 22 2020 to April 24 2020 Buenos Aires, Argentina
  • 2. Implementation of a Classification System of EEG Signals Based on FPGA 64 surface EEG Electrodes International System 10-10 DC artifact present on the 64 electrodes of the EEG signal EEG-BCI (0,1 - 100)Hz, (10uV - 10mV) EEG Signals Data Set Signals Preprocessing 7-30 Hz Features Extraction Classification
  • 3. Implementation of a Classification System of EEG Signals Based on FPGA 0.5 –4 Hz • Delta waves • Sleep REM 4 –7 Hz • Theta waves • Meditation 8 –12 Hz • Alpha waves • Relax • μ waves (7,5- 12,5Hz) • Imaginary Motor 16 –31 Hz • Beta waves • Alert • Concentration 32 –110 Hz • Gamma • High brain activity
  • 4. Implementation of a Classification System of EEG Signals Based on FPGA RMS(PSD(1:64)) 64 surface EEG Electrodes Periodogram estimation of the Power Spectral Density (PSD) Time-domain representation of the EEG signal from motor activity of both feet (ME2) EEG Signals Data Set Signals Preprocessing 7-30 Hz Features Extraction Classification
  • 5. Implementation of a Classification System of EEG Signals Based on FPGA 656 samples (4,1s / Fs 160Hz) x 64 surface EEG Electrodes Electrodes S A M P L E S 1 …. 64 0x01 0x32 . . . . 0x25 0x21 64 656 • EEG Signals Data Set • https://physionet.org/ • 8 healthy subjects ⁓7 motor activity of both feet (ME2) ⁓9 imaginary motor activity of both feet (IE2) Features 64 x 1 Label S A M P L E S [1 0] [1 0] [1 0] [1 0] [1 0] 128 65 EEG Signals Data Set Signals Preprocessing 7-30 Hz Features Extraction Classification
  • 6. Implementation of a Classification System of EEG Signals Based on FPGA Block diagram of data processing in FPGA NIOS II processor Diagram of the pattern recognition function of neural networks in Simulink Multi-Layer Perceptron (MLP) EEG Signals Data Set Signals Preprocessing 7-30 Hz Features Extraction Classification
  • 7. Implementation of a Classification System of EEG Signals Based on FPGA Confusion Matrix of the classification of all events Logic utilization (Cyclone V) 1,303 / 41,910 (4%) Total block memory bits 47,360 /5,662,720 (<1%) Total pins 45/499 (9%) Resources used by the fpga Analysis of Results crossval(trainedClassifier.Classification, 'KFold', 5); • ME2 events with 92,1% accuracy • IE2 events with 93,8% accuracy Time to look for the file in the SD 21,26 [us] Time to open the file in the SD 22,30 [us] Processing time of the neural network 27,36 [us]
  • 8. For citations • V. Asanza, A. Constantine, S. Valarezo and E. Peláez, "Implementation of a Classification System of EEG Signals Based on FPGA," 2020 Seventh International Conference on eDemocracy & eGovernment (ICEDEG), Buenos Aires, Argentina, 2020, pp. 87-92, doi: 10.1109/ICEDEG48599.2020.9096752. • Published in: https://ieeexplore.ieee.org/document/9096752 • Proceedings: https://www.computer.org/csdl/proceedings/icedeg/2020/1jZacXR14xa
  • 9. For more information Víctor Asanza Mail: vasanza@espol.edu.ec Facultad de Ingeniería en Electricidad y Computación, FIEC Escuela Superior Politécnica del Litoral, ESPOL Campus Gustavo Galindo Km 30.5 Vía Perimetral, P.O. Box 09-01-5863 090150 Guayaquil, Ecuador Personal Blog: Orcid: ResearchGate: Google Schoolar: