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IEEE.Power.Electronics-March.2017-P2P.pdf
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2. EconoPACK™ 4
The world standard for 3-level applications
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6. 4 IEEE POWER ELECTRONICS MAGAZINE ]March 2017
From the Editor
Generating Standards
Is a Long Process
by Ashok Bindra
T
o begin the new year, Prof.
Alan Mantooth of the Univer-
sity of Arkansas took up the
baton from outgoing IEEE Power
Electronics Society (PELS) President
Prof. Braham Ferreira, whose two-
year term ended in December 2016.
In those two years, Prof. Ferreira has
done a tremendous job in extending
the Society’s global reach, driving
new initiatives, and setting the stage
for its growth around the world. It
was a pleasure working with Prof.
Ferreira, whose support and guid-
ance helped the magazine flourish. I
look forward to working with Prof.
Mantooth, who has briefly outlined
his vision for the Society in his first
“President’s Message” in this issue of
IEEE Power Electronics Magazine.
Prof. Mantooth is also actively
involved in the standards process at
the IEEE as well as cybersecurity for
power electronics.
Interestingly, this issue of IEEE
Power Electronics Magazine focuses
on standards in power electronics. It
is a difficult and complex issue, one
that is not so easy to interpret and
implement as there are so many orga-
nizations and multiple standards. As
a result, engineers often struggle to
adopt the correct standard. We invited
Prof. Peter Wilson of the University of
Bath, United Kingdom, who is also the
PELS director of standards, to shed
some light on this complicated topic.
In his article, “Standards in Power
Electronics,” Prof. Wilson attempts to
address commonly asked questions
from practicing engineers. Besides
identifying important standards orga-
nizations around the world, the article
also describes how
standards are devel-
oped. He provides a
flow diagram that
graphically takes you
from the first stage in
the process, which
is the development
of an idea, to the last
step when the stan-
dard is published.
However, the process must be reviewed
and updated after ten years; updates
used to be required every five years.
In addition, this article discusses
the role of the PELS Standards Com-
mittee in the development of the In-
ternational Technology Roadmap for
Wide-Bandgap Power Semiconduc-
tor (ITRW). As per the article, the
role of the ITRW is to establish some
of the key criteria in a framework
of metrics for wide-bandgap power
semiconductors, in the context of
power electronic systems, to enable
specific technical work and standards
activities to be undertaken.
In the second article on this topic,
Rich Fassler of Power Integrations
discusses different types of efficiency
regulations that have emerged in the
last decade and the major impact
theirrequirementsarehavingonac–dc
power conversion designs. In addition
to presenting details of a few efficiency
programs, the article also describes in-
novative power integrated circuits that
enable conformance to new and pro-
posed efficiency requirements.
The article “How
GaN Power Transis-
tors Drive High-Perfor-
mance Lidar,” by John
Glaser of Efficient
Power Conversion
Corp., provides some
background infor-
mation on the light-
detection-and-ranging
(lidar) instrument,
including its inner workings. He then
discusses laser diode drivers and the
benefits of using GaN FETs in this appli-
cation. Moreover, he argues why eGaN
FET characteristics are more desirable
for this design. Measured performance
is presented to support the discussion.
The article “Generation-After-Next
Power Electronics,” by Robert Kaplar,
Jason Neely, Dale Huber, and Lee Rash-
kin of Sandia National Laboratories,
reviews recently developed optimiza-
tion methods for designing converters
to operate at the limits of performance.
Several developing technologies are
discussed that are expected to greatly
increase power converter densities.
These include recently developed
ultrawide-bandgap semiconductor de-
vices, complementary balance of the
system components including compact
Digital Object Identifier 10.1109/MPEL.2016.2644058
Date of publication: 7 March 2017
It was a pleasure
working with Prof.
Ferreira, whose
support and guidance
helped the magazine
flourish.
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7. The Ultimate
Power Couple
With their high K and small size, these 1:1 coupled inductors
are the perfect match for your SEPIC and flyback applications
High Current MSD Series
Offered in eleven body sizes and hundreds of
inductance/current rating combinations, our
MSD/LPD families are perfectly coupled to all
your SEPIC and flyback designs.
The MSD Series offers current ratings
up to 30.5 Amps, low DCR, up to 500 Vrms
winding-to-winding isolation and coupling
coefficients as high as K t 0.98.
With profiles as low as 0.9 mm and foot-
prints as small as 3.0 mm square, the LPD
Series offers current ratings up to 5.6 Amps,
DCR as low as 0.042 Ohms and coupling
coefficients as high as K t 0.99.
You can see all of our coupled inductors,
including models with turns ratios up to
1:100, at www.coilcraft.com/coupled.
Low Profile LPD Series
WWW.COILCRAFT.COM
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Booth #1211
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________________________
____________
8. 6 IEEE POWER ELECTRONICS MAGAZINE ]March 2017
high-voltage device packaging capable
of 10 kV hold-off, and next-generation
developments in high-frequency soft
magnetic materials and revolutionary
thermal management approaches.
The last article in this issue, “Tan-
talum Capacitor Technology” by
Chris Reynolds, AVX Corp., discuss-
es the need for components capable
of enduring temperatures up to and
exceeding 200 °C. Advanced down-
hole, underhood automotive, and
aerospace systems rely on compo-
nents delivering optimal perfor-
mance while subject to extreme
environmental conditions.
Exciting Content in Our Columns
In the “Happenings” column, contribut-
ing writer Tom Keim uncovers three-
dimensional printing in power electron-
ics manufacturing. While the “Patent
Reviews” column discusses a design
patent, the “White Hot” column moti-
vates engineers to attend PELS-spon-
sored conferences, especially the IEEE
International Communications Energy
Conference (INTELEC), which has a
long history that predates the PELS.
The “Member and Industry Pro-
file” column highlights the accom-
plishments and contributions of Delta
Group’s founder and honorary chair,
Bruce C.H. Cheng. Written by Prof.
Fred Lee, the article illustrates the life
and a career of a Chinese visionary
entrepreneur dedicated to energy sav-
ings and sustainability.
“Society News” presents an Ap-
plied Power Electronics Conference
2017 preview; a review of the 2016
International Conference on Sustain-
able Energy Technologies in Hanoi,
Vietnam, sponsored by the IEEE In-
dustrial Applications Society and the
PELS Singapore Chapter; and a wide-
bandgap power devices and applica-
tions overview. “Member News” an-
nounces newly elected IEEE Fellows.
IEEE Power Electronics Maga-
zine is in its fourth year. The last
three years have been positive, and
the magazine has grown both in the
number of editorial pages and ads.
With your continued support and co-
operation, I am confident that it will
perform even better this year. Be-
cause your comments and feedback
are important for improving the
quality of content and information in
the magazine, please continue send-
ing your ideas and suggestions. It
helps us make IEEE Power Electron-
ics Magazine a valuable resource for
practicing power electronics engi-
neers around the world. Thanks for
your continued support.
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9. DKIH
-
- DKIH-1 for single phase applications rated from 10 to 50 A @ 300/250 VAC;
max 425 VDC with an inductance range of 1.6 to 6.9 mH
- DKIH-3 for three phase applications rated from 10 to 50 A @ 600 VAC with
an inductance range of 1.6 to 6.9 mH
- Temperature range of -40 to +100°C
- Customer specific PCB pins outs and windings available
- UR, cUR and ENEC approved
High current compensating choke with
nanocrystalline ring core
FMAB NEO
FMBC LL
- 2 stage filter design
- Terminals for three phases and ground
- Rated 7 (7.7) to 180 (197.1) A at an ambient temperature of 50°C
(40°C) @ 520 VAC 50/60 Hz
- Leakage current rating for 7 to 55 A is 5 mA; 75 to 180 A is 20 mA
- Temperature range of -25 to +100°C
- Suitable for use in low leakage current-critical industiral applications
with RCDs
- cURus and ENEC approved
Low Leakage 3-phase filter offers compact and
lightweight design
EMC Solutions
-
Put SCHURTER’s competence to the test in resolving even the most
aggravating EMC challenges. Our technical know-how, combined with
our global experience in meeting varying compliance standards, is
our forte. Providing you with a successful product solution is our
permanent incentive.
- Power entry modules with filters
- 1 and 3-phase line filters
- Chokes
Applying optimal EMC solutions
EMC single phase filter series offers
three versions for design flexibility
fmbc-ll.schurter.com emc-service.schurter.com
dkih.schurter.com fmab-neo.schurter.com
-
- FMAB NEO design N with two large X capacitors
FMAB NEO design P with two standard X capacitors
FMAB NEO design Q with one X capacitor
- Rated 1 to 60 A @250/125 VAC; 50/60 Hz
- Leakage current 1 mA (250 V / 60 Hz)
- Temperature range of -40 to +100°C
- Termination options include quick connect, bolt, nut or wire
- cURus and ENEC approved
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10. 8 IEEE POWER ELECTRONICS MAGAZINE ]March 2017
President’s Message
Minding the Present
While Looking to the Future
by Alan Mantooth
I
t is my honor to take the reins of
the IEEE Power Electronics
Society (PELS) for the next two
years as Society president. I want to
begin by offering my thanks to out-
going President Braham Ferreira for
his service for the past two years.
He has done a great job and leaves
the Society moving forward effec-
tively. Any incoming leader to an
organization has to be mindful of
the road that organization has trav-
eled; while ensuring that the busi-
ness of the organization is properly
handled, new initiatives are pur-
sued, and proper strategic planning
for the organization is conducted. In
this way, I have often referred to the
role of the president as that of a
middle-leg relay runner in track and
field. The baton is passed on from
the previous runner and handed off
to the next one. In between, the cur-
rent runner’s job is to execute effec-
tively (i.e., run as fast as you can)
and ensure a successful hand off to
the next runner.
I have taken the past few months
to give careful consideration to the
things that I want to undertake during
my tenure as president. Due to pub-
lication deadlines for this magazine,
I am writing this before I have taken
office; however, I would like to take
this opportunity to outline some of
my preliminary thoughts for the next
year. Of course, there may be addi-
tional initiatives that emerge through
conversations with you, the members
of our Society.
Ongoing Activities
As a result of consistently strong lead-
ership, PELS finds itself in very good
shape in many important aspects
including financial, membership, pub-
lications, conferences, standards,
global participation, industry partici-
pation, and young professional pro-
grams. Our efforts in each of these
areas continue to lead to growth and
improvements. But this is no time to
be complacent. Our field is growing in
importance to many systems in our
world, and our Society must continue
to keep pace with these advances
while simultaneously offering value to
our members.
Our current technical committee
(TC) structure reflects changes the
Society instituted over the past five
years or so. As vice president of tech-
nical operations, I oversaw much of
that implementation. We now have
processes in place to rotate our lead-
ership and involve more volunteers in
Society affairs. In general, we feel that
this is good for the Society and gives
greater opportunity for a wider range
of people to participate, grow their
network of peers, and cultivate future
leaders. Our TCs will continue to play
a vital role in strategic planning going
forward in addition to running their
normal affairs such as workshops,
symposia, transactions special issues,
and supporting our larger conferences
such as the IEEE Applied Power Elec-
tronics Conference and Exposition
and the IEEE Energy Conversion
Congress and Exposition. We do not
expect the TC structure to be rigid. As
our field is expanding, our technical
activities will also expand.
Our Society publications are at an
all-time high. We have several highly
regarded transactions that we par-
ticipate in or own outright. Due to
the tireless efforts of our editors and
editorial boards, time to publication
is good, impact factors are outstand-
ing, and everyone generally feels good
about their progress. The same can
be said of our conferences and work-
shops. Attendance is growing and re-
flects the growing interest in our vari-
ous application spaces within power
electronics.
As outlined by Braham in previ-
ous columns, PELS has several new
initiatives that have resulted from
our strategic planning efforts over the
past couple of years. For instance, in
2016, we began new initiatives in hu-
manitarian efforts, technology road
mapping, and education that are all
outcomes from recent strategic plan-
ning activities that the Society has
undertaken. Another area being in-
vestigated from a power electronic
systems perspective is cybersecurity.
The Society has an ad hoc committee
Digital Object Identifier 10.1109/MPEL.2016.2643341
Date of publication: 7 March 2017 (continued on page 71)
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___________________
________________
______________
12. 10 IEEE POWER ELECTRONICS MAGAZINE ]March 2017
Happenings
by Tom Keim
Three-Dimensional Printing in
Power Electronics Manufacturing
T
hree-dimensional (3-D) print-
ing has been around since at
least the early 1980s. By now,
the basic concept is widely known
and well understood. A largely pla-
nar object is formed by processing a
material only at selected locations
on a plane, producing a result that
has some small projection in the
direction perpendicular to the plane.
A new plane is defined a small dis-
tance above the original plane, and
another planar object, which can be
the same as or different from the
first, is formed in the second plane.
The second planar object is fused to
the first over their area of overlap.
The process is repeated over and
over, and one or more solid objects
are formed.
The formation of an individual
planar object is conceptually nearly
identical to the operation of an ink-jet
printer. In exactly the way that an
image can be produced with an ink-
jet printer in response to a data set
consisting of a small number of bits
corresponded to each pixel in a two-
dimensional array, each layer in the
output of a 3-D printer can be pro-
duced in response to an easily
defined data set. It is easy to under-
stand how a computer representation
of any solid object can be used to
drive a 3-D printer. This capability to
move directly from a computer model
of a complex object to its production
is one of the fundamental attractions
of 3-D printing.
The first working systems used
photo-polymerizing liquids and ultravi-
olet lasers. Much of the progress over
the intervening decades has been in
the expansion of the number and
variety of materials
that can be used to
produce objects in
this general way.
Today, binding agents
can be sprayed onto
powder (using devic-
es that might be
called binder-jet pri-
nters, by analogy to
ink-jet printers). Ther-
moplastics can be
used. Of industrial
importance, objects
can be formed with bound-together
metal powders, possibly by local
melting and fusing, and then sin-
tered to form metallic objects.
The days of maximum hype over
3-D printing appear to be over. In 2014
and 2015, the Gartner Hype Cycle
report indicated that the technology
was past both the peak of inflated
expectations and the trough of disillu-
sionment and on the slope of enlight-
enment [1], [2]. In 2016, 3-D printing
did not even appear on the chart [3].
There are already significant
examples where 3-D-printed parts
are used in important industrial prod-
ucts and even products for retail sale.
However, the number of possible
future applications of 3-D printing
still far outweighs the number of
cases where the new technique has
found its way out of the laboratory
and into the factory. The power elec-
tronics industry still seems to be
poised to participate in this transi-
tion. Certainly, there
is widespread aware-
ness of the potential
of this new technol-
ogy in the power
electronics commu-
nity. There are exam-
ples, some highly
publicized, of dem-
onstrations using the
technology in the pro-
duction of a power
electronics system.
However, it has prov-
en quite difficult to learn of an instance
where the power electronics industry
has used 3-D printing in the produc-
tion of a series of identical products.
There are some notable achieve-
ments. In 2014, researchers at the Oak
Ridge National Laboratory (ORNL)
built a very compact inverter using
some 3-D-printed parts. In a press
release [4], the laboratory announced
“a liquid-cooled, all-silicon-carbide,
traction drive inverter, (which) fea-
tures 50% printed parts” (Figure 1).
According to the press release, “Initial
evaluations confirmed an efficiency
of nearly 99%, surpassing DOE’s
power electronics target and setting
Digital Object Identifier 10.1109/MPEL.2016.2643321
Date of publication: 7 March 2017
This capability to
move directly from
a computer model of
a complex object to
its production is one
of the fundamental
attractions of
3-D printing.
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14. 12 IEEE POWER ELECTRONICS MAGAZINE ]March 2017
the stage for building an
inverter using entirely addi-
tive manufacturing tech-
niques.” For additional dis-
cussion on additive manufac-
turing, see “3-D Printing
Versus Additive Manufactur-
ing.” From the press release,
and from the buzz that
occurred on the Internet fol-
lowing its release, one might
be led to believe that one
could put a set of specifica-
tions into a program, press a
button, and out would pop a
working inverter.
Burak Ozpineci of ORNL
provided a few peer-reviewed
references reporting this
work [5]–[7]. A careful read-
ing of these publications tells a
more modest story. The team did
some work that goes a long way
toward establishing that present
day 3-D-printed aluminum material
can be competitive with a common
extrudable, heat-treatable alumi-
num alloy for thermal conductivity.
The prototype inverter was made
with a 3-D-printed heat sink. How-
ever, claims to great significance
beyond this are not strongly sup-
ported by the cited references. No
support is provided for the claim of
50% printed parts, for example. Only
one part other than the heat
exchanger is mentioned in the most
significant article available to the
reviewer, and in this instance, the
authors state that a plastic lead
frame was printed using “fused
deposition melting [of] common
ABS plastic.” This material choice
was evidently made to facilitate
making the part by 3-D printing and
not because the material is especial-
ly well suited to the application.
No discussion is provided con-
cerning the economic viability of the
printed parts of the inverter or of the
inverter itself. Claims are made for
superior performance of a printed
heat sink, due to the possibility of
complex internal structure, but the
data supporting these claims do not
apply to the geometry included in
the inverter and may not be signifi-
cant when confidence limits are con-
sidered. No claim is made that the
heat sink was not processed by con-
ventional machining, grinding, or
polishing after printing, but no
admission of such process-
ing is provided either.
In summary, this work rep-
resents a competent bit of engi-
neering development, but it
does not appear to be close to
theone-click-from-specification-
to-inverter vision, let alone an
inverter built entirely by 3-D
printing. It is true that the orig-
inal press release made no
claim to this capability or even
aspirations to such capability,
but perhaps the ORNL press
people should read the report
by Gartner.
There are other groups
doing enough in this field to
merit notice. Perhaps first
among them is led by Prof.
Douglas C. Hopkins at North Caroli-
na State University. Prof. GQ Lu at
Virginia Tech is also noteworthy. No
other group leaves the same Internet
presence as does the ORNL effort. It
is probable that neither these groups
nor most others have as many staff
members available to apply to the
advancement of 3-D printing in
power electronics.
Of course, if there were a com-
mercial company planning to use
3-D printing in the production of
power electronic components or sys-
tems, it is most probable that the
effort would not be widely publi-
cized. Depending on the company’s
intellectual property and trade
secrets policies, such use might not
be public even after the products
were introduced to market.
FIG 1 A 30-kW inverter built by ORNL with silicon carbide
metal–oxide–semiconductor field-effect transistor incorpo-
rates 3-D printed heat sink. (Figure courtesy of the Depart-
ment of Energy and ORNL.)
Some parties are advocating that 3-D printing be called additive
manufacturing. Perhaps some feel that printing is too insubstantial
a concept to describe the new technology. Certainly, what is going
on is an additive process. The problem is that there are many other
more common processes already part of manufacturing that are also
additive. Welding is one common example. Prof. Douglas C. Hopkins
at North Carolina State University used a PowerPoint slide with an
image, attributed to Stratasys, showing a human hand adding more
clay to what is apparently the beginning of a clay pot. So while 3-D
printing is additive manufacturing, it does not follow that additive
manufacturing is 3-D printing or even that additive manufacturing is
a suitable alternative name for 3-D printing. Most machining, as the
word is used in manufacturing, is a process of material removal. If one
cannot bring oneself to call 3-D printing just that, perhaps additive
machining is a suitable neologism. Alternatively, consider the phrase
“additive grinding.” After all, grinding reduces selected portions of a
part into powder; additive grinding turns selected portions of powder
into a new part.
3-D Printing Versus Additive Manufacturing
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15. March 2017 ]IEEE POWER ELECTRONICS MAGAZINE 13
About the Author
Tom Keim (tkeim@alum.mit.edu) is a
late-career engineer and a long-time
Member of the IEEE. His specialty is
high-performance electromechanical
systems and the power systems that
drive and control them. He has
worked for a worldwide conglomer-
ate, for a small (50 employees) innova-
tive research and development com-
pany, as well as for a major research
university and an engineering consult-
ing company. He has 50 publications
and 11 patents and is currently active
as an author, inventor, and consultant.
References
[1] Gartner. (2014, Aug. 11). Gartner’s 2014 hype
cycle for emerging technologies maps the jour-
ney to digital business. [Online]. Available: http://
www.gartner.com/newsroom/id/2819918
[2] Gartner. (2015, Aug. 18). Gartner’s 2015 hype
cycle for emerging technologies identifies the
computing innovations that organizations should
monitor. [Online]. Available: http://www.gartner
.com/newsroom/id/3114217
[3] Gartner. (2016, Aug. 16). Gartner’s 2016
hype cycle for emerging technologies identi-
fies three key trends that organizations must
track to gain competitive advantage. [Online].
Available: http://www.gartner.com/newsroom/
id/3412017
[4] R. Walli. (2104, Oct. 14). New ORNL elec-
tric vehicle technology packs more punch in
smaller package. Oak Ridge National Laboratory.
[Online]. Available: https://www.ornl.gov/news/
new-ornl-electric-vehicle-technology-packs-
more-punch-smaller-package
[5] M. Chinthavali, C. Ayers, S. Campbell, R.
Wiles, and B. Ozpineci, “A 10-kW SiC inverter
with a novel printed metal power module
with integrated cooling using additive manu-
facturing,” in Proc. IEEE Workshop Wide
Bandgap Power Devices Applications, 2014,
pp. 48–54.
[6] T. Wu, A. A. Wereszczak, H. Wang, B. Ozpineci,
and C. W. Ayers, “Thermal response of additive
manufactured aluminum,” in Proc. Int. Symp.
3-D Power Electronics Integration Manufactur-
ing, 2016, pp. 1–15.
[7] T. Wu, B. Ozpineci, and C. Ayers, “Genetic
algorithm design of a 3-D printed heat sink,” in
Proc. 2016 IEEE Applied Power Electronics
Conf. Exposition, pp. 3529–3536.
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18. 16 IEEE POWER ELECTRONICS MAGAZINE ]March 2017
Association website [2]. Once the ballot has passed, the
draft standard is passed to the IEEE Standards Board for
final approval and editorial review, and once this process is
completed, the standard can be published. There is a man-
datory period of review and update for the standard after
ten years (this was increased from five years), at which
point the standard can be renewed as is, revised, or with-
drawn. If it is withdrawn, the standard is then archived.
What About Road Map Activities
Relating to WBG Devices?
In addition to standards, the IEEE PELS Standards Commit-
tee has been instrumental in developing the International
Technology Road Map for WBG power semiconductors
(ITRW). There are clear needs from industry, academia,
education, and public authorities for a reliable and compre-
hensive view on the strategic research agenda and technol-
ogy road map for WBG power devices.
Many road maps have existed over the
years in a variety of technical fields,
perhaps the most famous being the
International Technology Road Map
for Semiconductors (ITRS) [3], which
has been primarily driven by the deep
submicron silicon-based industry, with
Moore’s law at its heart.
The role of the ITRW is to provide
reference, guidance, and services to
future research and technology devel-
opment in this area. The goals of the
ITRW are to publish a clear technol-
ogy road map every two years, white
papers setting out clear technology
statements, and position papers;
defining a strategic research agenda;
coordinating information dissemina-
tion and community building events;
and providing operational support to
the WBG power semiconductor com-
munity. The structure of the ITRW
working group is shown in Figure 2.
A steering committee consists of leadership from societies,
industry, government, and academia. The participation and
leadership of industry are at the heart of the ITRW process
and therefore, in addition to key industry individuals on the
steering committee, a wider industry advisory board has
the specific role of ensuring that the ITRW is relevant and
technology driven. The steering committee also has strong
technical representation from the specific technical work-
ing groups that are defined in Figure 2, ensuring broad par-
ticipation of individuals across all aspects of WBG power
semiconductor technologies. As with the steering commit-
tee, there is extensive industry participation in the individ-
ual working groups.
The structure of the ITRW has been designed to be
inclusive and participation is open to ensure that decisions
made are fair and neutral, and the voting membership of the
steering committee broadly follows the conventional IEEE
approach understood for standards
activities in that no one company, geo-
graphical grouping, or constituency
can dominate. In the early stages of the
ITRW’s existence, the steering com-
mittee was formed based on interest
and knowledge of the field; however, it
is envisaged that the future executive
officers will be elected as the organiza-
tion becomes self-sustaining. In addi-
tion to the broad technical groupings,
underpinning technology interests
will be shown and shared across the
technical working groups such as reli-
ability, data sheets, testing, and design
FIG 2 The ITRW organizational structure. EPI: Epitaxy.
Executive
Officers
ITRW Steering Committee
Steering
Committee
Members
Technical
Working Group
Representatives
Industry
Advisory Board
Representatives
Industry
Advisory
Board
Substrates
and EPI
Devices
Modules and
Packaging
Systems and
Applications
Technical Working Groups
FIG 1 The IEEE standards process. IEEE SA: IEEE standards approval.
Idea
Project
Approval
Process
Working Group
Develop a Draft
Standard
Sponsor
Ballot
IEEE-SA
Standards Board
Approval
Standard
Published
Revise
Standard
Withdraw
Standard
Archive
Standard
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19. March 2017 ]IEEE POWER ELECTRONICS MAGAZINE 17
techniques, and these will be developed across the working
groups where appropriate.
What Is the Governance of the ITRW?
The ITRW steering committee consists of representatives
from relevant societies, associations, and alliances, i.e.,
PELS, the Power Electronic Research Network, and the
Communications Workers of American, with a member-
ship per term for three years. The chair (PELS) and
cochairs are elected and comprise the decision-making
body for ITRW, carrying two-thirds of the total votes. The
steering committee ensures that a balance exists among
members from academic, industrial, and government
backgrounds. The subcommittees and working groups
comprise internationally leading experts from both aca-
demia and industry and is the working body of ITRW. The
chair and cochairs of each subgroup are initially
appointed by the steering committee.
The industrial advisory board comprises individuals
from relevant companies that represent the complete value
chain of this industry and its global geographic distribution.
Its role is to provide input and advice to the steering com-
mittee. The chair and cochairs are elected by the board.
How Does the ITRW Operate?
The ITRW aims to be a neutral forum that provides an open
platform based on the contribution of global leading experts
as volunteers. Member meetings take place twice per year,
in combination with a major conference/event to ensure
maximum participation. Other regular meetings or work-
shops occur outside of the major meetings. The technology
road map updates once every two years. The white paper
and strategic research agenda is defined and events orga-
nized according to need. The ITRW uses the web for infor-
mation sharing and advertisement.
How Can We Establish a Framework
of Standard Metrics for the WBG?
One of the major challenges for the power electronics com-
munity in the comparison of power electronics devices and
systems is being able to have a framework of standard met-
rics to enable this comparison to occur. The well-known
Moore’s law is the observation that the number of transis-
tors fabricated in a dense electronic circuit doubles every
two years [12]. This has been useful as a specific metric for
the silicon device community because it basically estab-
lishes a rule of thumb for the cutting edge of device technol-
ogy based on dimension alone. But it has in fact led to a
number of related trends in the silicon world such as power
loss, switching speed, and complexity, and these do not
translate directly into the power electronics world and,
more specifically, WBG semiconductors such as silicon car-
bide (SiC) or gallium nitride (GaN). From a power electron-
ics standpoint, a key parameter is the Rds (on) resistance,
which provides a suitable measure of the basic device per-
formance in terms of the relationship between Rds (on) and
the breakdown voltage. When the curves for silicon (Si),
SiC, and GaN are compared, there is a fundamental measure
of the limit for each technology, as shown in Figure 3.
Useful though this metric is, it is not the complete pic-
ture. If we compare the thermal performance of Si and SiC,
for example, it is well known that SiC devices can operate
at much wider temperature ranges than can Si and, as such,
their range of operation is much wider. In addition, their abil-
ity to tolerate higher temperatures makes it less important
to ensure that the devices are maintained at a lower tem-
perature (as would be the case for Si devices). This, in con-
junction with a much lower on resistance (and consequently
lower static power loss), makes temperature an orthogonal
aspect of the metric framework potentially to be considered.
Another issue of particular relevance to the power electron-
ics community is reliability. Some WBG devices are at a very
early stage of commercialization and thus the technology is
immature enough to leave questions unanswered regarding
reliability when deployed during a long period.
One of the particular difficulties in establishing this
framework is the wide range of application for each aspect
of these devices, for example, running at a high tempera-
ture or perhaps extensive periods of high-power operation.
Another unknown is whether we can predict the perfor-
mance in a particular module, package, or system, when
those aspects may influence performance equally as much
as the device itself. For example, an SiC device may be
intrinsically robust, but the driver may not be, especially if
it is integrated using a wire-bonded package. The role of the
ITRW is to establish some of the key criteria in a framework
of metrics for WBG power semiconductors, in the context
of power electronic systems, to enable specific technical
work and standards activities to be undertaken.
What Are Examples of Typical Standards
Relevant to Power Electronics?
There are a large variety of IEEE standards for power elec-
tronics activities. IEEE Standard 1573 [4] has been developed
FIG 3 The Rds(on) resistance versus breakdown voltage for Si,
SiC, and GaN technologies.
Si SiC GaN
105
104
103
102
101
100
10–1
10–2
102
103
104
Breakdown Voltage (V)
Ron-Area
(mΩ-cm
2
)
10–3
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20. 18 IEEE POWER ELECTRONICS MAGAZINE ]March 2017
for the overall design of power electronics modules and sub-
systems and includes guidelines for effective and efficient
design of power electronics. This standard provides guidance
on interface definitions and application, including parametric
values for power electronic subsystems consisting of single
or multiple elements. The recommended practice applies to
ac-dc and dc-dc electronic power subsystems. The range of
power subsystems includes dc, single-phase, and three-phase
inputs, with elements having power levels from a fraction of
a watt to 20 kW. The voltage range is 600 V and less, at a fre-
quency or frequencies of dc –1 kHz (although switching fre-
quencies can of course be much higher than values in this
range). For higher-power converters, there is IEEE Standard
295-1969 [5], which relates to sine wave or polyphase volt-
ages and to those working in grid-related activities.
Of course, there are many specific technical areas in
which standards must be followed, and a highly popular
area at the moment is that of solar inverters. For example,
for a solar inverter to be used in Europe, it must conform to
the following standards:
■ EN 50524 [6]. The current version, published in 2010,
covers the data sheet and name plate for photovoltaic
inverters.
■ EN 50530 [7]. The current version, published in 2010,
defines the methods for testing the overall efficiency of
grid-connected photovoltaic inverters.
■ IEC 61683. The current version, published in 1999 [8],
defines the procedure for measuring efficiency and
power conditioners. What this means in practice is how
to assess the power level, input voltage, output voltage,
power factor, harmonic content, load nonlinearity, and
temperature.
■ EN 62109 [9]. This deals with the safety of the power con-
version equipment for use in photovoltaic systems and
defines the minimum requirements for protection against
fire, mechanical, electric shock, and other requirements.
In addition to the need for specific power electron-
ics-related standards, there may also be module level or
consumer product standards, particularly for safety. For
example, if a dc–dc converter needs to be integrated into a
communications system, it must satisfy the safety require-
ments in telecommunications [10] or information technol-
ogy equipment [11]. These standards are simply a fraction
of the standards applicable to power electronics systems
today, but they give the reader an idea of the scope of indi-
vidual standards and highlight some of the key issues for
power electronics designers.
Conclusions
The role of standards in power electronics systems has
become revitalized with the development of major steps for-
ward due to WBG power semiconductor devices, particu-
larly in SiC and GaN. The step change in performance, and
especially thermal tolerance, has led directly to the need for
new standards and definitions, both for researchers and
industry. It is an exciting time to be in the power electronics
field and great opportunities exist for the power electronics
community to come together to define a standard approach
to manage the adoption of these exciting new technologies.
About the Author
Peter Wilson (p.r.wilson@bath.ac.uk) received his B.Eng.
degree from Heriot-Watt University, Edinburgh, United King-
dom; his M.B.A. degree from the Edinburgh Business School,
United Kingdom; and his Ph.D. degree from the University of
Southampton, United Kingdom. He is a professor of elec-
tronics and systems engineering in the Department of Elec-
tronic and Electrical Engineering at the University of Bath,
United Kingdom. He received industrial experience at Fer-
ranti, General Electric Company-Marconi, Scotland, United
Kingdom, and Analogy, Inc., United States, before taking up
his previous academic post of associate professor at South-
ampton in the School of Electronics and Computer Science.
He is a fellow of the Institution of Engineering and Technolo-
gy and the British Computer Society, a Senior Member of the
IEEE, and currently serves as executive vice president of
standards for the IEEE Power Electronics Society.
References
[1] IEEE Recommended Practices for Modulating Current in High-Brightness
LEDs for Mitigating Health Risks to Viewers, IEEE Standard 1789, 2015.
[Online]. Available: https://standards.ieee.org/findstds/standard/1789-2015.html
[2] IEEE Standards Association Frequently Asked Questions. [Online].
Available: https://standards.ieee.org/faqs/
[3] ITRS Reports: ITRS 2.0 Publication. (2015). [Online]. Available: http://
www.itrs2.net/itrs-reports.html
[4] Recommended Practice for Electronic Power Subsystems: Param-
eters, Interfaces, Elements, and Performance, IEEE Standard P1573, 2003.
[Online]. Available: https://standards.ieee.org/develop/project/1573.html
[5] IEEE Standard for Electronics Power Transformers, IEEE Standard 295,
1969. [Online]. Available: https://standards.ieee.org/findstds/standard/295-1969
.html
[6] Data Sheet and Name Plate for Photovoltaic Inverters, EN 50524,
2009. [Online]. Available: http://shop.bsigroup.com/ProductDetail/?p
id=000000000030183362
[7] Overall Efficiency of Grid Connected Photovoltaic Inverters, BS EN
50530, 2010 and A1, 2013. [Online]. Available: http://shop.bsigroup.com/Produ
ctDetail/?pid=000000000030270551
[8] Photovoltaic Systems–Power Conditioners: Procedure for Measuring
Efficiency, EN 61683, 2000. [Online]. Available: https://webstore.iec.ch/pre-
view/info_iec61683%7Bed1.0%7Den.pdf
[9] Safety of Power Converters for Use in Photovoltaic Power Systems. Part
1: General Requirements, EN 62109, 2011. [Online]. Available: https://web-
store.iec.ch/publication/6470
[10] Environmental Engineering (EE); Power Supply Interface at the
Input to Telecommunications and Datacom (ICT) Equipment; Part 2:
Operated by –48 V Direct Current (dc), ETS 300 132-2, 2011. [Online]. Avail-
able: http://www.etsi.org.
[11] Information Technology Equipment—Safety, IEC Standard 60950-1,
2009. [Online]. Available: http://ulstandards.ul.com/standard/?id=60950-1_1
[12] G. E. Moore, “Cramming more components onto integrated circuits,”
Electronics, vol. 38, pp. 114–117, Apr. 1965.
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22. 20 IEEE POWER ELECTRONICS MAGAZINE ]March 2017
consumption based, calculating a product’s allowable
annual total energy consumption (TEC), in kilowatt
hours per year, based on a product’s typical daily usage.
Early regulations simply focused on modal power con-
sumption limits, but newer TEC regulations are more
complex, placing more importance on the design of the
power supply to be efficient during a wide range of oper-
ating load points. Some regulations use a combination of
both modal and TEC limits.
It is valuable to understand that
the overall efficiency of a mains-
powered product is determined by
three equally important parts: 1) the
ac–dc power conversion stage, 2) the
efficiency of the rest of the electronic
circuitry during the product’s main
function operation, and 3) power man-
agement controls, allowing a product
to automatically go into lower-power
operating modes (i.e., idle, sleep, or
off) when not in use. In some cases, when automatic power
down can move a product into such a low-power mode, the
reduced efficiency of the power supply at that low level can
cause unintended overtemperature and/or noise problems.
Regulations targeting item 1) directly impact power supply
efficiency, whereas those targeting items 2) and 3) indi-
rectly affect power supply efficiency.
Regulations Directly Impacting
Power Supply Efficiency
Direct impact regulations specifically target external power
supply (EPS) and internal power supply (IPS) conversion
efficiency. As a result of the rise of personal mobile elec-
tronics (cell phones, MP3 players, laptops) in the 1990s,
power adapters started invading our homes and offices in
large numbers. Most were based on decades-old bulky lin-
ear transformer technology design, barely squeaking by
with 50% conversion efficiency at full load and consuming
measurable power when the adapter was plugged into the
wall but not attached to its end application (no-load mode).
It was not uncommon for these adapters to waste nearly 1
W or more while in no-load mode.
The first major EPS efficiency specification to emerge
was the EC’s CoC [2], minimizing no-load power losses
in EPSs rated at 75 W and below output. The CoC’s initial
no-load limit (effective January 2001) was 1 W, dropping
down to 0.75 W in 2003. These limits caused some power
supply design change, but linear transformer designs
could still be modified to meet those
no-load requirements.
In January 2005, a more compre-
hensive ENERGY STAR EPS efficiency
program specification became effec-
tive,addingaminimumaverageactive-
mode efficiency requirement (based
on the measured average efficiency
at 25, 50, 75, and 100% load points) [3].
Desiring harmonization, the CoC ver-
sion 2 adopted the ENERGY STAR
approach and test method. Although
the CoC and Energy Star were voluntary programs, the test
method and metrics were adopted for mandatory standards
by the CEC, U.S. DOE, and EC Ecodesign Directive. (The
ENERGY STAR EPS efficiency program was suspended in
December of 2010.) These tighter, mandatory requirements
provided the catalyst for power supply design change, espe-
cially in the 2–12 W area for personal electronic adapters,
and transformed the market away from linear designs to
switch-mode designs. In addition to efficiency gains, the
new designs delivered lighter and smaller external power
supplies and adapters, as shown in Figure 1. The large
1990s preregulation mobile phone adapter [Figure 1(a)] has
a no-load power consumption of almost 1 W compared to
the 2016 smartphone adapter [Figure 1(c)], with a no-load
consumption of less than 0.03 W. Without these regulations
demanding higher efficiency, we might still be using large,
bulky adapters.
In the beginning, changing from a linear-based power
supply design to a switching power supply design was a
quick way to become compliant. But in 2016, the U.S DOE
EPS Level VI EISA standard and EC CoC version 5 program
brought tighter no-load power consumption and higher
active-mode efficiency requirements. The new regulations
required power supply designers to consider additional
circuit changes. Examples include the following:
■ Modified switching algorithms. As agencies became
aware that some applications (computers) spend a major
part of the day in nonactive modes (i.e., idle or standby
modes), they realized that power supplies also needed to
be highly efficient at those low-load levels. Results from
a study conducted by the International Telecommunica-
tion Union [4] that were presented at a 2012 CoC EPS
meeting revealed a noticeable efficiency drop at load lev-
els that were 10% and below in power supplies that oth-
erwise exhibited high efficiency at higher loads. This
resulted in the addition of a separate minimum
Before EPS
Efficiency Programs
Pout = 2.26 W
EPS Efficiency
Level V
Pout = 5.0 W
EPS Efficiency
Level VI
Pout = 18.0 W
(a) (b) (c)
FIG 1 (a)–(c) The EPS efficiency program affect on personal
electronic adapters.
Without these regula-
tions demanding higher
efficiency, we might
still be using large,
bulky adapters.
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23. March 2017 ]IEEE POWER ELECTRONICS MAGAZINE 21
efficiency requirement at 10% load in the current CoC
version 5 specification. Other EPS programs are consid-
ering including this in their future requirements. To
maintain constant efficiency over the entire load range,
new designs vary switching waveforms depending on the
load, changing frequency, pulse
width, and burst energy. In recent
years, power conversion integrated
circuit (IC) manufacturers have
introduced multiple new products
to address this challenge [5].
■ Updated efficiency requirements.
The more stringent active efficiency
requirements have also impacted the
output side of supplies. Synchronous
rectification, once reserved for more
expensive, high-performance power
supplies, is now replacing tradition-
al Schottky diodes. Additionally, optocouplers and associ-
ated feedback control components used on the second-
ary side are being removed, as designers use primary side
regulation schemes or new secondary side regulation
approaches, replacing optocouplers by using the isolated
inductance of IC lead frames [6].
These efficiency improvements
come at essentially the same mate-
rial cost as the previous less-efficient
models, thanks to innovations from
component and power supply manu-
facturers. Tables 1–3 and Figures 2–4
illustrate the three major EPS effi-
ciency programs/standards in force
today. It is important to note that the
requirements shown (and related test
procedures) have also been adopted
by other countries as well. Levels in
Table 1. The ac–dc single-output EPS active mode efficiency requirements.
EC CoC v5 (Tier 2) U.S. DOE (Level VI)
EC Ecodesign
(Level V) CoC, 10% Efficiency
Standard (Basic) Voltagea
Name Plate Output
Power (Pno )
Four-Point Average
Efficiency (minimum)
Four-Point Average
Efficiency (minimum)
Four-Point Average
Efficiencyb
(minimum)
10% Point
Efficiency (minimum)
P
0 1W
no # . .
P
0 500 0 169
no
#
$ + . .
P
0 500 0 16
no
#
$ + . ( ) .
P
0 480 0 140
no
# + . ( ) .
P
0 500 0 060
no
#
$ +
P
1 49 W
no
1 #
. .
P
0 00115 0 670
no
no
#
- +
. ( )
P
0 071 In
#
$
. .
P
0 0014 0 67
no
no
#
- +
. ( )
P
0 071 In
#
$ . ( ) .
P
0 063 0 622
In no
#
$ +
. .
P
0 00115 0 570
no
no
#
- +
. ( )
P
0 071 In
#
$
P 250
49 W
no
1 # .
0 890
$ .
0 88
$ .
0 87 .
0 90
7
$
250 W
2 N/A .
0 875
$ N/A N/A
Low Voltagea
Name Plate Output
Power (Pno )
Four-Point Average
Efficiency (minimum)
Four-Point Average
Efficiency (minimum)
Four-Point Average
Efficiencyb
(minimum)
10% Point
Efficiency (minimum)
P
0 1W
no # . .
P
0 517 0 091
no
#
$ + . .
P
0 517 0 087
no
#
$ + . .
P
0 497 0 067
no
# + . P
0 517 no
#
$
P
1 49 W
no
1 #
. .
P
0 0011 0 609
no
no
#
- +
. ( )
P
0 0834 In
#
$
. .
P
0 0014 0 609
no
no
#
- +
. ( )
P
0 0834 In
#
$ . ( ) .
P
0 075 0 561
In no
# +
. .
P
0 00127 0 518
no
no
#
- +
. ( )
P
0 0834 In
#
$
P 250
49 W
no
1 # .
0 880
$ .
0 8 0
7
$ .
0 860 .
0 780
$
250 W
2 N/A .
0 875
$ N/A N/A
N/A: not available.
a
Standard voltage power supply excludes low-voltage power supplies defined as having a name plate output of 6 V and ≥ 550 mA.
b
Ecodesign power levels are ≤ 51 W and 51 W (not 49 W).
Table 2. The ac–dc single-output EPS no-load power consumption requirements.
EC CoC, Version 5 (Tier 2) U.S. DOE (Level VI) EC Ecodesign (Level V)
Name Plate Output Power (Pno ) No-Load Power Maximum (W) No-Load Power Maximum (W) No-Load Power Maximum (W)
P
0 49 W
no
1 # 0.075 0.100 0.300
P
49 250 W
no
1 # 0.150 0.210 0.500
250 W
2 N/A 0.500 N/A
Synchronous rectifica-
tion, once reserved
for more expensive,
high-performance
power supplies, is now
replacing traditional
Schottky diodes.
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24. 22 IEEE POWER ELECTRONICS MAGAZINE ]March 2017
the tables and figures refer to the International Efficiency
Marking Protocol for EPS. Compliant EPSs use the corre-
sponding Roman numeral marking on their package.
IPS efficiency programs are not very common due to
the difficulty in identifying where the power supply’s out-
put can be tested if incorporated on the end application’s
circuit board. But because a computer’s IPS is typi-
cally a discrete silver box with easily identifiable outputs,
the 80 PLUS program was established for that product.
Universally adopted, the voluntary 80 PLUS computer
power supply labeling program specifies minimum effi-
ciencies at 20, 50, and 100% loading [7]. It created perfor-
mance group designations as shown in Table 3. ENERGY
STAR was the first to incorporate the 80 PLUS standard
level into its 2007 version 4 computer program specifica-
tion, a level maintained through its current version 6 [8].
0 5 10 15 20 25 30 35 40
Nominal Power (Watts)
45 50 55 60 65 70
Minimum Average Efficiency
(Standard Voltage) 1 W
95
90
85
80
75
70
65
60
55
50
Four-Point
Average
Efficiency
(%)
89%
88%
87%
85%
CoC v5 (Tier 2) U.S. DOE 2016 (Lev. VI)
Ecodesign Dir. (Lev. V) Previous U.S. DOE (Lev. IV)
FIG 2 The ac–dc single-output EPS standard voltage four-point
efficiency requirements.
0 5 10 15 20 25 30 35 40
EPS Output Power (W)
45 50 55 60 65 70
Minimum Average Efficiency
(Low Voltage) 1 W
90
85
80
75
70
65
60
55
50
Four-Point
Average
Efficiency
(%)
88%
87%
86%
85%
CoC v5 (Tier 2) U.S. DOE 2016 (Lev. VI)
Ecodesign Dir. (Lev. V) Previous U.S. DOE (Lev. IV)
( g )
FIG 3 The ac–dc single-output EPS low-voltage four-point
efficiency requirements.
Table 3. The 80 PLUS minimum IPS efficiency requirements.
115-V Internal Power Supplies
80 PLUS Designation
10% Load
Efficiency
20% Load
Efficiency
50% Load
Efficiency
100% Load
Efficiency Power Factor Correction
Standard – 80% 80% 80% 0.9 at 100% load
Bronze – 82% 85% 82% 0.9 at 50% load
Silver – 85% 88% 85% 0.9 at 50% load
Gold – 87% 90% 87% 0.9 at 50% load
Platinum – 90% 92% 89% 0.95 at 50% load
Titanium 90% 92% 94% 90% 0.95 at 20% load
230-V EU Internal Power Supplies
80 PLUS Designation
10% Load
Efficiency
20% Load
Efficiency
50% Load
Efficiency
100% Load
Efficiency Power Factor Correction
Standard – 82% 85% 82% 0.9 at 50% load
Bronze – 85% 88% 85% 0.9 at 50% load
Silver – 87% 90% 87% 0.9 at 50% load
Gold – 90% 92% 89% 0.9 at 50% load
Platinum – 92% 94% 90% 0.95 at 50% load
Titanium 90% 94% 96% 94% 0.95 at 20% load
EU: European Union.
Source: www.plugloadsolutions.com/80PlusPowerSupplies.aspx.
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25. March 2017 ]IEEE POWER ELECTRONICS MAGAZINE 23
The EC Ecodesign Directive for computers also speci-
fies an 80 PLUS standard minimum in its requirements
(617/2013) [9]. But new programs are specifying higher
levels; the latest version 3 draft of
the ENERGY STAR computer server
program specification proposes 80
PLUS Platinum efficiency, and the
CEC is requiring 80 PLUS Gold IPS
efficiency for workstations in 2018.
Regulations Indirectly Impacting
Power Supply Efficiency
Whereas the programs and standards
mentioned previously specifically tar-
get power supply efficiency, other pro-
grams indirectly affect power supply
efficiency by addressing consumption
in an application’s standby or off
modes. A prime example is the EC
Ecodesign Directive requirements for
standby- and off-mode electric power
consumption of electrical and electronic household and
office equipment (1275/2008, with amendment 801/2013) [10].
A horizontal standard, this program limits off- and standby-
mode power consumption for a wide range of unrelated
office and home products. Meeting the current maximum
standby power consumption limit of 0.5 W would be impos-
sible with a power supply that was inefficient at very low
loads [i.e., the linear-based EPS in Figure 1(a)].
In recent years, the energy-consumption-limiting TEC
approach, mentioned previously, has found its way into
efficiency regulations. Although TEC specifications do
not specifically address power supplies, they demand
high-power-supply efficiency for a wide operating range,
limiting an application’s energy consumption in very-low-
power operating modes (i.e., off, standby, and idle). The
focus on these lower-power modes places performance
pressure on the power supply to maintain high efficiency
from a 100% load down into the single-digit load area. Effi-
ciency programs and standards that currently use TEC
metrics include ENERGY STAR (set-top box, computer,
and displays), Ecodesign Directive (computer), and soon,
CEC Appliance Efficiency Regulations (computer). The
CEC recently approved mandatory computer regulation
harmonizes with the voluntary ENERGY STAR computer
program version 6.1 metrics but with tighter limits. Both
requirements focus on energy consumed during nonactive
computing modes.
A computer’s annual energy consumption ( )
ETEC is
calculated using the following:
,
(8760 1000) (
)
E P T P T
P T P T
TEC OFF OFF SLEEP SLEEP
LONG IDLE LONG IDLE SHORT IDLE SHORT IDLE
– – – –
' # # #
# #
= +
+ +
where POFF is measured power consumption in off mode
,
W
^ h PSLEEP is measured power consumption in sleep mode
,
W
^ h PLONG IDLE
- is measured power consumption in long
idle mode ,
W
^ h PSHORT IDLE
- is measured power consumption
in short idle mode ,
W
^ h and ,
TOFF ,
TSLEEP ,
TLONG IDLE
- and
TSHORT IDLE
- are mode weightings as
specified in [8, Table 3].
To be compliant, a computer’s cal-
culated TEC must be lower than the
energy allowed in the California stan-
dard [11]. Early attempts to meet the
proposed standard were hampered
by IPSs with poor efficiency at very-
low-power mode levels. A demonstra-
tion of a compliant computer using an
IPS designed specifically to provide
high efficiency at the required power
levels was demonstrated at an April
2016 CEC stakeholder workshop [12].
The custom-designed 300-W IPS con-
sisted of a highly efficient high-power
switching power supply coupled with
a highly efficient low-power switch-
ing power supply. The computer used cost-effective, off-
the-shelf components. The IPS automatically switched
outputs from one supply to the other, depending on load
requirements. The demonstration reinforced the fact that
in addition to improved computer design, conformance
was unlikely without improved power supply design.
What’s Next?
What is certain is that the efficiency regulations landscape
will continue to change as components and design
improvements deliver higher levels of power conversion
efficiency. Keeping up with revisions to current programs
as well as new product program requirements can be
Maximum No-Load Power Consumption
0.21
0.15
0.6
0.5
0.4
0.3
0.2
0.1
0
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70
Nominal Power (Watts)
No
Load
(W)
CoC v5 (Tier 2) U.S. DOE 2016 (Lev. VI)
Ecodesign Dir. (Lev. V) Previous U.S. DOE (Lev. IV)
FIG 4 The ac–dc single-output no-load power consumption
requirements curves.
What is certain is that
the efficiency regula-
tions landscape will
continue to change as
components and design
improvements deliver
higher levels of power
conversion efficiency.
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26. 24 IEEE POWER ELECTRONICS MAGAZINE ]March 2017
daunting. To aid manufacturers and interested stakehold-
ers, websites have become available that summarize effi-
ciency program and standard activities. These include
Power Integrations Green Room (https://ac-dc.power.com/
green-room/), the Power Sources Manufacturers Associa-
tion Energy Efficiency Database (http://www.psma.com/
technical-forums/energy-efficiency/efficiency-database),
and the Collaborative Labeling and Appliance Standards
Program database (http://clasp.ngo/Tools/Tools/SL_Search).
Some efficiency regulations, such as the Ecodesign
Directive, require product standards to be reviewed every
few years to evaluate tighter requirements based on cur-
rently available products. As costs decrease for semicon-
ductors made from newer materials such as gallium nitride
and silicon carbide, they will begin to appear in high-volume
commercial power supply design, pushing efficiency perfor-
mance to even higher levels. And, as agencies better under-
stand the way in which products are actually used, TEC
limits will continue to put pressure on power supplies to
achieve higher efficiency at ultralow loads. New and emerg-
ing electronic products will continue to drive power supply
efficiency. Examples include the following:
■ Electric vehicle (EV) service equipment. An ENERGY
STAR efficiency program for EV chargers was recently
finalized. The focus is on minimizing the EV charger’s
power consumption while in idle and off modes, not
when charging the battery.
■ IoT appliances. The connected appliance revolution
has begun, in the process of adding billions of smart
products to the grid during the next few decades. Effi-
ciency agencies are currently wrestling with how to
ensure that these new appliances enter low-power
modes when they are off but still connected to the net-
work. California recently approved a light-emitting diode
lamp standard that limits standby power consumption to
no more than 0.2 W, the lowest networked standby
power requirement to date.
And, the drive to mandate zero net energy (ZNE) homes
and commercial buildings will put new focus on installed
product efficiency, including their power supplies. Califor-
nia has already set targets for new residential buildings to
be ZNE by 2020 and new commercial buildings by 2030 [13].
Although it is impossible to foresee all of the future must-
have electronic devices and appliances that will appear,
one idea is certain: as new product adoption numbers
rise, efficiency programs will be developed to limit their
energy consumption. And, as new technology improves
the efficiency in today’s available products, revisions will
tighten their existing program requirements. Both occur-
rences will drive power supplies to greater levels of conver-
sion efficiency.
About the Author
Rich Fassler (Richard.Fassler@power.com) received his
B.S. degree in electrical engineering in 1973 from California
Polytechnic State University, San Luis Obispo. He has
more than 35 years of experience in the technical marketing
and sales of power semiconductors used in power conver-
sion, through positions at Power Integrations (San Jose, Cal-
ifornia), IXYS Corporation (Santa Clara, California), and the
General Electric Company (San Jose, California; Auburn,
New York; Chicago, Illinois; and Columbia, South Carolina).
His current work focuses on worldwide energy efficiency reg-
ulations for consumer and office products. He writes about
energy efficiency program topics in the Power Integrations
Green Room (https://ac-dc.power.com/green-room/blog/).
References
[1] B. Lebot, A. Meier, and A. Anglade, “Global implications of standby power
use,” in Proc. American Council for an Energy-Efficient Economy Summer
Study on Energy Efficiency in Buildings. Asilomar, CA, 2000, p. 7.82.
[2] European Commission. (2001) Efficiency of external power supplies.
[Online]. Available: http://iet.jrc.ec.europa.eu/energyefficiency/ict-codes-
conduct/efficiency-external-power-supplies
[3] ENERGY STAR program requirements for single voltage external ac–dc
and ac–ac power supplies, version 1.1. ENERGY STAR. Washington, D.C.
[Online]. Available: https://www.energystar.gov/sites/default/files/specs//
private/EPS_Eligibility_Criteria_V1.1_0.pdf
[4] R. Bolla, R. Bruschi, and L. D’Agostino. (2012, Sept.). GeSi and ITU: An
energy-aware survey on ICT device power supplies. International Telecom-
munication Union. Geneva, Switzerland. [Online]. p. 2, sec. 5.1. Available:
www.itu.int/dms_pub/itu-t/oth/4B/01/T4B010000070001PDFE.pdf
[5] R. Fassler, “Meeting the challenge of power supply efficiency in regula-
tions with low power modes,” presented at the Proc. Energy Efficiency in
Domestic Appliances and Lighting (EEDAL) Conf., Coimbra, Portugal, 2013.
[Online]. Available: https://ac-dc.power.com/sites/default/files/PDFFiles/
techpapers/R_Fassler_EEDAL2013_paper_066_final.pdf
[6] InnoSwitch Family. Power Integrations. [Online]. Available: https://ac-dc
.power.com/products/innoswitch-family/
[7] 80 PLUS. (2016, Dec. 18). 80 PLUS certified power supplies and manu-
facturers. Plug Load Solutions. [Online]. Available: https://plugloadsolutions
.com/80PlusPowerSupplies.aspx
[8] U.S EPA ENERGY STAR program requirements product specification for
computers, version 6.1. ENERGY STAR. Washington, D.C. [Online]. Available:
https://www.energystar.gov/products/office_equipment/computers/partners
[9] Regulation No. 617/2013 Implementing Directive with Regard to Ecodesign
Requirements for Computers and Computer Servers, European Commission.
[10] Regulation No. 1275/2008 Implementing Directive 2005/32/EC of the
European Parliament and of the Council with Regard to Ecodesign Require-
ments for Standby and Off Mode Electric Power Consumption of Electrical
and Electronic Household and Office Equipment, Regulation No. 1275/2008.
[11] Appliance Efficiency Rulemaking, Express Terms Computers, Com-
puter Monitors, and Signage Displays, 16-AAER-02, 2016.
[12] Aggios. (2016, Apr. 25). Aggios comments: California Energy Com-
mission draft 2 workshop on computers—Technical demo. Aggios.
Irvine, CA. [Online]. Available: http://docketpublic.energy.ca.gov/
PublicDocuments/14-AAER-02/TN211230_20160425T101319_Aggios_
Comments_AGGIOS_Title_20_Workshop_2016_04_26.pdf
[13] M. Waltner. (2015, June 10). New California building efficiency stan-
dards set the stage for zero net energy homes by 2020. NRDC. [Online].
Available: www.nrdc.org/experts/meg-waltner/new-california-building-
efficiency-standards-set-stage-zero-net-energy-homes
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________
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28. 26 IEEE POWER ELECTRONICS MAGAZINE ]March 2017
about 8 W, and can fit in the palm of
one’s hand. Figure 3 shows a point-
cloud map of the team from Efficient
Power Conversion (EPC) standing at
the 2016 IEEE Applied Power Elec-
tronics Conference and Exposition
(APEC 2016) EPC booth, taken from
a Phoenix aerial drone equipped with
the PUCK. Velodyne is one of a num-
ber of companies developing small,
fast, affordable lidar systems. Oth-
ers include Quanergy, LeddarTech,
Excelitas, and SICK with new ones to
join soon.
Whileanumberofapplicationshave
been mentioned, two stand out due to
the potential to fundamentally change
how people view and move through
the world. The first is autonomous
vehicles, especially self-driving cars
(Figure 4) [8]. This is a matter of much
hype and debate, but the potential
benefits are great. Not only are there
huge potential safety and efficiency
benefits, the possible time and money
savings for ordinary citizens are just as
significant. As just one example, con-
sider that self-driving cars could solve
the last-mile problem of public trans-
portation. From a North American
point of view, this could eliminate the
de facto requirement of car ownership
for many citizens, eliminating a large
economic burden on many individuals
and families.
The driving process requires a
real-time, high-resolution 3-D map
of the surroundings to drive safely,
(a) (b)
(c) (d)
(e) (f)
100 m
100 m
Ancient
Dam
Ancient
Dam
Mound
Field
Mound
Field
Modern
Cultivation
FIG 1 Some examples of lidar applications. (a) Measuring atmospheric properties to
allow real-time compensation of an astronomical telescope [3] (photo courtesy of
Wikipedia); (b) lidar retroreflector left by Apollo 11 for measuring Earth–moon distance
to within 3 cm out of 380,000 km [4] (photo courtesy of Lunar and Planar Institute);
(c)–(f) using lidar to accurately measure elevation and discover archaeological artifacts
[5] (photos courtesy of theconversation.com).
FIG 2 The Velodyne PUCK self-contained 3-D lidar capable of
mapping 300,000 points to 3-cm accuracy each second [7].
(Image courtesy of Velodyne LiDAR.)
FIG 3 The Velodyne PUCK point-cloud image of the EPC team
at APEC 2016.
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_____________
29. March 2017 ]IEEE POWER ELECTRONICS MAGAZINE 27
efficiently, and expediently. This map requires raw data
that, in the case of a human driver, are acquired primarily
through the eyes. For an autonomous driving computer,
lidar is the ideal method to acquire these data, whether
day or night. Just as with human drivers, it operates in
conjunction with other sensors, such as radar, visual, and
ultrasonic systems, but lidar provides the most robust
and data efficient means of collecting high-resolution,
high-accuracy distance data.
The second key application is augmented reality.
Whereas virtual reality attempts to replace the surround-
ing world and convince the user that he or she is in an
environment different from his or her actual physical
environment, augmented reality enhances human senses
based on a combination of data provided by additional
sensors and possibly additional data created by people or
computer models, translated into a format that our senses
can perceive.
In modern form, the predominant vehicles for aug-
mented reality are smartphone displays (think of the game
application Pokémon GO) or goggles that project additional
data into one’s field of vision. Figure 5 shows an example of
the latter, the Microsoft Hololens, with Google Glass being
another prominent example. Today’s computing power
allows one to project data in the form of images that can
be blended in with one’s natural field of view. This technol-
ogy has many far-reaching applications. While gaming is one
obvious use, there are many others. Imagine earthquake res-
cue workers who can have precarious rubble highlighted for
their safety, or the architect who can show clients his or her
vision of a major remodeling project, or the doctor who can
assist in a surgery on another side of the globe.
Since the majority of humans perceive a 3-D space, the
projection of additional imagery into this space requires
an accurate real-time 3-D map, the key strength of lidar.
While much can be done with processing of standard cam-
era images, distances must be inferred based on one or
more images. For noncritical applications, this estimated
distance data may be adequate. Applications requiring
accurate long-range data, safety-critical applications,
or applications with less than optimal lighting use lidar
to provide direct measurement of unambiguous, high-
resolution data.
What About Power Electronics?
One might ask, what does lidar have to do with power
electronics, and why is it appearing in this magazine? The
fact is that electronics and photonics have had a close
relationship since the beginnings of electrical science [9].
For power electronics and lidar, the primary relationship
revolves around the light source and its driver. This sys-
tem is essentially a pulse-power system, and its proper
design requires fast power devices, high-current gate
drives, understanding and control of power loop parasit-
ics, high-speed current sensing, and many other topics
critical to power electronics. This will be discussed later
in this article, but first we need to understand some basic
lidar concepts.
How Does Lidar Work?
Much like its verbal forerunner, radar, the word lidar
originated as an acronym derived from light detection
FIG 4 (a) A self-driving car with lidar (photo courtesy of Wikimedia) and (b) its view of the world (image courtesy of Mapping
Ignorance).
(a) (b)
FIG 5 The Microsoft Hololens augmented reality goggles.
(Photo courtesy of Microsoft.)
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