Modern computer systems have intricate memory hierarchies that violate the intuition of a global timeline of interleaved memory accesses. In these so-called relaxed-memory systems, it can be dangerous to use intuition, specifications are universally unreliable, and the outcome of testing is both wildly nondeterministic and dependent on hardware that is getting more permissive of odd behaviour with each generation. These complications pervade the whole system, and have led to bugs in language specifications, deployed processors, compilers, and vendor-endorsed programming idioms – it is clear that current engineering practice is severely lacking.
I will describe my part of a sustained effort in the academic community to tackle these problems by applying a range of techniques, from exhaustive testing to mechanised formal specification and proof. I will focus on a vein of work with strong industrial impact: the formalisation, refinement and validation of the 2011/14/17 C and C++ concurrency design, leading to changes in the ratified international standard, and ultimately uncovering fundamental flaws that lead us to the state of the art in concurrent language specification. This work represents an essential enabling step for verification on modern concurrent systems
C Programming and Coding Standards, Learn C ProgrammingTonex
C Programming and Coding Standards. It’s all about “C” programming !
“C” is extensively used in the embedded systems software development.
Tonex Training offers “C” Programming and Coding Standards for Safety-Critical Systems. This 2-day practical course is super recommended for software engineers and programmers.
What topics are essential for C coding standards ?
Performing hazard analysis, root cause analysis,
Adopting right safety measures,
Safety-critical ISO 26262 applications,
C-language guidelines,
Software Failure Modes,
Analyzing SIL-2 Level Safety Requirements,
Applying MISRA C Compliance,
Sign up for “C” Programming Training
https://www.tonex.com/training-courses/c-programming-and-coding-standards-for-safety-critical-systems/
At the end of this lecture students should be able to;
Describe features of C programming language.
Justify the terminology related to computer programming.
Define the editing, compiling, linking, debugging stages of C programming
Recognize the basic structure of a C program
Apply comments for C programs to improve readability.
C Programming and Coding Standards, Learn C ProgrammingTonex
C Programming and Coding Standards. It’s all about “C” programming !
“C” is extensively used in the embedded systems software development.
Tonex Training offers “C” Programming and Coding Standards for Safety-Critical Systems. This 2-day practical course is super recommended for software engineers and programmers.
What topics are essential for C coding standards ?
Performing hazard analysis, root cause analysis,
Adopting right safety measures,
Safety-critical ISO 26262 applications,
C-language guidelines,
Software Failure Modes,
Analyzing SIL-2 Level Safety Requirements,
Applying MISRA C Compliance,
Sign up for “C” Programming Training
https://www.tonex.com/training-courses/c-programming-and-coding-standards-for-safety-critical-systems/
At the end of this lecture students should be able to;
Describe features of C programming language.
Justify the terminology related to computer programming.
Define the editing, compiling, linking, debugging stages of C programming
Recognize the basic structure of a C program
Apply comments for C programs to improve readability.
Installation of PC-Lint and its using in Visual Studio 2005PVS-Studio
The article is devoted to the first acquaintance with the PC-Lint 8.0 static analyzer of C++ code. The process of the tool installation and its initial setting is described.
Embedded C programming based on 8051 microcontrollerGaurav Verma
This lecture note covers the embedded 'c' programming constructs based on 8051 microcontroller. Although the same concepts can be used for other advanced microcontrollers with some modifications.
C programming slide day 01 uploadd by md abdullah al shakilZenith SVG
This Slide is about the basics of C programming. It is the first lecture on the C program. In this session, we will be able to clear the concept of :
i) Introduction
ii) Element of C
iii)Conditional Statements
This PPT is for First year engineering student,It covered all about C Programming according to Rajastha Technical University Kota.
flowchart, pseudo code, Programming Languages and Language Translators, Identifiers, Constants, Variables, Basic Data Types, Operators, Expressions, type casting, Input / Output Statement, Scope Rules and Storage classes, Preprocessor and Macro Substitution.
Lean Model-Driven Development through Model-Interpretation: the CPAL design ...Nicolas Navet
We introduce a novel Model-Driven Development (MDD) flow which aims at more simplicity, more intuitive programming, quicker turnaround time and real-time predictability by leveraging the use of model-interpretation and providing the language abstractions needed to argue about the timing correctness on a high-level. The MDD flow is built around a language called Cyber-Physical Action Language (CPAL).
CPAL serves to describe both the functional behaviour of activities (i.e., the code of the function itself) as well as the functional architecture of the system (i.e., the set of functions, how they are activated, and the data flows among the functions). CPAL is meant to support two use-cases. Firstly, CPAL is a development and design space exploration environment for CPS with main features being the formal description, the editing, graphical representation and simulation of CPS models. Secondly, CPAL is a real-time execution platform. The vision behind CPAL is that a model is executed and verified in simulation mode on a workstation and the same model can be later run on an embedded board with a timing-equivalent run-time time behaviour.
A design methodology and a language framework which contributes to providing a solid, scalable framework for developing next-generation silicon-based systems.
Installation of PC-Lint and its using in Visual Studio 2005PVS-Studio
The article is devoted to the first acquaintance with the PC-Lint 8.0 static analyzer of C++ code. The process of the tool installation and its initial setting is described.
Embedded C programming based on 8051 microcontrollerGaurav Verma
This lecture note covers the embedded 'c' programming constructs based on 8051 microcontroller. Although the same concepts can be used for other advanced microcontrollers with some modifications.
C programming slide day 01 uploadd by md abdullah al shakilZenith SVG
This Slide is about the basics of C programming. It is the first lecture on the C program. In this session, we will be able to clear the concept of :
i) Introduction
ii) Element of C
iii)Conditional Statements
This PPT is for First year engineering student,It covered all about C Programming according to Rajastha Technical University Kota.
flowchart, pseudo code, Programming Languages and Language Translators, Identifiers, Constants, Variables, Basic Data Types, Operators, Expressions, type casting, Input / Output Statement, Scope Rules and Storage classes, Preprocessor and Macro Substitution.
Lean Model-Driven Development through Model-Interpretation: the CPAL design ...Nicolas Navet
We introduce a novel Model-Driven Development (MDD) flow which aims at more simplicity, more intuitive programming, quicker turnaround time and real-time predictability by leveraging the use of model-interpretation and providing the language abstractions needed to argue about the timing correctness on a high-level. The MDD flow is built around a language called Cyber-Physical Action Language (CPAL).
CPAL serves to describe both the functional behaviour of activities (i.e., the code of the function itself) as well as the functional architecture of the system (i.e., the set of functions, how they are activated, and the data flows among the functions). CPAL is meant to support two use-cases. Firstly, CPAL is a development and design space exploration environment for CPS with main features being the formal description, the editing, graphical representation and simulation of CPS models. Secondly, CPAL is a real-time execution platform. The vision behind CPAL is that a model is executed and verified in simulation mode on a workstation and the same model can be later run on an embedded board with a timing-equivalent run-time time behaviour.
A design methodology and a language framework which contributes to providing a solid, scalable framework for developing next-generation silicon-based systems.
asp.net using c# notes sem 5 ( we-it tutorials ).
Review of .NET frameworks, Introduction to C#, Variables and expressions, flow controls, functions, debugging and error handling, OOPs with C#, Defining classes and class members.
Assembly, Components of Assembly, Private and Shared Assembly, Garbage Collector, JIT compiler. Namespaces Collections, Delegates and Events. Introduction to ASP.NET 4: Microsoft.NET framework, ASP.NET lifecycle. CSS: Need of CSS, Introduction to CSS, Working with CSS with visual developer.
ASP.NET server controls: Introduction, How to work with button controls, Textboxes, Labels, checkboxes and radio buttons, list controls and other web server controls, web.config and global.asax files. Programming ASP.NET web pages: Introduction, data types and variables, statements, organizing code, object oriented basics.
Validation Control: Introduction, basic validation controls, validation techniques, using advanced validation controls. State Management: Using view state, using session state, using application state, using cookies and URL encoding. Master Pages: Creating master pages, content pages, nesting master pages, accessing master page controls from a content page. Navigation: Introduction to use the site navigation, using site navigation controls.
Databases: Introduction, using SQL data sources, GridView Control, DetailsView and FormView Controls, ListView and DataPager controls, Using object datasources. ASP.NET Security: Authentication, Authorization, Impersonation, ASP.NET provider model
LINQ: Operators, implementations, LINQ to objects,XML,ADO.NET, Query Syntax. ASP.NET Ajax: Introducing AJAX, Working of AJAX, Using ASP.NET AJAX
server controls. JQuery: Introduction to JQuery, JQuery UI Library, Working of JQuery
Highlighted notes of article while studying Concurrent Data Structures, CSE:
The Concurrency Challenge
Wen-mei W. Hwu, Kurt Keutzer, Tim Mattson
IEEE Design and Test
The Concurrency Challenge
July-August 2008, pp. 312-320, vol. 25
DOI Bookmark: 10.1109/MDT.2008.110
Wen-mei Hwu is a professor and
the Sanders-AMD Endowed Chair of
Electrical and Computer Engineering
at the University of Illinois at Urbana-
Champaign. His research interests
include architecture and compilation for parallel-
computing systems. He has a BS in electrical
engineering from National Taiwan University, and
a PhD in computer science from the University of
California, Berkeley. He is a Fellow of both the IEEE
and the ACM.
Kurt Keutzer is a professor of
electrical engineering and computer
science at the University of California,
Berkeley and a principal investigator
in UC Berkeley’s Universal Parallel
Computing Research Center. His research focuses
on the design and programming of ICs. He has a BS
in mathematics from Maharishi International University, and an MS a PhD in computer science from
Indiana University, Bloomington. He is a Fellow of the
IEEE and a member of the ACM.
Timothy G. Mattson is a principal
engineer in the Applications Research
Laboratory at Intel. He research inter-
ests focus on performance modeling
for future multicore microprocessors
and how different programming models map onto
these systems. He has a BS in chemistry from the
University of California, Riverside; an MS in chemistry
from the university of California, Santa Cruz; and a PhD in theoretical chemistry from the University of
California, Santa Cruz. He is a member of the
American Association for the Advancement of Sci-
ence (AAAS).
https://ieeexplore.ieee.org/document/4584454
(Costless) Software Abstractions for Parallel ArchitecturesJoel Falcou
Performing large, intensive or non-trivial computing on array like data structures is one of the most common task in scientific computing, video game development and other fields. This matter of fact is backed up by the large number of tools, languages and libraries to perform such tasks. If we restrict ourselves to C++ based solutions, more than a dozen such libraries exists from BLAS/LAPACK C++ binding to template meta-programming based Blitz++ or Eigen. If all of these libraries provide good performance or good abstraction, none of them seems to fit the need of so many different user types.
Moreover, as parallel system complexity grows, the need to maintain all those components quickly become unwieldy. This talk explores various software design techniques - like Generative Programming, MetaProgramming and Generic Programming - and their application to the implementation of a parallel computing librariy in such a way that:
- abstraction and expressiveness are maximized - cost over efficiency is minimized
We'll skim over various applications and see how they can benefit from such tools. We will conclude by discussing what lessons were learnt from this kind of implementation and how those lessons can translate into new directions for the language itself.
CS266 Software Reverse Engineering (SRE) Reversing and Patching Wintel Machine Code
Teodoro (Ted) Cipresso, teodoro.cipresso@sjsu.edu
Department of Computer Science
San José State University
Spring 2015
Developing Real-Time Systems on Application ProcessorsToradex
Guaranteeing real-time and deterministic behavior on SoC-based systems can be challenging. In this blog post, we offer three approaches to add real-time control to systems that use a SoC running a feature-rich OS such as Linux. https://www.toradex.com/blog/developing-real-time-systems-on-application-processors
HIS 2017 David Oswald- Your car is not a safe box - breaking automotive keyle...jamieayre
In recent years, the security analysis of automotive systems has gained significant attention, including attacks on the vehicle CAN bus (with severe safety implications) and the immobilizer. In this talk, we present our new work on the insecurity of automotive remote keyless entry (RKE) systems, i.e., the part of the car key that allows to wirelessly open/close the doors and the trunk. We demonstrate different attacks on two extremely widespread RKE systems: the scheme used by the VW group (Volkswagen, Seat, Skoda, Audi) and the Hitag2 system (employed by a number of vendors including Alfa Romeo, Peugeot, Lancia, Opel, Renault, and Ford among others). The talk concludes with a discussion of these attacks in the wider context of automotive security and an outline of potential countermeasures.
HIS 2017 Paul Sherwood- towards trustable software jamieayre
Many of us in the technology industries are challenged to deliver increasingly complex systems at lower cost, under time pressure, while guaranteeing safety and security.
Inevitably this pressure leads to reliance on third-party software, both proprietary and FOSS. But most organisations are so busy with their own engineering that they struggle to track what's happening in their supply chains.
This talk will explore some systemic problems (commercial, practical and philosophical, as well as technical) that responsible organisations and technical leads face when combining multi-party code in environments where the whole target is expected to be safe, secure or both. An evidence-based approach to solutions will be presented, as a framework for 'trustable software engineering'.
HIS 2017 Robert Martin- assured software a journey and discussion-finaljamieayre
Software is playing a pivotal role in most enterprises, whether they realize it or not, and with the advent of Internet of Things (IoT) and our collective love affair with automation, optimization, and “smart” devices that role is only going to increase. The dependence on connected software needs to be met with a strong understanding of the risks that this dependence presents and the will to manage those risks so our enterprises can continue to benefit from these advancements as they power our corporations and the products to new levels of efficiency, versatility, and profitability. This talk will canvas the world of issues that underlie unsafe, insecure, and unreliable software and survey and discuss the various items of knowledge and insights available to conquer them, manage them, and inform our purchasing decisions. By refusing to allow insecure, unreliable, and unsafe software to impact the key capabilities driving our enterprises and the technology we use, businesses of all types can directly address their hidden software induced liabilities, hazards, and threats. Gaining confidence about our partners and suppliers ability to similarly address these concerns will also be addressed as it is becoming a major part of our ongoing journey towards software worthy of trust.
HIS 2017 Marie Moe- Unpatchable-Living with a Vulnerable Implanted Devicejamieayre
Gradually we are all becoming more and more dependent on connected technology; we will be able to live longer with an increased quality of life due to medical devices and sensors integrated into our body. However, our dependence on technology grows faster than our ability to secure it, and a security failure of a medical device can have fatal consequences. Marie's life depends on the functioning of a medical device, a pacemaker that generates each and every beat of her heart. This talk is about Marie's personal experience with being the host of a vulnerable medical implant, and why she decided to start a hacking project, investigating the security of her own personal critical infrastructure.
HIS 2017 Jonathan Pallant- Delivering quality, time after timejamieayre
In the technology business for nearly 60 years, Cambridge Consultants produce software for their clients on around 300 different projects every year. The right kind of process is critical to producing software at this scale – one designed to avoid that 'long tail' of bug fixing that so often affects software projects. It cannot be static either; as technologies tools and expectations adapt and change, so too must your software process. In this talk, Jonathan Pallant walks through an example of a 'typical' project to illustrate the various tools, processes and techniques that help Cambridge Consultants deliver quality embedded software, time after time. The talk will tie together topics such as continuous integration, automated testing, use of virtual machines for development, semantic versioning, code templates, static analysis, and the use of new systems languages such as Rust.
HIS 2017 Peter Ladkin- Rigorous-Assurance Points in Software Developmentjamieayre
Almost fifty years ago, a dependability crisis in software was noted by an international meeting of computer scientists in Garmisch-Partenkirchen. Stored-program computers were just a couple of decades old. We are now approaching the seventieth anniversary of stored-program computers, and they are ubiquitous. In the half-century since the Garmisch meeting, the technology of software dependability has advanced immeasurably. But much of it remains unused in everyday software development. Like most engineered artifacts, software is built to some purpose. That purpose belongs to the “documentation” of the artifact, as do assurances that the built object is fit for the purpose. The dependability of the software depends essentially upon its purpose, and thereby its documentation. A number of us are concerned that standards for critical software development, for example IEC 61508-3, lag years, even decades, behind the state of the art. In 2010, with the help of some eminent colleagues, I formulated a collection of 26 points at which objective properties of the software and documentation could be rigorously assured using industrially-mature techniques, and often were not. None of them appeared in IEC 61508-3. After seven years of discussion, including further research on industrial maturity commissioned from Bernd Sieker, the German National Committee for functional safety of computer-based systems formulated a proposal to be presented to the IEC for a standards document based on those assurance points. I introduce those techniques in this talk.
HIS 2017 Dewi Daniels- bridging the gap between manned and unmannedjamieayre
The last few years have seen rapid growth in the civil market for Unmanned Air Vehicles (UAVs). Callen-Lenz has been at the forefront of both UAV operations, including Beyond Visual Line of Sight (BVLOS), and the development of reliable flight control systems through our subsidiary, SkyCircuits Ltd.
Commercial UAVs offer high levels of functionality at low cost, but most have been designed to consumer standards that do not address issues such as reliability, system redundancy or design integrity within their flight control system designs.
If UAVs are going to be routinely used for operations in non-segregated airspace under BVLOS conditions, they will need to demonstrate a comparable level of safety to manned aircraft; this is to ensure safe autonomous operations that can be relied upon to provide separation from other airspace users (manned and unmanned).
Key to this safe and reliable operation will be the flight control system used to command and control the UAV, which will itself depend on software that will need to be developed to relevant aerospace standards.
Callen-Lenz also see potential for cross-fertilisation between the manned and unmanned domains. For example, imagine a manned aircraft that is as easy to fly as a drone, and can even operate autonomously.
This session will present how Callen-Lenz is developing a family of autopilots designed to meet the objectives of DO-178C/ED-12C up to and including Level A. These will underpin safe reliable UAV operations in BVLOS conditions, but also have the appropriate safety and functionality to support manned flight in both conventional aircraft and in emerging domains such as personal air vehicles.
HIS 2017 Roderick chapman- Secure Updates for Embedded Systemsjamieayre
Your smartphone (and some brands of car) appear to be able to update their operating system and applications securely, remotely and wirelessly. Can the same capability be brought to deeply embedded, critical systems? The benefits are numerous, most notably bringing the potential to upgrade the capability of systems 'in the field' without need for a physical recall to the factory or a maintenance facility.
This talk will outline the technologies behind the scenes of such a 'code signing' infrastructure, including the cryptographic primitives and protocols needed to assure the confidentiality, integrity and authentication of such updates. An implementation sets some serious challenges, including the need to run on small 'bare metal' target machines, atomicity of the update process, and the need to meet cryptographic and technical standards set by GCHQ. We will also consider the need for key generation and distribution, and provision of a certificate authority to support such a scheme
SOCRadar Research Team: Latest Activities of IntelBrokerSOCRadar
The European Union Agency for Law Enforcement Cooperation (Europol) has suffered an alleged data breach after a notorious threat actor claimed to have exfiltrated data from its systems. Infamous data leaker IntelBroker posted on the even more infamous BreachForums hacking forum, saying that Europol suffered a data breach this month.
The alleged breach affected Europol agencies CCSE, EC3, Europol Platform for Experts, Law Enforcement Forum, and SIRIUS. Infiltration of these entities can disrupt ongoing investigations and compromise sensitive intelligence shared among international law enforcement agencies.
However, this is neither the first nor the last activity of IntekBroker. We have compiled for you what happened in the last few days. To track such hacker activities on dark web sources like hacker forums, private Telegram channels, and other hidden platforms where cyber threats often originate, you can check SOCRadar’s Dark Web News.
Stay Informed on Threat Actors’ Activity on the Dark Web with SOCRadar!
A Comprehensive Look at Generative AI in Retail App Testing.pdfkalichargn70th171
Traditional software testing methods are being challenged in retail, where customer expectations and technological advancements continually shape the landscape. Enter generative AI—a transformative subset of artificial intelligence technologies poised to revolutionize software testing.
Code reviews are vital for ensuring good code quality. They serve as one of our last lines of defense against bugs and subpar code reaching production.
Yet, they often turn into annoying tasks riddled with frustration, hostility, unclear feedback and lack of standards. How can we improve this crucial process?
In this session we will cover:
- The Art of Effective Code Reviews
- Streamlining the Review Process
- Elevating Reviews with Automated Tools
By the end of this presentation, you'll have the knowledge on how to organize and improve your code review proces
Accelerate Enterprise Software Engineering with PlatformlessWSO2
Key takeaways:
Challenges of building platforms and the benefits of platformless.
Key principles of platformless, including API-first, cloud-native middleware, platform engineering, and developer experience.
How Choreo enables the platformless experience.
How key concepts like application architecture, domain-driven design, zero trust, and cell-based architecture are inherently a part of Choreo.
Demo of an end-to-end app built and deployed on Choreo.
Innovating Inference - Remote Triggering of Large Language Models on HPC Clus...Globus
Large Language Models (LLMs) are currently the center of attention in the tech world, particularly for their potential to advance research. In this presentation, we'll explore a straightforward and effective method for quickly initiating inference runs on supercomputers using the vLLM tool with Globus Compute, specifically on the Polaris system at ALCF. We'll begin by briefly discussing the popularity and applications of LLMs in various fields. Following this, we will introduce the vLLM tool, and explain how it integrates with Globus Compute to efficiently manage LLM operations on Polaris. Attendees will learn the practical aspects of setting up and remotely triggering LLMs from local machines, focusing on ease of use and efficiency. This talk is ideal for researchers and practitioners looking to leverage the power of LLMs in their work, offering a clear guide to harnessing supercomputing resources for quick and effective LLM inference.
Multiple Your Crypto Portfolio with the Innovative Features of Advanced Crypt...Hivelance Technology
Cryptocurrency trading bots are computer programs designed to automate buying, selling, and managing cryptocurrency transactions. These bots utilize advanced algorithms and machine learning techniques to analyze market data, identify trading opportunities, and execute trades on behalf of their users. By automating the decision-making process, crypto trading bots can react to market changes faster than human traders
Hivelance, a leading provider of cryptocurrency trading bot development services, stands out as the premier choice for crypto traders and developers. Hivelance boasts a team of seasoned cryptocurrency experts and software engineers who deeply understand the crypto market and the latest trends in automated trading, Hivelance leverages the latest technologies and tools in the industry, including advanced AI and machine learning algorithms, to create highly efficient and adaptable crypto trading bots
Quarkus Hidden and Forbidden ExtensionsMax Andersen
Quarkus has a vast extension ecosystem and is known for its subsonic and subatomic feature set. Some of these features are not as well known, and some extensions are less talked about, but that does not make them less interesting - quite the opposite.
Come join this talk to see some tips and tricks for using Quarkus and some of the lesser known features, extensions and development techniques.
Experience our free, in-depth three-part Tendenci Platform Corporate Membership Management workshop series! In Session 1 on May 14th, 2024, we began with an Introduction and Setup, mastering the configuration of your Corporate Membership Module settings to establish membership types, applications, and more. Then, on May 16th, 2024, in Session 2, we focused on binding individual members to a Corporate Membership and Corporate Reps, teaching you how to add individual members and assign Corporate Representatives to manage dues, renewals, and associated members. Finally, on May 28th, 2024, in Session 3, we covered questions and concerns, addressing any queries or issues you may have.
For more Tendenci AMS events, check out www.tendenci.com/events
Gamify Your Mind; The Secret Sauce to Delivering Success, Continuously Improv...Shahin Sheidaei
Games are powerful teaching tools, fostering hands-on engagement and fun. But they require careful consideration to succeed. Join me to explore factors in running and selecting games, ensuring they serve as effective teaching tools. Learn to maintain focus on learning objectives while playing, and how to measure the ROI of gaming in education. Discover strategies for pitching gaming to leadership. This session offers insights, tips, and examples for coaches, team leads, and enterprise leaders seeking to teach from simple to complex concepts.
Exploring Innovations in Data Repository Solutions - Insights from the U.S. G...Globus
The U.S. Geological Survey (USGS) has made substantial investments in meeting evolving scientific, technical, and policy driven demands on storing, managing, and delivering data. As these demands continue to grow in complexity and scale, the USGS must continue to explore innovative solutions to improve its management, curation, sharing, delivering, and preservation approaches for large-scale research data. Supporting these needs, the USGS has partnered with the University of Chicago-Globus to research and develop advanced repository components and workflows leveraging its current investment in Globus. The primary outcome of this partnership includes the development of a prototype enterprise repository, driven by USGS Data Release requirements, through exploration and implementation of the entire suite of the Globus platform offerings, including Globus Flow, Globus Auth, Globus Transfer, and Globus Search. This presentation will provide insights into this research partnership, introduce the unique requirements and challenges being addressed and provide relevant project progress.
First Steps with Globus Compute Multi-User EndpointsGlobus
In this presentation we will share our experiences around getting started with the Globus Compute multi-user endpoint. Working with the Pharmacology group at the University of Auckland, we have previously written an application using Globus Compute that can offload computationally expensive steps in the researcher's workflows, which they wish to manage from their familiar Windows environments, onto the NeSI (New Zealand eScience Infrastructure) cluster. Some of the challenges we have encountered were that each researcher had to set up and manage their own single-user globus compute endpoint and that the workloads had varying resource requirements (CPUs, memory and wall time) between different runs. We hope that the multi-user endpoint will help to address these challenges and share an update on our progress here.
Designing for Privacy in Amazon Web ServicesKrzysztofKkol1
Data privacy is one of the most critical issues that businesses face. This presentation shares insights on the principles and best practices for ensuring the resilience and security of your workload.
Drawing on a real-life project from the HR industry, the various challenges will be demonstrated: data protection, self-healing, business continuity, security, and transparency of data processing. This systematized approach allowed to create a secure AWS cloud infrastructure that not only met strict compliance rules but also exceeded the client's expectations.
Field Employee Tracking System| MiTrack App| Best Employee Tracking Solution|...informapgpstrackings
Keep tabs on your field staff effortlessly with Informap Technology Centre LLC. Real-time tracking, task assignment, and smart features for efficient management. Request a live demo today!
For more details, visit us : https://informapuae.com/field-staff-tracking/
Prosigns: Transforming Business with Tailored Technology SolutionsProsigns
Unlocking Business Potential: Tailored Technology Solutions by Prosigns
Discover how Prosigns, a leading technology solutions provider, partners with businesses to drive innovation and success. Our presentation showcases our comprehensive range of services, including custom software development, web and mobile app development, AI & ML solutions, blockchain integration, DevOps services, and Microsoft Dynamics 365 support.
Custom Software Development: Prosigns specializes in creating bespoke software solutions that cater to your unique business needs. Our team of experts works closely with you to understand your requirements and deliver tailor-made software that enhances efficiency and drives growth.
Web and Mobile App Development: From responsive websites to intuitive mobile applications, Prosigns develops cutting-edge solutions that engage users and deliver seamless experiences across devices.
AI & ML Solutions: Harnessing the power of Artificial Intelligence and Machine Learning, Prosigns provides smart solutions that automate processes, provide valuable insights, and drive informed decision-making.
Blockchain Integration: Prosigns offers comprehensive blockchain solutions, including development, integration, and consulting services, enabling businesses to leverage blockchain technology for enhanced security, transparency, and efficiency.
DevOps Services: Prosigns' DevOps services streamline development and operations processes, ensuring faster and more reliable software delivery through automation and continuous integration.
Microsoft Dynamics 365 Support: Prosigns provides comprehensive support and maintenance services for Microsoft Dynamics 365, ensuring your system is always up-to-date, secure, and running smoothly.
Learn how our collaborative approach and dedication to excellence help businesses achieve their goals and stay ahead in today's digital landscape. From concept to deployment, Prosigns is your trusted partner for transforming ideas into reality and unlocking the full potential of your business.
Join us on a journey of innovation and growth. Let's partner for success with Prosigns.
How Recreation Management Software Can Streamline Your Operations.pptxwottaspaceseo
Recreation management software streamlines operations by automating key tasks such as scheduling, registration, and payment processing, reducing manual workload and errors. It provides centralized management of facilities, classes, and events, ensuring efficient resource allocation and facility usage. The software offers user-friendly online portals for easy access to bookings and program information, enhancing customer experience. Real-time reporting and data analytics deliver insights into attendance and preferences, aiding in strategic decision-making. Additionally, effective communication tools keep participants and staff informed with timely updates. Overall, recreation management software enhances efficiency, improves service delivery, and boosts customer satisfaction.
Providing Globus Services to Users of JASMIN for Environmental Data AnalysisGlobus
JASMIN is the UK’s high-performance data analysis platform for environmental science, operated by STFC on behalf of the UK Natural Environment Research Council (NERC). In addition to its role in hosting the CEDA Archive (NERC’s long-term repository for climate, atmospheric science & Earth observation data in the UK), JASMIN provides a collaborative platform to a community of around 2,000 scientists in the UK and beyond, providing nearly 400 environmental science projects with working space, compute resources and tools to facilitate their work. High-performance data transfer into and out of JASMIN has always been a key feature, with many scientists bringing model outputs from supercomputers elsewhere in the UK, to analyse against observational or other model data in the CEDA Archive. A growing number of JASMIN users are now realising the benefits of using the Globus service to provide reliable and efficient data movement and other tasks in this and other contexts. Further use cases involve long-distance (intercontinental) transfers to and from JASMIN, and collecting results from a mobile atmospheric radar system, pushing data to JASMIN via a lightweight Globus deployment. We provide details of how Globus fits into our current infrastructure, our experience of the recent migration to GCSv5.4, and of our interest in developing use of the wider ecosystem of Globus services for the benefit of our user community.
How to Position Your Globus Data Portal for Success Ten Good PracticesGlobus
Science gateways allow science and engineering communities to access shared data, software, computing services, and instruments. Science gateways have gained a lot of traction in the last twenty years, as evidenced by projects such as the Science Gateways Community Institute (SGCI) and the Center of Excellence on Science Gateways (SGX3) in the US, The Australian Research Data Commons (ARDC) and its platforms in Australia, and the projects around Virtual Research Environments in Europe. A few mature frameworks have evolved with their different strengths and foci and have been taken up by a larger community such as the Globus Data Portal, Hubzero, Tapis, and Galaxy. However, even when gateways are built on successful frameworks, they continue to face the challenges of ongoing maintenance costs and how to meet the ever-expanding needs of the community they serve with enhanced features. It is not uncommon that gateways with compelling use cases are nonetheless unable to get past the prototype phase and become a full production service, or if they do, they don't survive more than a couple of years. While there is no guaranteed pathway to success, it seems likely that for any gateway there is a need for a strong community and/or solid funding streams to create and sustain its success. With over twenty years of examples to draw from, this presentation goes into detail for ten factors common to successful and enduring gateways that effectively serve as best practices for any new or developing gateway.
Software Engineering, Software Consulting, Tech Lead.
Spring Boot, Spring Cloud, Spring Core, Spring JDBC, Spring Security,
Spring Transaction, Spring MVC,
Log4j, REST/SOAP WEB-SERVICES.
2. It is time for mechanised industrial standards
2
Specifications are written in English prose: this is insufficient
Write mechanised specs instead (formal, machine-readable, executable)
Designers can scrutinise, research questions can be identified
Mechanised specs enable verification for secure systems
Writing mechanised specifications is practical now
5. Multiple threads communicate through a shared memory
Most systems use a form of shared memory concurrency:
Shared memory concurrency
5
…Thread Thread
Shared memory
…
6. An example programming idiom
6
…Thread 1 Thread 2
data, flag, r
…
Thread 1:
data = 1;
flag = 1;
Thread 2:
while (flag==0)
{};
r = data;
data, flag, r initially zero
In the end r==1
Sequential consistency:
simple interleaving of
concurrent accesses
Reality: more complex
7. An example programming idiom
7
…Thread 1 Thread 2
data, flag, r
…
Thread 1:
data = 1;
flag = 1;
Thread 2:
while (flag==0)
{};
r = data;
data, flag, r initially zero
In the end r==1
Sequential consistency:
simple interleaving of
concurrent accesses
Reality: more complex
8. Memory is slow, so it is optimised (buffers, caches, reordering…)
e.g. IBM’s machines allow reordering of unrelated writes
(so do compilers,ARM, Nvidia…)
Sometimes, in the end r==0, a relaxed behaviour
Many other behaviours like this, some far more subtle, leading to trouble
Relaxed concurrency
8
Thread 1:
data = 1;
flag = 1;
Thread 2:
while (flag==0)
{};
r = data;
data, flag, r initially zero
In the end r==1
9. Memory is slow, so it is optimised (buffers, caches, reordering…)
e.g. IBM’s machines allow reordering of unrelated writes
(so do compilers,ARM, Nvidia…)
Sometimes, in the end r==0, a relaxed behaviour
Many other behaviours like this, some far more subtle, leading to trouble
Relaxed concurrency
9
Thread 1:
flag = 1;
data = 1;
Thread 2:
while (flag==0)
{};
r = data;
data, flag, r initially zero
In the end r==1
10. Relaxed behaviour leads to problems
10
Power/ARM processors:
unintended relaxed behaviour
observable on shipped machines
[AMSS10]
Bugs in deployed processors
Many bugs in compilers
Bugs in language specifications
Bugs in operating systems
11. Relaxed behaviour leads to problems
11
Errors in key compilers (GCC,
LLVM): compiled programs could
behave outside of spec.
[MPZN13, CV16]
Bugs in deployed processors
Many bugs in compilers
Bugs in language specifications
Bugs in operating systems
12. Relaxed behaviour leads to problems
12
The C and C++ standards had
bugs that made unintended
behaviour allowed.
More on this later.
[BOS+11, BMN+15]
Bugs in deployed processors
Many bugs in compilers
Bugs in language specifications
Bugs in operating systems
13. Relaxed behaviour leads to problems
13
Confusion among operating
system engineers leads to
bugs in the Linux kernel
[McK11, SMO+12]
Bugs in deployed processors
Many bugs in compilers
Bugs in language specifications
Bugs in operating systems
14. Relaxed behaviour leads to problems
14
Bugs in deployed processors
Many bugs in compilers
Bugs in language specifications
Bugs in operating systems
Current engineering practice is severely lacking!
15. Vague specifications are at fault
15
Relaxed behaviours are subtle,
difficult to test for and often
unexpected, yet allowed for
performance
Specifications try to define what
is allowed, but English prose is
untestable, ambiguous, and hides
errors
16. A diverse and continuing effort
16
Build mechanised executable
formal models of specifications
[AFI+09,BOS+11,BDW16]
[FGP+16,LDGK08,OSP09]
[FSP+17]
Modelling of hardware and languages
Simulation tools and reasoning principles
Empirical testing of current hardware
Verification of language design goals
Test and verify compilers
Feedback to industry: specs and test suites
17. A diverse and continuing effort
17
Provide tools to simulate the
formal models, to explain their
behaviours to non-experts
Provide reasoning principles to
help in the verification of code
[BOS+11,SSP+,BDG13]
Modelling of hardware and languages
Simulation tools and reasoning principles
Empirical testing of current hardware
Verification of language design goals
Test and verify compilers
Feedback to industry: specs and test suites
18. A diverse and continuing effort
18
Run a battery of tests to
understand the observable
behaviour of the system and
check it against the model
[AMSS’11]
Modelling of hardware and languages
Simulation tools and reasoning principles
Empirical testing of current hardware
Verification of language design goals
Test and verify compilers
Feedback to industry: specs and test suites
19. A diverse and continuing effort
19
Explicitly stated design goals
should be proved to hold
[BMN+15]
Modelling of hardware and languages
Simulation tools and reasoning principles
Empirical testing of current hardware
Verification of language design goals
Test and verify compilers
Feedback to industry: specs and test suites
20. A diverse and continuing effort
20
Test to find the relaxed
behaviours introduced by
compilers and verify that
optimisations are correct
[MPZN13, CV16]
Modelling of hardware and languages
Simulation tools and reasoning principles
Empirical testing of current hardware
Verification of language design goals
Test and verify compilers
Feedback to industry: specs and test suites
21. A diverse and continuing effort
21
Specifications should be fixed
when problems are found
Test suites can ensure
conformance to formal models
[B11]
Modelling of hardware and languages
Simulation tools and reasoning principles
Empirical testing of current hardware
Verification of language design goals
Test and verify compilers
Feedback to industry: specs and test suites
22. A diverse and continuing effort
22
Modelling of hardware and languages
Simulation tools and reasoning principles
Empirical testing of current hardware
Verification of language design goals
Test and verify compilers
Feedback to industry: specs and test suites
I will describe my part:
25. The medium for system implementation
Defined by WG14 and WG21 of the International Standards Organisation
The ’11, ’14 and ‘17 revisions define relaxed memory behaviour
I worked with WG21, formalising and improving their concurrency design
C and C++
25
26. The medium for system implementation
Defined by WG14 and WG21 of the International Standards Organisation
The ’11, ’14 and ‘17 revisions define relaxed memory behaviour
We worked with the ISO, formalising and improving their concurrency design
C and C++
26
27. C++11 concurrency design
A contract with the programmer: they must avoid data races,
two threads competing for simultaneous access to a single variable
Beware:
Violate the contract and the compiler is free to allow anything: catch fire!
27
Thread 1:
data = 1;
Thread 2:
r = data;
data initially zero
28. C++11 concurrency design
A contract with the programmer: they must avoid data races,
two threads competing for simultaneous access to a single variable
Beware:
Violate the contract and the compiler is free to allow anything: catch fire!
28
Thread 1:
data = 1;
Thread 2:
r = data;
data initially zero
29. C++11 concurrency design
A contract with the programmer: they must avoid data races,
two threads competing for simultaneous access to a single variable
Beware:
Violate the contract and the compiler is free to allow anything: catch fire!
Atomics are excluded from the requirement, and can order non-atomics,
preventing simultaneous access and races
29
Thread 1:
data = 1;
Thread 2:
r = data;
data initially zero
30. C++11 concurrency design
A contract with the programmer: they must avoid data races,
two threads competing for simultaneous access to a single variable
Beware:
Violate the contract and the compiler is free to allow anything: catch fire!
Atomics are excluded from the requirement, and can order non-atomics,
preventing simultaneous access and races
30
Thread 1:
data = 1;
flag = 1;
Thread 2:
while (flag==0)
{};
r = data;
data, r, atomic flag, initially zero
31. Design goals in the standard
31
The design is complex but the standard claims a powerful simplification:
C++11/14: §1.10p21
It can be shown that programs that correctly use mutexes and
memory_order_seq_cst operations to prevent all data races and use no
other synchronization operations behave [according to] “sequential
consistency”.
This is the central design goal of the model, called DRF-SC
32. 32
Compilers like GCC, LLVM map C/C++ to pieces of machine code
C/C++ Power ARM x86
Load acquire ld; cmp; bc; isync ldr; dmb MOV (from memory)
Implicit design goals
Each mapping should preserve the behaviour of the original program
Power ARMx86
C/C++11
33. 33
A mechanised formal model, close to the standard text
In total, several thousand lines of Lem [MOG+14]
We formalised a draft of the standard
C++11 standard §1.10p12:
An evaluation A happens before an
evaluation B if:
• A is sequenced before B, or
• A inter-thread happens before B.
The implementation shall ensure that no
program execution demonstrates a cycle in
the “happens before” relation.
The corresponding formalisation:
let happens_before sb ithb = sb ∪ ithb
let consistent_hb hb =
isIrreflexive (transitiveClosure hb)
34. Issues were discussed in N-papers and Defect Reports
Communication with WG21 and WG14
4/3/2016 3057: Explicit Initializers for Atomics
http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2010/n3057.html 1/5
Explicit Initializers for Atomics
ISO/IEC JTC1 SC22 WG21 N3057 = 10-0047 - 2010-03-11
Paul E. McKenney, paulmck@linux.vnet.ibm.com
Mark Batty, mjb220@cl.cam.ac.uk
Clark Nelson, clark.nelson@intel.com
N.M. Maclaren, nmm1@cam.ac.uk
Hans Boehm, hans.boehm@hp.com
Anthony Williams, anthony@justsoftwaresolutions.co.uk
Peter Dimov, pdimov@mmltd.net
Lawrence Crowl, crowl@google.com, Lawrence@Crowl.org
Introduction
Mark Batty recently undertook a partial formalization of the C++ memory model, which Mark
summarized in N2955. This paper summarizes the discussions on Mark's paper, both verbal and
email, recommending appropriate actions for the Library Working Group. Core issues are dealt with
in a companion N3074 paper.
This paper is based on N3045, and has been updated to reflect discussions in the Concurrency
subgroup of the Library Working Group in Pittsburgh. This paper also carries the C-language side of
N3040, which was also discussed in the Concurrency subgroup of the Library Working Group in
Pittsburgh.
Library Issues
Library Issue 1: 29.3p1 Limits to Memory-Order Relaxation (Non-Normative)
Add a note stating that memory_order_relaxed operations must maintain indivisibility, as described
in the discussion of 1.10p4. This must be considered in conjunction with the resolution to LWG 1151,
which is expected to be addressed by Hans Boehm in N3040.
Library Issue 2: 29.3p11 Schedulers, Loops, and Atomics (Normative)
The second sentence of this paragraph, “Implementations shall not move an atomic operation out of
an unbounded loop”, does not add anything to the first sentence, and, worse, can be interpreted as
restricting the meaning of the first sentence. This sentence should therefore be deleted. The Library
Working Group discussed this change during the Santa Cruz meeting in October 2009, and agreed
with this deletion.
Library Issue 3: 29.5.1 Uninitialized Atomics and C/C++ Compatibility
(Normative)
This topic was the subject of a spirited discussion among a subset of the participants in the C/C++-
compatibility effort this past October and November.
Unlike C++, C has no mechanism to force a given variable to be initialized. Therefore, if C++ atomics
are going to be compatible with those of C, either C++ needs to tolerate uninitialized atomic objects,
or C needs to require that all atomic objects be initialized. There are a number of cases to consider:
35. Major problems fixed, key properties verified
35
DRF-SC:
The central design goal, was false, the standard permitted too much
Fixed the model and then proved (in HOL4) that the goal is now true
Fixes were incorporated, pre-ratification, and are in C++11/14
Compilation mappings:
Efficient x86, Power mappings are sound [BOS+11,BMO+12,SMO+12]
Reasoning:
Developed a reasoning principle for proving programs correct [BDO13]
36. Timing was everything
36
Achieved direct impact on the standard
Making this work was partly a social problem
C++11 was a major revision, so the ISO was receptive to change
But…
37. A fundamental problem uncovered
37
// Thread 1
r1 = x;
if(r1==1) y = 1;
// Thread 2
r2 = y;
if(r2==1) x = 1;
x, y, r1, r2 initially zero
Can we observe r1==1, r2==1 at the end?
38. The write of y is dependent on the read of x
The write of x is dependent on the read of y
This will never occur in compiled code, and ought to be forbidden
“[ Note: […] However, implementations should not allow such behavior. — end note ]”
The ISO: notes carry no force, and “should” imposes no constraint
38
// Thread 1
r1 = x;
if(r1==1) y = 1;
// Thread 2
r2 = y;
if(r2==1) x = 1;
x, y, r1, r2 initially zero
Can we observe r1==1, r2==1 at the end?
A fundamental problem uncovered
39. The write of y is dependent on the read of x
The write of x is dependent on the read of y
This will never occur in compiled code, and ought to be forbidden
“[ Note: […] However, implementations should not allow such behavior. — end note ]”
The ISO: notes carry no force, and “should” imposes no constraint
39
// Thread 1
r1 = x;
if(r1==1) y = 1;
// Thread 2
r2 = y;
if(r2==1) x = 1;
x, y, r1, r2 initially zero
Can we observe r1==1, r2==1 at the end?
A fundamental problem uncovered
40. The write of y is dependent on the read of x
The write of x is dependent on the read of y
1/1 never occurs in compiled code, and ought to be forbidden
“[ Note: […] However, implementations should not allow such behavior. — end note ]”
The ISO: notes carry no force, and “should” imposes no constraint
40
// Thread 1
r1 = x;
if(r1==1) y = 1;
// Thread 2
r2 = y;
if(r2==1) x = 1;
x, y, r1, r2 initially zero
Can we observe r1==1, r2==1 at the end?
A fundamental problem uncovered
41. The write of y is dependent on the read of x
The write of x is dependent on the read of y
1/1 never occurs in compiled code, and ought to be forbidden
“[ Note: […] However, implementations should not allow such behavior. — end note ]”
ISO: notes carry no force, and “should” imposes no constraint, so yes!
41
// Thread 1
r1 = x;
if(r1==1) y = 1;
// Thread 2
r2 = y;
if(r2==1) x = 1;
x, y, r1, r2 initially zero
Can we observe r1==1, r2==1 at the end?
A fundamental problem uncovered
42. The write of y is dependent on the read of x
The write of x is dependent on the read of y
1/1 never occurs in compiled code, and ought to be forbidden
“[ Note: […] However, implementations should not allow such behavior. — end note ]”
ISO: notes carry no force, and “should” imposes no constraint, so yes!
42
// Thread 1
r1 = x;
if(r1==1) y = 1;
// Thread 2
r2 = y;
if(r2==1) x = 1;
x, y, r1, r2 initially zero
Can we observe r1==1, r2==1 at the end?
A fundamental problem uncovered
Why? Dependencies are ignored to allow
dependency-removing optimisations
C++ Should respect the left-over dependencies
We have proved that no fix exists in the structure
of the current specification
This identifies a difficult research problem
44. In both branches on Thread 2, 1 is written to x
An optimising compiler may perform common subexpression elimination
In the altered program,ARM would allow outcome 1/1
44
// Thread 1
r1 = x;
if(r1==1) y = 1;
// Thread 2
r2 = y;
if(r2==1) {x = 1}
else {x = 1}
x, y, r1, r2 initially zero
Can we observe r1==1, r2==1 at the end?
A slightly different program
45. In both branches on Thread 2, 1 is written to x
An optimising compiler may perform common subexpression elimination
In the altered program,ARM would allow the outcome 1/1
45
// Thread 1
r1 = x;
if(r1==1) y = 1;
// Thread 2
r2 = y;
x = 1;
x, y, r1, r2 initially zero
Can we observe r1==1, r2==1 at the end?
A slightly different program
46. 46
// Thread 1
r1 = x;
if(r1==1) y = 1;
// Thread 2
r2 = y;
if(r2==1) {x = 1}
else {x = 1}
x, y, r1, r2 initially zero
Can we observe r1==1, r2==1 at the end?
A slightly different program
We need a semantic notion of dependency
Execution depends on more than one control-flow path
C++ spec considers one at a time: fundamental change is needed
47. Current work
47
Several candidates:
• The Promising Semantics [KHL+17] — an abstract machine with speculation of writes through promises.At
each step, promised writes must be sure to execute.
• Jeffrey and Riely [JR16] — based on event structures, executions are built up iteratively, out of order.Add a
read only if the write it reads from must be executed.
• Podkopaev, Sergey, and Nanevski [PSN16] — an abstract machine where conditionals can be preemptively
explored, and writes that always occur can be promoted.
• Bubbly and Ticky semantics [PPS16] — based on event structures.The event structure is non-
deterministically mutated in a transition system that mimics compiler optimisations.
Each relies on a repeated search over multiple control-flow paths
This makes the models more expensive to evaluate than C++ (cannot use SAT)
Which model to choose?
48. Model simulation
48
Simulators provide lightweight automatic validation of design criteria:
[WBSC17] uses SAT to check DRF-SC, compiler mappings, litmus tests for C++, OpenCL, CPUs, GPUs
We are building a simulator for thin-air models
Higher complexity requires advanced Quantified Boolean Formula solvers
AVeTTS grant is paying for the development of a web interface
Our own solution to the thin-air problem is under development:
a compositional denotational semantics that looks rather different [B17]
Marco PaviottiSimon Cooksey Radu Grigore Sarah Harris Scott Owens
49. Conclusion
49
Mechanised industrial specification is practical, with a valuable payoff:
• Improved specs
• Simulators — an executable golden model that matches the spec
• Test suites can be generated
• Design criteria can be validated
It can guide us to future research questions
It is a necessary step in formal verification of security properties
50. [ABD+15] J. Alglave, M. Batty, A. Donaldson, G. Gopalakrishnan, J. Ketema, D. Poetzl, T. Sorensen, J. Wickerson. GPU concurrency: weak behaviours and programming assumptions. ASPLOS’15
[AFI+09] J. Alglave, A. Fox, S. Ishtiaq, M. O. Myreen, S. Sarkar, P. Sewell, and F. Zappa Nardelli. The semantics of Power and ARM multiprocessor machine code. DAMP’09
[AMSS10] J. Alglave, L. Maranget, S. Sarkar, and P. Sewell. Fences in weak memory models. CAV’10
[AMSS’11] J. Alglave, L. Maranget, S. Sarkar, and P. Sewell. Litmus: Running tests against hardware. TACAS’11/ETAPS’11
[B17] M. Batty. Compositional relaxed concurrency. Philosophical Transactions A, 2017
[B11] P. Becker, editor. Programming Languages — C++. 2011. ISO/IEC 14882:2011. A non-final version is available at http://www.open-std.org/jtc1/sc22/ wg21/docs/papers/2011/n3242.pdf.
[BDG13] M. Batty, M. Dodds, A. Gotsman. Library Abstraction for C/C++ Concurrency. POPL’13
[BDW16] M. Batty, A. Donaldson, J. Wickerson. Overhauling SC atomics in C11 and OpenCL. POPL’16
[BMN+15] M. Batty, K. Memarian, K. Nienhuis, J. Pichon, P. Sewell. The Problem of Programming Language Concurrency Semantics. ESOP’15
[BMO+12] M. Batty, K. Memarian, S. Owens, S. Sarkar, and P. Sewell. Clarifying and compiling C/C++ concurrency: from C++0x to POWER. POPL’12
[BOS+11] M. Batty, S. Owens, S. Sarkar, P. Sewell, and T. Weber. Mathematizing C++ concurrency. POPL’11
[CV16] S. Chakraborty, V. Vafeiadis. Validating optimizations of concurrent C/C++ programs. CGO’16
[FGP+16] S. Flur, K. E. Gray, C. Pulte, S. Sarkar, A. Sezgin, L. Maranget, W. Deacon, P. Sewell. Modelling the ARMv8 Architecture, Operationally: Concurrency and ISA. PLDI’16
[FSP+17] S. Flur, S. Sarkar, C. Pulte, K. Nienhuis, L. Maranget, K. E. Gray, A. Sezgin, M. Batty, P. Sewell. Mixed-size concurrency: ARM, POWER, C/C++11, and SC. POPL’17
[JR16] A. Jeffrey, J. Riely. On Thin Air Reads: Towards an Event Structures Model of Relaxed Memory. LICS’16
[LDGK08] G. Li, M. Delisi, G. Gopalakrishnan, and R. M. Kirby. Formal specification of the MPI-2.0 standard in TLA+. PPoPP’08
[KHL+17] A Promising Semantics for Relaxed-Memory Concurrency. J. Kang, C.-K. Hur, O. Lahav, V. Vafeiadis, D. Dreyer. POPL’17
[McK11] P. E. McKenney. [patch rfc tip/core/rcu 0/28] preview of RCU changes for 3.3, November 2011. https://lkml.org/lkml/2011/11/2/363
[MOG+14] D. P. Mulligan, S. Owens, K. E. Gray, T. Ridge, and P. Sewell. Lem: reusable engineering of real-world semantics. ICFP ’14
[MPZN13] R. Morisset, P. Pawan, F. Zappa Nardelli. Compiler testing via a theory of sound optimisations in the C11/C++11 memory model. PLDI’13
[OSP09] S. Owens, S. Sarkar, and P. Sewell. A better x86 memory model: x86-TSO. TPHOLS’09
[PPS16] J. Pichon-Pharabod and P. Sewell. A concurrency semantics for relaxed atomics that permits optimisation and avoids thin-air executions. POPL’16
[PSN16] A. Podkopaev, I. Sergey, and A. Nanevski. Operational aspects of C/C++ concurrency. CoRR’16.
[SMO+12] S. Sarkar, K. Memarian, S. Owens, M. Batty, P. Sewell, L. Maranget, J. Alglave, and D. Williams. Synchronising C/C++ and POWER. PLDI’12
[SSP+] S. Sarkar, P. Sewell, P. Pawan, L. Maranget, J. Alglave, D. Williams, F. Zappa Nardelli. The PPCMEM Web Tool. www.cl.cam.ac.uk/~pes20/ppcmem/
[WBDB15] J. Wickerson. M. Batty, B. Beckmann, A. Donaldson. Remote-Scope Promotion: Clarified, Rectified, and Verified. OOPSLA’15
[WBSC17] J. Wickerson, M. Batty, T. Sorensen, G. A. Constantinides. Automatically comparing memory consistency models. POPL’17
