This document discusses a proposed toolchain to generate an FPGA configuration bitstream directly from high-level language source code. It aims to eliminate the need for tool-specific expertise, making FPGA technology more accessible. The toolchain would use a compiler to produce an intermediate representation then target high-level synthesis tools to generate the bitstream. This approach could drive adoption of FPGAs by simplifying the design process. The document outlines the team and provides a roadmap for an initial prototype and future releases to support additional languages and tools.

1. Marco Siracusa – marco.siracusa@mail.polimi.it
Francesco Peverelli – francesco1.peverelli@mail.polimi.it
Enrico Reggiani – enrico2.reggiani@mail.polimi.it
28/06/2017 – DEIB, Seminar Room
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2. THE PROBLEM
No surefire automatic way to generate a
configuration bitstream from a program
written in a high level language
The knowledge and skillset needed to
program for FPGA with the current tools
makes it hard for many companies to adopt
this technology
We need an easy and accessible way to do it
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3. THE SOLUTION
A TOOLCHAIN TO GENERATE AN FPGA CONFIGURATION BITSTREAM DIRECTLY
FROM A HIGH LEVEL LANGUAGE SOURCE CODE
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4. THE SOLUTION
Eliminates the need for tool-specific expertise
Makes the underlying hardware invisible to the developer
Facilitates the adoption of FPGA-based technology for many
companies
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5. HOW CAN WE DO IT ?
Use a reliable compiler infrastructure to produce
an intermediate representation of the code
Target state of the art high level synthesis tools as a
back-end to generate the configuration bitstream
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6. HOW CAN WE DO IT ?
OXiGen performs a translation of the
intermediate representation
into source code which can then be compiled
by one of the supported high level synthesis
back-ends
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7. WHY FPGA
Different estimations value the FPGA
market at around 6.36 billion USD in 2015
The global FPGA industry is expected to
increase to 9.88 billion USD by 2020.
The market is expected to grow at a
Compound Annual Growth Rate (CAGR)
above 8%.
https://nmi.org.uk/sectors/electronic-systems/fpga-and-programmable-devices/
https://www.automation.com/automation-news/industry/fpga-market-size-share-growth-and-forecast-2016-to-2024-hexa-research
http://www.grandviewresearch.com/industry-analysis/fpga-market 7

8. WHY HLS
The HLS market is closely tied to the FPGA
market and is considered one of the main
contributing factors to its future growth
OXiGen aims at being one of the driving forces behind the
widespread adoption of FPGAs
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9. COMPETITIVE LANDSCAPE
HIGH
DESING
TIME
LOW
DESING
TIME
HIGH ACCESSIBILITY OF
THE TECHNOLOGY
HLS
TOOLS
HDL
DESIGNS
LOW ACCESSIBILITY OF
THE TECHNOLOGY
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10. BUISNESS MODEL
• Software license model
• Staring with an end-user license agreement (EULA)
• Eventually moving to a site license model
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11. MARKETING CHANNELS
Online
software
distribution
Dedicated website for
product information and
services
Social media
coverage
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12. THE RIGH TEAM TO DO IT
MARCO SIRACUSA
• BSc ICT Engineering @ UniPR
• Internship @ SICK AG., Hamburg
• Project manager
• Software developer
FRANCESCO PEVERELLI
• BSc ICT Engineering @ POLIMI
• Project manager
• Software developer
ENRICO REGGIANI
• BSc Elect. Engineering @ UNIMORE
• Internship @ Maxeler Technologies
• FPGA consultant
• HLS consultant
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13. ROADMAP
First
Prototipe
Case
study
First
Stable
Release
June 30th
2017
October
2017
May
2018
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14. LONG TERM GOALS
Support for different front-end languages
Design optimization and interactive IDE
Support for different High Level Synthesis back-ends
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15. THANK YOU FOR THE ATTENTION
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