Disha Mehrotra is seeking a full-time position utilizing her Master of Science in Electrical Engineering from New Mexico State University. She has work experience as a graduate teaching assistant and intern where she developed Verilog and VHDL codes. Her academic projects include designing an efficient boost converter for an LED driver and a power management IC with multiple converters and regulators. She maintains high skills in languages, tools and equipment for circuit design and holds awards and leadership roles in student organizations.

1. DISHA MEHROTRA
2630 S. Espina Street, Apt #29
Las Cruces, New Mexico, 88001
Phone: 415-939-2643
Email: dishamehrotra91@gmail.com
OBJECTIVE:
Seeking a full-time position that will utilize my education in adding value to the company and in return
enhance my skills.
EDUCATION:
Master of Science in Electrical Engineering GPA: 3.5
New Mexico State University, Las Cruces, New Mexico Expected: Dec. 2017
Thesis: “Efficient Boost Converter Design of a Multi-String LED Driver with Accurate Current Matching”
Bachelor of Engineering in Electronics and Communication Engineering
Rajiv Gandhi Technical University, Bhopal, India June 2014
Projects: “Combination Lock with Microcontroller” and “Digital Code Lock using IC-CD4013”
PUBLICATION:
1. “Multi-String LED Driver with Accurate Current Matching and Dynamic Cancellation of Forward
Voltage Mismatch,” IEEE 60th
Midwest Symposium on Circuits and Systems (MWSCAS), 2017.
SKILLS: (Languages, Tools and Equipment’s)
C Cadence Design Environment Altera Eagle
C++ Cadence Virtuoso Layout Editor Spectre Latex
Matlab Design Rule Check LTSpice Visio
Python Layout Versus Schematic Keil UVision Microsoft Office
VHDL Electrical Rule Checks Vivado Digital Multimeter
Verilog Xilinx ISE Allegro Signal Generator
DE0 Board Digital Oscilloscope FPGA Board
COURSEWORK:
Digital VLSI Design Power Management in Integrated Circuits Computer Programming Analysis
Analog VLSI Design ARM SOC Architecture Control System Synthesis
RF & Microelectronics Random Signal Analysis Digital VLSI Laboratory
ASIC Design Analog & Digital Converter
PROFESSIONAL EXPERIENCE – (2 Years)
Graduate Assistant for Academic and Personal Effectiveness (Jan. 2017 - Present)
• Help students in their academic problems like time management, note-taking, critical thinking.
• Provide support in arranging workshops and online classes.
Teaching Assistant for Intro to VLSI, Digital Circuits & Computer Architecture (Jan. 2016 – Dec. 2016)
• Setup Cadence 130nm process, prepared quizzes, graded home works, and developed VHDL codes for
gates, decoders, multiplexer, counters, flip-flops, and latches.
• Conducted labs, provided technical support to students.
Intern in Starbru Techsystems Private Limited, India (June 2013 - July 2013)
• Developed Verilog codes for gates, counters, and latches.
• Did the hardware implementation on the FPGA kit.

2. ACADEMIC PROJECTS:
1. Research: Designed, simulated and taped-out “Efficient Boost Converter Design of a Multi-String LED
Driver.”
• Input Voltage = 2.8V-4.2V, Output Voltage = 5.4V, Load Current = 100mA, 20mA for each string.
• Output voltage set by PFM Hysteretic Controller technique.
• Both voltage mode and current mode control loop used with synchronous Boost Converter.
• Current in LED strings matched using regulated cascode current matching circuit.
• Hysteretic comparator based LTA circuit used to select the minimum voltage between LED strings.
• Inductor Current ON and OFF time tracked through Current Sensing circuit.
• Dimming function is performed using PFM dimming technique.
Designed and simulated a:
2. Power Management IC with the help of 2-Buck Converter, a Boost Converter, a LDO Regulator and a
Bandgap Reference circuit.
• A boost converter was used to drive output voltage of 2V with switching frequency of 2MHz.
• Buck converters used to drive output voltages of 1.2V and 1.8V with switching frequency of 2MHz.
• LDO Regulator drove the output voltage of 1.5V with the switching frequency of 2.5MHz.
• PWM voltage feedback control loop drove the output voltage.
• IC supplies power to LED driver, Audio codec and CPU core.
3. LDO Regulator circuit
• Input voltage = 1.8V, Output voltage = 1.5V and dropout voltage = 85mV.
• Achieved Phase Margin was 88° and Gain Margin was 24dB.
• Obtained load regulation of 4mV and line regulation of 15mV.
4. Folded Cascode Amplifier
• Designed for Gain Bandwidth Product of 10MHz and bias current of 5µA.
• Load capacitance=12pF and slew rate was 34mV/s.
5. Digital Phase Locked Loop (DPLL)
• Designed: Phase Detector, Charge Pump, Voltage Controlled Oscillator and Divide by 8 Circuit.
• The input & output frequencies of 120MHz and 960MHz has been used
• The circuit is slightly over damped but almost critically damped.
6. Static Random Access Memory (SRAM)
• Designed: 6T-SRAM Cell, Row Decoder, Column Decoder, Clocked Sense Amplifier, Column
Multiplexer, Bitline Conditioning and Column Write Logic.
• Frequency of 400MHz drove one complete read and write cycle using a load capacitor of 10fF.
AWARDS/ACTIVITIES:
• ISSS NMSU Scholarship based on service and leadership (Jan. 2016)
• Cultural Secretary of Indian Student Association (Nov. 2016 - Present).
• Voluteered at the Keep State Clean initiative held at NMSU (Sept.2015 - April 2017)