Devdut Pawaskar is seeking opportunities in VLSI Systems Design starting in December 2016. He has a Master's degree in Electrical and Computer Engineering from Georgia Tech with a focus on VLSI Systems and Digital Design. He has experience with circuit design tools like Synopsys and Cadence. His projects include designing a digital compensator for a Fully Integrated Voltage Regulator in 130nm and 28nm processes, and implementing a 6T-SRAM array and adder in 45nm. He also designed a noise tolerant low power dynamic NOR gate in 45nm.