Internal Memory
DR. Amal Al-dweik
By:
Mohammad Qabaja (211021)
Raneem al masalmah (221162)
Aya Taradeh (217633)
Baraa Jabareen (227567)
Table of contents
01 03
02 04
RAM
SDRAM
RDRAM
DDRSDRAM
Static RAM (SRAM)
RAM technology
• Digital device that uses the same logic
elements used in the processor
• Binary values are stored using traditional
flip-flop logic gate configurations
• Will hold its data as long as power is
supplied to it
• Made with cells that store data as charge
on capacitors
• Presence or absence of charge in a
capacitor is interpreted as a binary 1 or 0
• Requires periodic charge refreshing to
maintain data storage
• The term dynamic refers to tendency of the
stored charge to leak away, even with
power continuously applied
Dynamic RAM (DRAM)
Dynamic RAM Structure
Static RAM Structure
SRAM versus DRAM
Dynamic
A. volatile
B. Faster
C. Used for cache
memory (both on
and off chip)
A. volatile
B. Simpler to build
C. Smaller
D. More dense
E. Less expensive
F. Requires the supporting
refresh circuitry
G. Tend to be favored for
large memory
requirements
H. Used for main memory
Static
SDRAM
(Synchronized dynamic random access memory )
Introduction:
● It began its appearance in 1996.
● One of the most widely used forms of DRAM
● Its microprocessor has been improved, which has increased the number of instructions that the
processor can execute at a given time.
● SDRAM is designed to synchronize itself with CPU timing.
● Exchanges data with the processor synchronized to an external clock signal and running at the full
speed of the processor/memory bus without imposing wait states
How does SDRAM work?
Data
storage in
capacitors
Forming a matrix
by organizing
capacitors into
rows and columns
The control unit
sends the row
and column
addresses to it
Activate the
corresponding
memory cell and
read and write the
data stored in it.
SDRAM Pin Assignments
SDRAM Advantages and Disadvantages
Advantages Disadvantages
Fast High energy consumption
Higher bandwidth Volatile memory
Low cost Data requires updating
Simple design Slower than SRAM
RDRAM
Developed by Rambus Adopted by Intel for its Pentium
and Itanium processors
Chips are vertical packages
with all pins on one side
• Exchanges data with the
processor over 28 wires no
more than 12 centimeters
long
Bus can address up to 320
RDRAM chips and is rated at
1.6 GBps
Has become the main
competitor to SDRAM
Bus delivers address and control
information using an asynchronous block-
oriented protocol
• Gets a memory request over the high-
speed bus
• Request contains the desired
address, the type of operation,
and the number of bytes in the
operation
01 02 03
04 05 06
RDRAM Structure
Double Data Rate
SDRAM (DDR
SDRAM)
Introduction:
● SDRAM can only send data once per bus clock cycle
● Double-data-rate SDRAM can send data twice per clock cycle,
once on the rising edge of the clock pulse and once on the falling
edge
● Developed by the JEDEC Solid State Technology Association
(Electronic Industries Alliance’s semiconductor-engineering-
standardization body)
DDR SDRAM Read Timing
Types of DDRSDRAM
Double Data Rate SDRAM: The next generation
of SDRAM is DDR, which achieves greater
bandwidth than the preceding single data rate
SDRAM by transferring data on the rising and
falling edges of the clock signal (double pumped)
Double Data Rate Two SDRAM: Its primary
benefit is the ability to operate the external data
bus twice as fast as DDR SDRAM. This is
achieved by improved bus signal. The prefetch
buffer of DDR2 is 4 bit(double of DDR SDRAM).
Double Data Rate Three SDRAM: DDR3 memory
reduces 40% power consumption compared to
current DDR2 modules, allowing for lower
operating currents and voltages (1.5 V, compared
to DDR2's 1.8 V or DDR's 2.5 V).
Double Data Rate Fourth SDRAM: provides the
lower operating voltage (1.2V) and higher
transfer rate.
Discussion
DDR1 SDRAM
DDR3 SDRAM
DDR2 SDRAM
DDR4 SDRAM
COMPARISION BETWEEN SDRAMs
Thanks

Computer Organization and Architecture (1) (1) (1).pptx

  • 1.
    Internal Memory DR. AmalAl-dweik By: Mohammad Qabaja (211021) Raneem al masalmah (221162) Aya Taradeh (217633) Baraa Jabareen (227567)
  • 2.
    Table of contents 0103 02 04 RAM SDRAM RDRAM DDRSDRAM
  • 3.
    Static RAM (SRAM) RAMtechnology • Digital device that uses the same logic elements used in the processor • Binary values are stored using traditional flip-flop logic gate configurations • Will hold its data as long as power is supplied to it • Made with cells that store data as charge on capacitors • Presence or absence of charge in a capacitor is interpreted as a binary 1 or 0 • Requires periodic charge refreshing to maintain data storage • The term dynamic refers to tendency of the stored charge to leak away, even with power continuously applied Dynamic RAM (DRAM)
  • 4.
  • 5.
  • 6.
    SRAM versus DRAM Dynamic A.volatile B. Faster C. Used for cache memory (both on and off chip) A. volatile B. Simpler to build C. Smaller D. More dense E. Less expensive F. Requires the supporting refresh circuitry G. Tend to be favored for large memory requirements H. Used for main memory Static
  • 7.
    SDRAM (Synchronized dynamic randomaccess memory ) Introduction: ● It began its appearance in 1996. ● One of the most widely used forms of DRAM ● Its microprocessor has been improved, which has increased the number of instructions that the processor can execute at a given time. ● SDRAM is designed to synchronize itself with CPU timing. ● Exchanges data with the processor synchronized to an external clock signal and running at the full speed of the processor/memory bus without imposing wait states
  • 8.
    How does SDRAMwork? Data storage in capacitors Forming a matrix by organizing capacitors into rows and columns The control unit sends the row and column addresses to it Activate the corresponding memory cell and read and write the data stored in it.
  • 9.
  • 10.
    SDRAM Advantages andDisadvantages Advantages Disadvantages Fast High energy consumption Higher bandwidth Volatile memory Low cost Data requires updating Simple design Slower than SRAM
  • 11.
    RDRAM Developed by RambusAdopted by Intel for its Pentium and Itanium processors Chips are vertical packages with all pins on one side • Exchanges data with the processor over 28 wires no more than 12 centimeters long Bus can address up to 320 RDRAM chips and is rated at 1.6 GBps Has become the main competitor to SDRAM Bus delivers address and control information using an asynchronous block- oriented protocol • Gets a memory request over the high- speed bus • Request contains the desired address, the type of operation, and the number of bytes in the operation 01 02 03 04 05 06
  • 12.
  • 13.
    Double Data Rate SDRAM(DDR SDRAM) Introduction: ● SDRAM can only send data once per bus clock cycle ● Double-data-rate SDRAM can send data twice per clock cycle, once on the rising edge of the clock pulse and once on the falling edge ● Developed by the JEDEC Solid State Technology Association (Electronic Industries Alliance’s semiconductor-engineering- standardization body)
  • 14.
  • 15.
  • 16.
    Double Data RateSDRAM: The next generation of SDRAM is DDR, which achieves greater bandwidth than the preceding single data rate SDRAM by transferring data on the rising and falling edges of the clock signal (double pumped) Double Data Rate Two SDRAM: Its primary benefit is the ability to operate the external data bus twice as fast as DDR SDRAM. This is achieved by improved bus signal. The prefetch buffer of DDR2 is 4 bit(double of DDR SDRAM). Double Data Rate Three SDRAM: DDR3 memory reduces 40% power consumption compared to current DDR2 modules, allowing for lower operating currents and voltages (1.5 V, compared to DDR2's 1.8 V or DDR's 2.5 V). Double Data Rate Fourth SDRAM: provides the lower operating voltage (1.2V) and higher transfer rate. Discussion DDR1 SDRAM DDR3 SDRAM DDR2 SDRAM DDR4 SDRAM
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