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A HIGH STEP-DOWN TRANSFORMER LESS SINGLE-STAGE
SINGLE-SWITCH AC/DC CONVERTER
ABSTRACT:
This paper presents a high step-down tranformerless single-stage single-switch ac/dc converter
suitable for universal line applications (90-270 Vrms). The topology integrates a buck-type power-factor
correction (PFC) cell with a buck-boost dc/dc cell and part of the input power is coupled to the output
directly after the first power processing. With this direct power transfer feature and sharing capacitor
voltages, the converter is able to achieve efficient power conversion, high power factor, low voltage stress
on intermediate bus (less than 130 V) and low output voltage without a high step-down transformer. The
absence of transformer reduces the component counts and cost of the converter. Unlike most of the boosttype PFC cell, the main switch of the proposed converter only handles the peak inductor current of dc/dc cell
rather than the superposition of both inductor currents. Detailed analysis and design procedures of the
proposed circuit are given and verified by experimental results.

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A high step down transformer less single-stage single-switch acdc converter

  • 1. A HIGH STEP-DOWN TRANSFORMER LESS SINGLE-STAGE SINGLE-SWITCH AC/DC CONVERTER ABSTRACT: This paper presents a high step-down tranformerless single-stage single-switch ac/dc converter suitable for universal line applications (90-270 Vrms). The topology integrates a buck-type power-factor correction (PFC) cell with a buck-boost dc/dc cell and part of the input power is coupled to the output directly after the first power processing. With this direct power transfer feature and sharing capacitor voltages, the converter is able to achieve efficient power conversion, high power factor, low voltage stress on intermediate bus (less than 130 V) and low output voltage without a high step-down transformer. The absence of transformer reduces the component counts and cost of the converter. Unlike most of the boosttype PFC cell, the main switch of the proposed converter only handles the peak inductor current of dc/dc cell rather than the superposition of both inductor currents. Detailed analysis and design procedures of the proposed circuit are given and verified by experimental results.