The document describes the languages and representations used at each stage of compilation in LLVM. It discusses how the C/C++ frontend transforms source code into an AST then LLVM IR. The optimizer performs optimizations on the LLVM IR. The backend lowers the LLVM IR into a selection DAG with machine instructions and finally emits assembly code. The compilation process translates from the original high-level language into target-specific assembly.

1. Languages Used
in LLVM During
Compilation
IPP, FIT BUT
Adam Husár, ihusar@fit.vutbr.cz
30.4.2014

2. Contents
• Programming electronic systems
• LLVM compiler and intermediate representations
used during compilation
 Frontend
 Parsing
 Semantics analysis
 IR generation
 Optimizer
 Backend
 Instruction selection
 Register allocation
 Assembly printing
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3. Programming electronic
systems
Electrons
Programmer
El. components
Natural language
Programming language
El. voltage
RTL
Compiler
ISA (architecture)
Microarchitecture
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4. Programming electronic
systems
Electrons
Programmer
El. components
Natural language
Programming language
El. voltage
RTL
Compiler
ISA (architecture)
Microarchitecture
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5. C/C++ language program to
binary representation
C/C++ compiler
Assembler
Linker
C/C++ language
Compiler
Binary (w/o relocations)
Assembly (textual)
Binary (w. relocations)
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6. C/C++ language program to
binary representation
C/C++ compiler
Assembler
Linker
C/C++ language
Compiler
Binary (w/o relocations)
Assembly (textual)
Binary (w. relocations)
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7. LLVM compiler
• LLVM – original acronym meaning was Low Level
Virtual Machine, now just LLVM
• Collection of tools and libraries,.competition to gcc (GNU
Compiler Collection)
LLVM C/C++
compiler
Frontend
Optimizer
Backend
C/C++ language
LLVM IR
LLVM IR
Assembly (textual)
• LLVM has many different frontends
 C/C++, Objective C/C++, Haskell, Open CL, Ada, ...
• and backends
 x86, ARM, MicroBLaze, MIPS, PowerPC, SPARC, R600, Hexagon, ...
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8. LLVM compiler components
LLVM C/C++
compiler
Frontend
Optimizer
Backend
C/C++ language
LLVM IR
LLVM IR
Assembly (textual)
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9. Frontend compilation
• Frontend transforms input source code into a compiler
intermediate representation
• LLVM frontend is called clang
• AST (abstract syntax tree) is an internal representation
used in frontend
• For C/C++ must know target architecture data type
sizes (e.g. int size - 16 or 32 bits, and pointer size – 16,
32, or 64)
C language Tokens AST AST LLVM IR 9
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10. Example – C -> AST
int foo(int aa, int bb, int cc) {
int sum = aa + bb;
return sum / cc;
}
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11. AST – Abstract Syntax Tree
• Representation used to do semantic checks
• Contains all information about input source code, can be
used to reconstruct original source code
• Source-to-source compilers
• Static analysis (LLVM static analyzer)
• Clang also performs some optimizations over AST such
as inlining
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12. (used slides from [2])
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13. (used slides from [2])
Source to source compilation
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14. Example AST -> LLVM IR
• The previous AST is transformed into the LLVM IR
(representation
ASTint foo
(int aa, int bb, int cc)
{
int sum = aa + bb;
return sum / cc;
}
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15. LLVM IR
• Common internal representation for optimization
passes
• Used both as input for backend and for
interpreter/virtual machine
• Very close to assembly languages with several
differences
 Typed
 integer (iX)
 floating point
 vector
 structures, arrays, unions
 Unlimited number of registers (temporary variables)
 SSA – based
 Operators have their signedness specified
 Some high-level operations, e.g. exception handling
Frontend
Optimizer
Backend
C/C++ language
LLVM IR
LLVM IR
Assembly
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16. LLVM IR operations (1/2)
• Standard integer and floating point operations
 add, sub, mul, udiv, sdiv, and, or, xor, shifts, ...
 fadd, fsub, fmul, ...
• Conversions
 trunc .. to, zext .. to, ...
• Comparisons, selects
 icmp, fcmp, select, phi, ...
• Memory access and addressing
 load, store
 fence, cmpxchg, ...
 getelementptr
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17. LLVM IR operations (2/2)
• Terminator instructions
 br, switch, ret, ...
• Other instructions
 call, va_arg,
• Intrinsic instructions
 garbage collector
 code generator
 standard C library
 memcpy, memmove, sqrt, ...
 debugger
 exception handling
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18. (used slides from [1])
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19. (used slides from [1])
(used slides from [1])
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20. 20/
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21. LLVM compiler components
LLVM C/C++
compiler
Frontend
Optimizer
Backend
C/C++ language
LLVM IR
LLVM IR
Assembly (textual)
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22. Optimizer
• Also called midend
• Uses only LLVM IR language
• Over 80 transform and analysis passes
• Analysis pass – computes analysis information,
may use analysis information from other analysis
passes
• Transform pass – changes LLVM IR program
representation into equivalent program
• Pass ordering is important, several
transformations are executed repeatedly
• Mostly architecture independent
Frontend
Optimizer
Backend
C/C++ language
LLVM IR
LLVM IR
Assembly
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23. LLVM Optimizer Passes
$opt -O3 test.ll -o testO3 -debug-pass=Structure
No Alias Analysis (always returns 'may' alias)
Andersens Alias Analysis (statefull AA impl)
Type-Based Alias Analysis
Basic Alias Analysis (stateless AA impl)
ModulePass Manager
Global Variable Optimizer
Interprocedural Sparse Conditional Constant Propagation
Dead Argument Elimination
FunctionPass Manager
Combine redundant instructions
Simplify the CFG
CallGraph Construction
Call Graph SCC Pass Manager
Remove unused exception handling info
Inline Cost Analysis
Function Integration/Inlining
Deduce function attributes
Promote 'by reference' arguments to scalars
FunctionPass Manager
SROA
Dominator Tree Construction
Early CSE
Lazy Value Information Analysis
Jump Threading
Value Propagation
Simplify the CFG
Combine redundant instructions
Tail Call Elimination
Simplify the CFG
Reassociate expressions
Dominator Tree Construction
Natural Loop Information
Loop Pass Manager
Canonicalize natural loops
Loop-Closed SSA Form Pass
Rotate Loops
Loop Invariant Code Motion
Loop-Closed SSA Form Pass
Unswitch loops
Combine redundant instructions
Scalar Evolution Analysis
Loop Pass Manager
Canonicalize natural loops
Loop-Closed SSA Form Pass
Induction Variable Simplification
Recognize loop idioms
Delete dead loops
Unroll loops
Memory Dependence Analysis
Global Value Numbering
Memory Dependence Analysis
MemCpy Optimization
Sparse Conditional Constant Propagation
Combine redundant instructions
Lazy Value Information Analysis
Jump Threading
Value Propagation
Dominator Tree Construction
Memory Dependence Analysis
Dead Store Elimination
Natural Loop Information
Scalar Evolution Analysis
SLP Vectorizer
Aggressive Dead Code Elimination
Simplify the CFG
...
Dead Global Elimination
Merge Duplicate Global Constants
FunctionPass Manager
Preliminary module verification
Dominator Tree Construction
Module Verifier
Bitcode Writer
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24. Optimizer - Example Optimizer
LLVM IR
LLVM IR
Original code
int foo
(int aa, int bb, int cc)
{
int sum = aa + bb;
return sum / cc;
}
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25. LLVM compiler components
LLVM C/C++
compiler
Frontend
Optimizer
Backend
C/C++ language
LLVM IR
LLVM IR
Assembly (textual)
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26. Backend
• Backend (also called code generator) transforms LLVM
IR into assembly code
• Architecture dependent
• Only main transformation passes are shown here:
Lowering
Instr. selection
Assembly printer
LLVM IR
Selection DAG w. SD (LLVM) nodes
Selection DAG w. Machine Instruction nodes
Assembly code
Scheduling
Machine Code w. virt. regs
Reg. allocation
Machine Code w. machine regs
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27. Lowering, instruction
selection, and basic scheduling
• Switch to presentation Dan Gohman: SelectionDAG
Phases ([3])
Lowering
Instr. selection
Assembly printer
LLVM IR
Selection DAG w. SD (LLVM) nodes
Selection DAG w. Machine Instruction nodes
Assembly code
Scheduling
Machine Code w. virt. regs
Reg. allocation
Machine Code w. machine regs
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28. LLVM IR -> Machine code
Function Live Ins: %gpregs_3 in %vreg0,
%gpregs_4 in %vreg1, %gpregs_5 in %vreg2
Live Ins: %gpregs_3 %gpregs_4 %gpregs_5
%vreg2<def> = COPY %gpregs_5
%vreg1<def> = COPY %gpregs_4
%vreg0<def> = COPY %gpregs_3
%vreg3<def> = instr_addu
%vreg0, %vreg1
instr_div
%vreg3<kill>, %vreg2,
%rlo_0<imp-def>,%rhi_0<imp-def,dead>
%vreg4<def> = COPY %rlo_0
%gpregs_3<def> = COPY %vreg4
instr_jump %gpregs_31, %gpregs_3
Lowering
Instr. selection
LLVM IR
Selection DAG w. SD (LLVM) nodes
Selection DAG w. Machine Instruction nodes
Scheduling
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29. Machine code passes in backend
Expand ISel Pseudo-instructions
Tail Duplication
Optimize machine instruction PHIs
Slot index numbering
Merge disjoint stack slots
Local Stack Slot Allocation
Remove dead machine instructions
Machine Loop Invariant Code Motion
Machine Common Subexpression
Elimination
Machine code sinking
Peephole Optimizations
Process Implicit Definitions
Remove unreachable machine basic blocks
Live Variable Analysis
Eliminate PHI nodes for
register allocation
Two-Address instruction pass
Slot index numbering
Live Interval Analysis
Simple Register Coalescing
Debug Variable Analysis
Live Stack Slot Analysis
Virtual Register Map
Live Register Matrix
Virtual Register Rewriter
Stack Slot Coloring
Machine Loop Invariant Code Motion
Prologue/Epilogue Insertion & Frame
Finalization
Control Flow Optimizer
Tail Duplication
Machine Copy Propagation Pass
Post-RA pseudo instruction expansion pass
Post RA top-down list latency
scheduler
Analyze Machine Code For Garbage Collection
Branch Probability Basic Block Placement
Assembly Printing
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30. Register allocation
Live Ins: %gpregs_3 %gpregs_4 %gpregs_5
%vreg2<def> = COPY %gpregs_5
%vreg1<def> = COPY %gpregs_4
%vreg0<def> = COPY %gpregs_3
%vreg3<def> = instr_addu
%vreg0, %vreg1
instr_div
%vreg3<kill>, %vreg2,
%rlo_0<imp-def>,%rhi_0<imp-def,dead>
%vreg4<def> = COPY %rlo_0
%gpregs_3<def> = COPY %vreg4
instr_jump %gpregs_31, %gpregs_3
Live Ins: %gpregs_3 %gpregs_4 %gpregs_5
%gpregs_3<def> = instr_addu %gpregs_3<kill>, %gpregs_4<kill>
instr_div %gpregs_3<kill>, %gpregs_5<kill>,
%rlo_0<imp-def>, %rhi_0<imp-def,dead>
%gpregs_3<def> = COPY %rlo_0<kill>
instr_jump %gpregs_31<kill>, %gpregs_3
Machine Code w. virt. regs
Reg. allocation
Machine Code w. machine regs
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31. Assembly printing (finally)
Live Ins: %gpregs_3 %gpregs_4 %gpregs_5
%gpregs_3<def> = instr_addu %gpregs_3<kill>, %gpregs_4<kill>
instr_div %gpregs_3<kill>, %gpregs_5<kill>,
%rlo_0<imp-def>, %rhi_0<imp-def,dead>
%gpregs_3<def> = COPY %rlo_0<kill>
instr_jump %gpregs_31<kill>, %gpregs_3
Machine Code w. machine regs
Passes after RA
Machine Code w. machine regs
$foo:
ADDIU $1, $1, -8
SW $31, +4 ( $1 )
SW $2, 0 ( $1 )
MOVE $2, $1
LW $31, +4 ( $1 )
ADDU $3, $3, $4
DIV $3, $5
LW $2, 0 ( $1 )
MFLO $3
ADDIU $1, $1, +8
JR $31
• Additional instructions were added
in Prologue/Epilogue Insertion &
Frame Finalization
• These instructions can be
optimized away for leaf calls
Original code
int foo
(int aa, int bb,
int cc)
{
int sum = aa + bb;
return sum / cc;
}
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32. Summary
• Languages and representations used in LLVM
 Frontend
 C/C++
 AST
 LLVM IR
 Optimizer
 LLVM IR
 Backend
 LLVM IR
 Selection DAG with SD nodes
 Selection DAG with Machine instruction nodes
 Machine Code w. virt. regs
 Machine Code w. machine regs
 Assembly code
• Original representation abstraction is lowered down to
the target machine assembly code
Frontend
Optimizer
Backend
C/C++ language
LLVM IR
LLVM IR
Assembly (textual)
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33. References
• [1] Christian Plessl: Introduction to the LLVM Compiler
Framework, Univ. of Paderborn, 2012
• [2] Olaf Krzikalla: Performing Source-to-Source Transformations
with Clang, European LLVM Conference Paris, 2013
• [3] Dan Gohman: SelectionDAG Phases- llvm.org/devmtg/2008-
08/Gohman_CodeGenAndSelectionDAGs.pdf
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