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Application Note AN-1071

                    Class D Audio Amplifier Basics
                                By Jun Honda & Jonathan Adams


                                         Table of Contents

                                                                             Page
        What is a Class D Audio Amplifier? – Theory of Operation ..................2
        Topology Comparison – Linear vs. Class D .........................................4
        Analogy to a Synchronous Buck Converter..........................................5
        Power Losses in the MOSFETs ...........................................................6
        Half Bridge vs. Full Bridge....................................................................7
        Major Cause of Imperfection ................................................................8
        THD and Dead Time ............................................................................9
        Audio Performance Measurement........................................................10
        Shoot Through and Dead Time ............................................................11
        Power Supply Pumping ........................................................................12
        EMI Consideration: Qrr in Body Diode .................................................13
        Conclusion ...........................................................................................14



A Class D audio amplifier is basically a switching amplifier or PWM amplifier. There are a number
of different classes of amplifiers. This application note takes a look at the definitions for the main
classifications.




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What is a Class D Audio Amplifier -                    non-linearity of Class B designs is overcome,
Theory of Operation                                    without the inefficiencies of a Class A design.
                                                       Efficiencies for Class AB amplifiers is about
A Class D audio amplifier is basically a switch-       50%.
ing amplifier or PWM amplifier. There are a num-
ber of different classes of amplifiers. We will take   Class D – This class of amplifier is a switching
a look at the definitions for the main classifica-     or PWM amplifier as mentioned above. This
tions as an introduction:                              class of amplifier is the main focus of this appli-
                                                       cation note. In this type of amplifier, the switches
Class A – In a Class A amplifier, the output de-       are either fully on or fully off, significantly re-
vices are continuously conducting for the entire       ducing the power losses in the output devices.
cycle, or in other words there is always bias          Efficiencies of 90-95% are possible. The audio
current flowing in the output devices. This to-        signal is used to modulate a PWM carrier sig-
pology has the least distortion and is the most        nal which drives the output devices, with the
linear, but at the same time is the least efficient    last stage being a low pass filter to remove the
at about 20%. The design is typically not              high frequency PWM carrier frequency.
complementary with a high and low side output
devices.                                               From the above amplifier classifications, classes
                                                       A, B and AB are all what is termed linear ampli-
Class B – This type of amplifier operates in the       fiers. We will discuss the differences between
opposite way to Class A amplifiers. The output         Linear and Class D amplifiers in the next sec-
devices only conduct for half the sinusoidal cycle     tion. The block diagram of a linear amplifier is
(one conducts in the positive region, and one          shown below in fig 1. In a linear amplifier the
conducts in the negative region), or in other          signals always remain in the analog domain,
words, if there is no input signal then there is       and the output transistors act as linear regula-
no current flow in the output devices. This class      tors to modulate the output voltage. This results
of amplifier is obviously more efficient than Class    in a voltage drop across the output devices,
A, at about 50%, but has some issue with lin-          which reduces efficiency.
earity at the crossover point, due to the time it
takes to turn one device off and turn the other        Class D amplifiers take on many different forms,
device on.                                             some can have digital inputs and some can have
                                                       analog inputs. Here we will focus on the type
Class AB – This type of amplifier is a combina-        which have analog inputs.
tion of the above two types, and is currently one
of the most common types of power amplifier in
existence. Here both devices are allowed to
conduct at the same time, but just a small
amount near the crossover point. Hence each
device is conducting for more than half a cycle
but less than the whole cycle, so the inherent

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AN-1071



                                                           Feedback


                         Triangle
                        Generator                                                  +Vcc


                                                                                 Nch
                                                                      Level
                                                                      Shift


                                      COMP            Deadtime
          +       -
                      Error
                      Amp                                                        Nch

                  +



                                    Fig 1 Block Diagram of a Class D Amplifier
                                                                                    -Vcc


Fig 1 above shows the basic block diagram for               the input signal is a standard audio line level
a Half Bridge Class D amplifier, with the wave-             signal. This audio line level signal is sinusoidal
forms at each stage. This circuit uses feedback             with a frequency ranging from 20Hz to 20kHz
from the output of the half-bridge to help com-             typically. This signal is compared with a high
pensate for variations in the bus voltages.                 frequency triangle or sawtooth waveform to cre-
                                                            ate the PWM signal as seen in fig 2a below.
So how does a Class D amplifier work? A Class               This PWM signal is then used to drive the power
D amplifier works in very much the same way                 stage, creating the amplified digital signal, and
as a PWM power supply (we will show the anal-               finally a low pass filter is applied to the signal to
ogy later). Let’s start with an assumption that             filter out the PWM carrier frequency and retrieve
                                                            the sinusoidal audio signal (also seen in fig 2b).

                                    COMP
                                                           Class D
                                                        switching stage                    LPF




          Fig 2a PWM Signal Generation                                        Fig 2b Output Filtering
                                       Fig 2) Class D Amplifier Waveforms

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Topology Comparison – Linear vs. Class D               Gain – With Linear amplifiers the gain is con-
                                                       stant irrespective of bus voltage variations, how-
In this section we will discuss the differences        ever with Class D amplifiers the gain is propor-
between linear (Class A and Class AB) amplifi-         tional to the bus voltage. This means that the
ers, and Class D digital power amplifiers. The         power supply rejection ratio (PSRR) of a Class
primary and main difference between linear and         D amplifier is 0dB, whereas the PSRR of a lin-
Class D amplifiers is the efficiency. This is the      ear amplifier is very good. It is common in Class
whole reason for the invention of Class D am-          D amplifiers to use feedback to compensate for
plifiers. The Linear amplifiers is inherently very     the bus voltage variations.
linear in terms of its performance, but it is also
very inefficient at about 50% typically for a Class    Energy Flow – In linear amplifiers the energy
AB amplifier, whereas a Class D amplifier is           flow is always from supply to the load, and in
much more efficient, with values in the order of       Full bridge Class D amplifiers this is also true. A
90% in practical designs. Fig 3 below shows            half-bridge Class D amplifier however is differ-
typical efficiency curves for linear and Class D       ent, as the energy flow can be bi-directional,
amplifiers.                                            which leads to the “Bus pumping” phenomena,
                                                       which causes the bus capacitors to be charged
                                                       up by the energy flow from the load back to the
      ā        Temp rise test condition               supply. This occurs mainly at the low audio fre-
                                                       quencies i.e. below 100Hz.




                            Output
                     Linear Amplifier




     ā




                             Output
                    Class D Amplifier

     Fig 3 Linear and Class D Amplifier Efficiencies


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AN-1071




Analogy to a Synchronous Buck Converter

A simple analogy can be made between a Class
D amplifier and a synchronous buck converter.
The topologies are essentially the same as can
be seen below in fig 4.


                                                                                                                                                     Fc of LPF is
                                                                                                                                                     above 20KHz
                                Gate Driver
                                                                                                                       Gate Driver

                                              Q1
                                              MOSFET                                                                                  Q1
                                                                                                                                      MOSFET

                       U1A
                                                                                                              U1A
                8




                                                                                                       8
                                                  L1                                                                                      L1
        3                                                                                      3
            +
                      1                                                                            +         1
        2                                                                                      2
            -                                     INDUCTOR                                         -                                      INDUCTOR
                    ERROR AMP

Vref
                                                                                                           ERROR AMP
                4




                                                                         R1
                                                                                                       4


                                                                                                                                                                  R1
                                                             C1          LOAD                                                                         C1          LOAD
                                                             CAPACITOR                                                                                CAPACITOR
                                              Q2                                                                                      Q2
                                              MOSFET                                                                                  MOSFET




                                                                                Audio signal input as
                                                                                a reference voltage


            Buck Converter                                                                                               Class D amplifier

                                  Fig 4 Topologies for Synchronous Buck Converter and a Class D amplifier



The main difference between the two circuits is                                      The final difference is in the way the MOSFETs
that the reference signal for the synchronous                                        are optimized. The Synch buck converter is
buck converter is a slow changing signal from                                        optimized differently for the high and low side
the feedback circuit( a fixed voltage), in the                                       MOSFETs, with lower RDS(on) for longer duty and
case of the Class D amplifier the reference sig-                                     low Qg for short duty. The Class D amplifier has
nal is an audio signal which is continuously                                         the same optimization for both of the MOSFETs,
changing. This means that the duty cycle is rela-                                    with the same RDS(on) for high and low side.
tively fixed in the synch buck converter, whereas
the duty is continuously changing in the Class
D amplifier with an average duty of 50%.

In the synch buck converter the load current
direction is always towards the load, but in Class
D the current flows in both directions.



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                                                                Now lets look at the losses for a Class D ampli-
Power Losses in the MOSFETs                                     fier. The total power loss in the output devices
                                                                for a Class D amplifier are given by:
The losses in the power switches are very dif-
ferent between linear amplifiers and Class D                              PTOTAL = Psw + Pcond + Pgd
amplifiers. First lets look at the losses in a lin-
ear Class AB amplifier. The losses can be de-                   Psw are the switching losses and are given by
fined as:                                                       the equation:
              π
        1     Vcc
                  (1 − K sin ω ⋅ t ) Vcc K sin ω ⋅ t • dω ⋅ t
                                                                                       2
PC =       ⋅∫                                                       Psw = COSS ⋅VBUS ⋅ f PWM + I D ⋅VDS ⋅ t f ⋅ f PWM
       2 ⋅π 0 2                     2 ⋅ RL
                                                                Pcond are the conduction losses and are given
Where K is the ratio of Vbus to output voltage.                 by the equation:
                                                                                           RDS (ON )
This can then be simplified down to the follow-                               Pcond =                  ⋅ Po
ing equation for the linear amplifier Power switch                                           RL
losses:
                                                                Pgd are the gate drive losses and are given by
                      Vcc2       2K K 2                       the equation:
              Ptot =           ⋅
                                 π − 2 
                     8π ⋅ RL                                                Pgd = 2 ⋅ Qg ⋅Vgs ⋅ f PWM

Note that the power loss is not related to the                  As can be seen in a Class D amplifier the out-
output device parameters. Fig 5) below shows                    put losses are dependant on the parameters of
the power loss vs K.                                            the device used, so optimization is needed to
                                                                have the most effective device, based on Qg,
                  Loss                                          RDS(on), COSS, and tf . Fig 6 below shows the power
                                                                losses vs K for the Class D amplifier.
              VCC
                   2                                                 Loss
Pc     0 .2
              8 RL
                                                                            Efficiency can be
                                                                            improved further!




                                     K=2/ƒÎ      K=1                                                      K=1

Fig 5) Power Loss vs. K for Linear Class AB Amplifier                Fig 6 Power Loss vs. K for Class D Amplifie


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AN-1071




                          Table 1: Topology Comparison (Half-bridge vs. Full-bridge)


Similar to conventional Class AB amplifiers,             In the half-bridge topology, the power supply
Class D amplifiers can be categorized into two           might suffer from the energy being pumped back
topologies, half-bridge and full-bridge configu-         from the amplifier, resulting in severe bus volt-
rations. Each topology has pros and cons. In             age fluctuations when the amplifier outputs low
brief, a half-bridge is potentially simpler, while a     frequency audio signals to the load. This kick-
full-bridge is better in audio performance. The          back energy to the power supply is a funda-
full-bridge topology requires two half-bridge            mental characteristic of Class D amplification.
amplifiers, and thus, more components. How-              Complementary switching legs in the full-bridge
ever, the differential output structure of the           tend to consume energy from the other side of
bridge topology inherently can cancel even the           the leg, so there is no energy being pumped
order of harmonic distortion components and              back towards the power supply.
DC offsets, as in Class AB amplifiers. A full-
bridge topology allows of the use of a better            Table 1 shows the summary of the comparison.
PWM modulation scheme, such as the three
level PWM which essentially has fewer errors
due to quantization.




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                                   Fig 7: Major Cause of Degradation

An ideal Class D amplifying stage has no dis-                 diode characteristics.
tortion and no noise generation in the audible             4. Parasitic components that cause ring-
band, along with providing 100% efficiency.                   ing on transient edges
However, as shown in Fig 7, practical Class D              5. Power supply voltage fluctuations due
amplifiers have imperfections that generate dis-              to its finite output impedance and reac-
tortions and noise. The imperfections are                     tive power flowing through the DC bus
caused by the distorted switching waveform                 6. Non-linearity in the output LPF.
being generated by the Class D stage. The
causes are:                                           In general, switching timing error in a gate sig-
                                                      nal is the primary cause of the nonlinearity. The
     1. Nonlinearity in the PWM signal from           timing error due to dead-time in particular has
        modulator to switching stage due to lim-      the most significant contribution of nonlinearity
        ited resolution and/or jitter in timing       in a Class D stage. A small amount of dead-
     2. Timing errors added by the gate drivers,      time in the tens of nano-seconds can easily
        such as dead-time, ton/toff, and tr/tf        generate more than 1% of THD (Total Harmonic
     3. Unwanted characteristics in the               Distortion). Accurate switching timing is always
        switching devices, such as finite ON re-      a primary concern.
        sistance, finite switching speed or body
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AN-1071




Let us take a look at how the dead-time affects nonlinearity.




                                         Fig 8: THD and Dead-time

The operation mode in a Class D output stage            tive DC bus. This action is automatically caused
can be categorized into three different regions         by the commutation current from the demodu-
based on how the output waveform follows the            lation inductor, regardless of low side turn-on
input timing. In those three different operation        timing. Therefore the timing in the output wave-
regions, the output waveform follows different          form is not influenced by the dead-time inserted
edges in high side and low side input signals.          into the turn-on edge of low side, and always
                                                        follows the high side input timing. Consequently,
Let’s examine the first operating region where          the PWM waveform is shortened only by the
the output current flows from the Class D stage         dead-time inserted into the high side gate sig-
to the load when the amount of the current is           nal, resulting in slightly lower voltage gain as
larger than the inductor ripple current. At the         expected from the input duty cycle.
instant of high side turn-off and prior to low side
turn-on, the output node is driven to the nega-

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AN-1071




A similar situation happens to the negative op-           different gain. The output waveform will be dis-
eration region where the output current flows             torted by these three different gain regions in a
from the load to the Class D stage. The amount            cycle of the audio signal.
of the current is larger than the inductor ripple
current. In this case, the timing in the output           Fig. 8 shows how significantly dead time affects
waveform is not influenced by the dead-time               THD performance. A 40nS dead time can cre-
inserted into the turn-on edge of the high side,          ate 2% THD. This can be improved to 0.2% by
and always follows the low side input timing.             tightening the dead time down to 15nS. This
Consequently, the PWM waveform is shortened               punctuates the significance of seamless high
only by the dead-time inserted into the low side          side and low side switching for better linearity.
gate signal.
                                                          Audio Performance Measurement
There is a region between the two operation
modes described earlier where the output tim-             Audio measuring equipment with an AES17
ing is independent of the dead-time. When the             brick wall filter, such as Audio Precision AP2,
output current is smaller than the inductor ripple        are necessary. However a classic audio ana-
current, the output timing follows the turn-off           lyzer like the HP8903B can be used with ap-
edge of each input because, in this region, turn-         propriate pre-stage low pass filter is applied. The
on is made by ZVS (Zero Voltage Switching)                important consideration here is that the output
operation. Hence, there is no distortion in this          signal of a Class D amplifier still contains sub-
middle region.                                            stantial amount of switching frequency carrier
                                                          on its waveform, which causes a wrong read-
As the output current varies according to the             ing, and those analyzers might not be immune
audio input signal, the Class D stage changes             enough to the carrier leak from a Class D am-
its operation regions, which each have a slightly         plifier. Fig. 9 shows an example of a filter.


                         470                680                  1K

                         R1                  R2                  R3


     8
     R4                             4.7n                  2.2n             1n                HP8903
                                    C1                    C2               C3




                                      Fig 9: Example of an output filter




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                                  Fig 10: Shoot-through prevention



However, a narrow dead-time can be very              for a reliable design of a Class D amplifier to
risky in mass production. Because once               ensure that the dead-time is always positive and
both high and low side MOSFETs are turned            never negative to prevent MOSFETs from en-
on simultaneously, the DC bus voltage will           tering the shoot through condition.
be short circuited by the MOSFETs. A huge
amount of shoot-through current starts to
flow, which will result in device destruction.
It should be noticed that the effective dead-
time can be vary from unit to unit variation
of component values and its die tempera-
ture. Fig. 10 shows the relationship between
the length of the dead time and the amount of
shoot-through charge. It is extremely important



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                                       Fig 11: Power Supply Pumping


Another marked cause of degradation in Class           power supply has no way to absorb the energy
D amplifiers is bus pumping, which can be seen         coming back from the load. Consequently the
when the half bridge topology is powering a low        bus voltage is pumped up, creating bus voltage
frequency output to the load. Always keep in           fluctuations.
mind that the gain of a Class D amplifier stage
is directly proportional to the bus voltage. There-    Bus pumping does not occur in full bridge to-
fore, bus fluctuation creates distortion. Since the    pologies because the energy kicked back to the
energy flowing in the Class D switching stage          power supply from one side of the switching leg
is bi-directional, there is a period where the         will be consumed in the other side of the
Class D amplifier feeds energy back to the             switching leg.
power supply. The majority of the energy flow-
ing back to the supply is from the energy stored
in the inductor in the output LPF. Usually, the


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                                   Fig 12: EMI Considerations


EMI (Electro-Magnetic Interference) in Class      ducting state unless the stored minority car-
D amplifier design is troublesome like in         rier is fully discharged. This reverse recov-
other switching applications. One of the          ery current tends to have a sharp spiky
major sources of EMI comes from the re-           shape and leads to unwanted ringing from
verse recovery charge of the MOSFET body          stray inductances in PCB traces and the
diode flowing from the top rail to the bot-       package. Therefore, PCB layout is crucial for
tom, similar to the shoot-through current.        both ruggedness of the design and reduc-
During the dead-time inserted to prevent          tion of EMI.
shoot through current, the inductor current
in the output LPF turns on the body diode.
In the next phase when the other side of the
MOSFET starts to turn on at the end of the
dead-time, the body diode stays in a con-


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AN-1071




Conclusion

Highly efficient Class D amplifiers now provide
similar performances to conventional Class AB
amplifier if key components are carefully se-
lected and the layout takes into account the
subtle, yet significant impact of parasitic com-
ponents.

Constant innovations in semiconductor tech-
nologies are increasing the use of Class D am-
plifiers usage due to improvements in higher
efficiency, increased power density and better
audio performance.




                  WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
                        http://www.irf.com/ Data and specifications subject to change without notice. 2/8/2005

14                                                                                               www.irf.com

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Gajendra

  • 1. Application Note AN-1071 Class D Audio Amplifier Basics By Jun Honda & Jonathan Adams Table of Contents Page What is a Class D Audio Amplifier? – Theory of Operation ..................2 Topology Comparison – Linear vs. Class D .........................................4 Analogy to a Synchronous Buck Converter..........................................5 Power Losses in the MOSFETs ...........................................................6 Half Bridge vs. Full Bridge....................................................................7 Major Cause of Imperfection ................................................................8 THD and Dead Time ............................................................................9 Audio Performance Measurement........................................................10 Shoot Through and Dead Time ............................................................11 Power Supply Pumping ........................................................................12 EMI Consideration: Qrr in Body Diode .................................................13 Conclusion ...........................................................................................14 A Class D audio amplifier is basically a switching amplifier or PWM amplifier. There are a number of different classes of amplifiers. This application note takes a look at the definitions for the main classifications. www.irf.com AN-1071 1
  • 2. AN-1071 What is a Class D Audio Amplifier - non-linearity of Class B designs is overcome, Theory of Operation without the inefficiencies of a Class A design. Efficiencies for Class AB amplifiers is about A Class D audio amplifier is basically a switch- 50%. ing amplifier or PWM amplifier. There are a num- ber of different classes of amplifiers. We will take Class D – This class of amplifier is a switching a look at the definitions for the main classifica- or PWM amplifier as mentioned above. This tions as an introduction: class of amplifier is the main focus of this appli- cation note. In this type of amplifier, the switches Class A – In a Class A amplifier, the output de- are either fully on or fully off, significantly re- vices are continuously conducting for the entire ducing the power losses in the output devices. cycle, or in other words there is always bias Efficiencies of 90-95% are possible. The audio current flowing in the output devices. This to- signal is used to modulate a PWM carrier sig- pology has the least distortion and is the most nal which drives the output devices, with the linear, but at the same time is the least efficient last stage being a low pass filter to remove the at about 20%. The design is typically not high frequency PWM carrier frequency. complementary with a high and low side output devices. From the above amplifier classifications, classes A, B and AB are all what is termed linear ampli- Class B – This type of amplifier operates in the fiers. We will discuss the differences between opposite way to Class A amplifiers. The output Linear and Class D amplifiers in the next sec- devices only conduct for half the sinusoidal cycle tion. The block diagram of a linear amplifier is (one conducts in the positive region, and one shown below in fig 1. In a linear amplifier the conducts in the negative region), or in other signals always remain in the analog domain, words, if there is no input signal then there is and the output transistors act as linear regula- no current flow in the output devices. This class tors to modulate the output voltage. This results of amplifier is obviously more efficient than Class in a voltage drop across the output devices, A, at about 50%, but has some issue with lin- which reduces efficiency. earity at the crossover point, due to the time it takes to turn one device off and turn the other Class D amplifiers take on many different forms, device on. some can have digital inputs and some can have analog inputs. Here we will focus on the type Class AB – This type of amplifier is a combina- which have analog inputs. tion of the above two types, and is currently one of the most common types of power amplifier in existence. Here both devices are allowed to conduct at the same time, but just a small amount near the crossover point. Hence each device is conducting for more than half a cycle but less than the whole cycle, so the inherent 2 www.irf.com
  • 3. AN-1071 Feedback Triangle Generator +Vcc Nch Level Shift COMP Deadtime + - Error Amp Nch + Fig 1 Block Diagram of a Class D Amplifier -Vcc Fig 1 above shows the basic block diagram for the input signal is a standard audio line level a Half Bridge Class D amplifier, with the wave- signal. This audio line level signal is sinusoidal forms at each stage. This circuit uses feedback with a frequency ranging from 20Hz to 20kHz from the output of the half-bridge to help com- typically. This signal is compared with a high pensate for variations in the bus voltages. frequency triangle or sawtooth waveform to cre- ate the PWM signal as seen in fig 2a below. So how does a Class D amplifier work? A Class This PWM signal is then used to drive the power D amplifier works in very much the same way stage, creating the amplified digital signal, and as a PWM power supply (we will show the anal- finally a low pass filter is applied to the signal to ogy later). Let’s start with an assumption that filter out the PWM carrier frequency and retrieve the sinusoidal audio signal (also seen in fig 2b). COMP Class D switching stage LPF Fig 2a PWM Signal Generation Fig 2b Output Filtering Fig 2) Class D Amplifier Waveforms www.irf.com 3
  • 4. AN-1071 Topology Comparison – Linear vs. Class D Gain – With Linear amplifiers the gain is con- stant irrespective of bus voltage variations, how- In this section we will discuss the differences ever with Class D amplifiers the gain is propor- between linear (Class A and Class AB) amplifi- tional to the bus voltage. This means that the ers, and Class D digital power amplifiers. The power supply rejection ratio (PSRR) of a Class primary and main difference between linear and D amplifier is 0dB, whereas the PSRR of a lin- Class D amplifiers is the efficiency. This is the ear amplifier is very good. It is common in Class whole reason for the invention of Class D am- D amplifiers to use feedback to compensate for plifiers. The Linear amplifiers is inherently very the bus voltage variations. linear in terms of its performance, but it is also very inefficient at about 50% typically for a Class Energy Flow – In linear amplifiers the energy AB amplifier, whereas a Class D amplifier is flow is always from supply to the load, and in much more efficient, with values in the order of Full bridge Class D amplifiers this is also true. A 90% in practical designs. Fig 3 below shows half-bridge Class D amplifier however is differ- typical efficiency curves for linear and Class D ent, as the energy flow can be bi-directional, amplifiers. which leads to the “Bus pumping” phenomena, which causes the bus capacitors to be charged up by the energy flow from the load back to the ƒÅ Temp rise test condition supply. This occurs mainly at the low audio fre- quencies i.e. below 100Hz. Output Linear Amplifier ƒÅ Output Class D Amplifier Fig 3 Linear and Class D Amplifier Efficiencies 4 www.irf.com
  • 5. AN-1071 Analogy to a Synchronous Buck Converter A simple analogy can be made between a Class D amplifier and a synchronous buck converter. The topologies are essentially the same as can be seen below in fig 4. Fc of LPF is above 20KHz Gate Driver Gate Driver Q1 MOSFET Q1 MOSFET U1A U1A 8 8 L1 L1 3 3 + 1 + 1 2 2 - INDUCTOR - INDUCTOR ERROR AMP Vref ERROR AMP 4 R1 4 R1 C1 LOAD C1 LOAD CAPACITOR CAPACITOR Q2 Q2 MOSFET MOSFET Audio signal input as a reference voltage Buck Converter Class D amplifier Fig 4 Topologies for Synchronous Buck Converter and a Class D amplifier The main difference between the two circuits is The final difference is in the way the MOSFETs that the reference signal for the synchronous are optimized. The Synch buck converter is buck converter is a slow changing signal from optimized differently for the high and low side the feedback circuit( a fixed voltage), in the MOSFETs, with lower RDS(on) for longer duty and case of the Class D amplifier the reference sig- low Qg for short duty. The Class D amplifier has nal is an audio signal which is continuously the same optimization for both of the MOSFETs, changing. This means that the duty cycle is rela- with the same RDS(on) for high and low side. tively fixed in the synch buck converter, whereas the duty is continuously changing in the Class D amplifier with an average duty of 50%. In the synch buck converter the load current direction is always towards the load, but in Class D the current flows in both directions. www.irf.com 5
  • 6. AN-1071 Now lets look at the losses for a Class D ampli- Power Losses in the MOSFETs fier. The total power loss in the output devices for a Class D amplifier are given by: The losses in the power switches are very dif- ferent between linear amplifiers and Class D PTOTAL = Psw + Pcond + Pgd amplifiers. First lets look at the losses in a lin- ear Class AB amplifier. The losses can be de- Psw are the switching losses and are given by fined as: the equation: π 1 Vcc (1 − K sin ω ⋅ t ) Vcc K sin ω ⋅ t • dω ⋅ t 2 PC = ⋅∫ Psw = COSS ⋅VBUS ⋅ f PWM + I D ⋅VDS ⋅ t f ⋅ f PWM 2 ⋅π 0 2 2 ⋅ RL Pcond are the conduction losses and are given Where K is the ratio of Vbus to output voltage. by the equation: RDS (ON ) This can then be simplified down to the follow- Pcond = ⋅ Po ing equation for the linear amplifier Power switch RL losses: Pgd are the gate drive losses and are given by Vcc2  2K K 2  the equation: Ptot = ⋅  π − 2  8π ⋅ RL   Pgd = 2 ⋅ Qg ⋅Vgs ⋅ f PWM Note that the power loss is not related to the As can be seen in a Class D amplifier the out- output device parameters. Fig 5) below shows put losses are dependant on the parameters of the power loss vs K. the device used, so optimization is needed to have the most effective device, based on Qg, Loss RDS(on), COSS, and tf . Fig 6 below shows the power losses vs K for the Class D amplifier. VCC 2 Loss Pc 0 .2 8 RL Efficiency can be improved further! K=2/ƒÎ K=1 K=1 Fig 5) Power Loss vs. K for Linear Class AB Amplifier Fig 6 Power Loss vs. K for Class D Amplifie 6 www.irf.com www.irf.
  • 7. AN-1071 Table 1: Topology Comparison (Half-bridge vs. Full-bridge) Similar to conventional Class AB amplifiers, In the half-bridge topology, the power supply Class D amplifiers can be categorized into two might suffer from the energy being pumped back topologies, half-bridge and full-bridge configu- from the amplifier, resulting in severe bus volt- rations. Each topology has pros and cons. In age fluctuations when the amplifier outputs low brief, a half-bridge is potentially simpler, while a frequency audio signals to the load. This kick- full-bridge is better in audio performance. The back energy to the power supply is a funda- full-bridge topology requires two half-bridge mental characteristic of Class D amplification. amplifiers, and thus, more components. How- Complementary switching legs in the full-bridge ever, the differential output structure of the tend to consume energy from the other side of bridge topology inherently can cancel even the the leg, so there is no energy being pumped order of harmonic distortion components and back towards the power supply. DC offsets, as in Class AB amplifiers. A full- bridge topology allows of the use of a better Table 1 shows the summary of the comparison. PWM modulation scheme, such as the three level PWM which essentially has fewer errors due to quantization. www.irf.com 7
  • 8. AN-1071 Fig 7: Major Cause of Degradation An ideal Class D amplifying stage has no dis- diode characteristics. tortion and no noise generation in the audible 4. Parasitic components that cause ring- band, along with providing 100% efficiency. ing on transient edges However, as shown in Fig 7, practical Class D 5. Power supply voltage fluctuations due amplifiers have imperfections that generate dis- to its finite output impedance and reac- tortions and noise. The imperfections are tive power flowing through the DC bus caused by the distorted switching waveform 6. Non-linearity in the output LPF. being generated by the Class D stage. The causes are: In general, switching timing error in a gate sig- nal is the primary cause of the nonlinearity. The 1. Nonlinearity in the PWM signal from timing error due to dead-time in particular has modulator to switching stage due to lim- the most significant contribution of nonlinearity ited resolution and/or jitter in timing in a Class D stage. A small amount of dead- 2. Timing errors added by the gate drivers, time in the tens of nano-seconds can easily such as dead-time, ton/toff, and tr/tf generate more than 1% of THD (Total Harmonic 3. Unwanted characteristics in the Distortion). Accurate switching timing is always switching devices, such as finite ON re- a primary concern. sistance, finite switching speed or body 8 www.irf.com
  • 9. AN-1071 Let us take a look at how the dead-time affects nonlinearity. Fig 8: THD and Dead-time The operation mode in a Class D output stage tive DC bus. This action is automatically caused can be categorized into three different regions by the commutation current from the demodu- based on how the output waveform follows the lation inductor, regardless of low side turn-on input timing. In those three different operation timing. Therefore the timing in the output wave- regions, the output waveform follows different form is not influenced by the dead-time inserted edges in high side and low side input signals. into the turn-on edge of low side, and always follows the high side input timing. Consequently, Let’s examine the first operating region where the PWM waveform is shortened only by the the output current flows from the Class D stage dead-time inserted into the high side gate sig- to the load when the amount of the current is nal, resulting in slightly lower voltage gain as larger than the inductor ripple current. At the expected from the input duty cycle. instant of high side turn-off and prior to low side turn-on, the output node is driven to the nega- www.irf.com 9
  • 10. AN-1071 A similar situation happens to the negative op- different gain. The output waveform will be dis- eration region where the output current flows torted by these three different gain regions in a from the load to the Class D stage. The amount cycle of the audio signal. of the current is larger than the inductor ripple current. In this case, the timing in the output Fig. 8 shows how significantly dead time affects waveform is not influenced by the dead-time THD performance. A 40nS dead time can cre- inserted into the turn-on edge of the high side, ate 2% THD. This can be improved to 0.2% by and always follows the low side input timing. tightening the dead time down to 15nS. This Consequently, the PWM waveform is shortened punctuates the significance of seamless high only by the dead-time inserted into the low side side and low side switching for better linearity. gate signal. Audio Performance Measurement There is a region between the two operation modes described earlier where the output tim- Audio measuring equipment with an AES17 ing is independent of the dead-time. When the brick wall filter, such as Audio Precision AP2, output current is smaller than the inductor ripple are necessary. However a classic audio ana- current, the output timing follows the turn-off lyzer like the HP8903B can be used with ap- edge of each input because, in this region, turn- propriate pre-stage low pass filter is applied. The on is made by ZVS (Zero Voltage Switching) important consideration here is that the output operation. Hence, there is no distortion in this signal of a Class D amplifier still contains sub- middle region. stantial amount of switching frequency carrier on its waveform, which causes a wrong read- As the output current varies according to the ing, and those analyzers might not be immune audio input signal, the Class D stage changes enough to the carrier leak from a Class D am- its operation regions, which each have a slightly plifier. Fig. 9 shows an example of a filter. 470 680 1K R1 R2 R3 8 R4 4.7n 2.2n 1n HP8903 C1 C2 C3 Fig 9: Example of an output filter 10 www.irf.com
  • 11. AN-1071 Fig 10: Shoot-through prevention However, a narrow dead-time can be very for a reliable design of a Class D amplifier to risky in mass production. Because once ensure that the dead-time is always positive and both high and low side MOSFETs are turned never negative to prevent MOSFETs from en- on simultaneously, the DC bus voltage will tering the shoot through condition. be short circuited by the MOSFETs. A huge amount of shoot-through current starts to flow, which will result in device destruction. It should be noticed that the effective dead- time can be vary from unit to unit variation of component values and its die tempera- ture. Fig. 10 shows the relationship between the length of the dead time and the amount of shoot-through charge. It is extremely important www.irf.com 11
  • 12. AN-1071 Fig 11: Power Supply Pumping Another marked cause of degradation in Class power supply has no way to absorb the energy D amplifiers is bus pumping, which can be seen coming back from the load. Consequently the when the half bridge topology is powering a low bus voltage is pumped up, creating bus voltage frequency output to the load. Always keep in fluctuations. mind that the gain of a Class D amplifier stage is directly proportional to the bus voltage. There- Bus pumping does not occur in full bridge to- fore, bus fluctuation creates distortion. Since the pologies because the energy kicked back to the energy flowing in the Class D switching stage power supply from one side of the switching leg is bi-directional, there is a period where the will be consumed in the other side of the Class D amplifier feeds energy back to the switching leg. power supply. The majority of the energy flow- ing back to the supply is from the energy stored in the inductor in the output LPF. Usually, the 12 www.irf.com
  • 13. AN-1071 Fig 12: EMI Considerations EMI (Electro-Magnetic Interference) in Class ducting state unless the stored minority car- D amplifier design is troublesome like in rier is fully discharged. This reverse recov- other switching applications. One of the ery current tends to have a sharp spiky major sources of EMI comes from the re- shape and leads to unwanted ringing from verse recovery charge of the MOSFET body stray inductances in PCB traces and the diode flowing from the top rail to the bot- package. Therefore, PCB layout is crucial for tom, similar to the shoot-through current. both ruggedness of the design and reduc- During the dead-time inserted to prevent tion of EMI. shoot through current, the inductor current in the output LPF turns on the body diode. In the next phase when the other side of the MOSFET starts to turn on at the end of the dead-time, the body diode stays in a con- www.irf.com 13
  • 14. AN-1071 Conclusion Highly efficient Class D amplifiers now provide similar performances to conventional Class AB amplifier if key components are carefully se- lected and the layout takes into account the subtle, yet significant impact of parasitic com- ponents. Constant innovations in semiconductor tech- nologies are increasing the use of Class D am- plifiers usage due to improvements in higher efficiency, increased power density and better audio performance. WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 http://www.irf.com/ Data and specifications subject to change without notice. 2/8/2005 14 www.irf.com