Microprocessor 8085

1. MICROPROCESSOR 8085
LECTURE 12
INSTRUCTION SET-V
PROF. SANDIP DAS

2. INSTRUCTION CLASSIFICATION
• Data Transfer group
• Arithmetic group
• Logical group
• Branch group
• Stack, I/O and Machine Control group

3. BRANCH
GROUP
Unconditional CALL Instruction
CALL addr(label) Call the subroutine identified by the address T-states: 18 Flags: none
M-cycle-5
CALL instruction is used to call a subroutine. Before the control is transferred to the subroutine,
address of the next instruction is saved in the stack. The content of the stack pointer is decremented by two to
indicate the new stack top. Then the program jumps to the subroutine identified by the address(label).
Conditional CALL Instruction
CC addr (label) Call the subroutine if carry is 1 T-states: 9/18 Flags affected: none
M-cycle-2/5
The program calls the subroutine specified by the address (label) if carry is one.
CNC addr (label) Call the subroutine if carry is 0 T-states: 9/18 Flags affected: none
M-cycle-2/5
The program calls the subroutine specified by the address (label) if carry is zero.
CZ addr (label) Call the subroutine if Z=1 T-states: 9/18 Flags affected: none M-
cycle-2/5
The program calls the subroutine specified by the address (label) if zero flag is one

4. CP addr (label) Call the subroutine if result is plus T-states: 9/18 Flags affected:
none M-cycle-2/5
The program calls the subroutine specified by the address (label) if result is plus.
CM addr (label) Call the subroutine if result is minus T-states: 9/18 Flags affected:
none M-cycle-2/5
The program calls the subroutine specified by the address (label) if result is minus.
CPE addr (label) Call the subroutine if P=1 T-states: 9/18 Flags affected: none M-
cycle-2/5
The program calls the subroutine specified by the address (label) if result has even
parity, i.e. P=1
CPO addr (label) Call the subroutine if P=0 T-states: 9/18 Flags affected: none
M-cycle-2/5
The program calls the subroutine specified by the address (label) if result has odd
parity, i.e. P=0
RETURN
Unconditional RET Instruction
RET (Return from subroutine) T-states: 10 Flags affected: none M-cycle-3
BRANCH
GROUP

5. BRANCH
GROUPConditional RET Instruction
RC addr (label) Return from subroutine if carry is 1 T-states: 10 Flags affected: none
M-cycle-2/5
The program Return from subroutine specified by the address (label) if carry is one.
RNC addr (label) Return from subroutine if carry is 0 T-states: 10 Flags affected: none
M-cycle-2/5
The program Return from subroutine specified by the address (label) if carry is zero.
RZ addr (label) Return from subroutine if Z=1 T-states: 10 Flags affected: none
M-cycle-2/5
The program Return from subroutine specified by the address (label) if zero flag is one
RNZ addr (label) Return from from subroutine if Z=0 T-states: 10 Flags affected: none
M-cycle-2/5
The program Return from subroutine specified by the address (label) if zero flag is zero.
RP addr (label) Return from subroutine if result is plus T-states: 10 Flags affected: none M-cycle-
2/5
The program Return from subroutine specified by the address (label) if result is plus.
RM addr (label) Return from subroutine if result is minus T-states: 10 Flags affected: none M-cycle-
2/5
The program Return from subroutine specified by the address (label) if result is minus.
RPE addr (label) Return from subroutine if P=1 T-states: 10 Flags affected: none M-cycle-

6. BRANCH
GROUPRST n (Restart) T-states-12 M-cycle-3
Instruction Restart locations
RST 0 0000
RST 1 0008
RST 2 0010
RST 3 0018
RST 4 0020
RST 5 0028
RST 6 0030
RST 7 0038
PCHL Jump to address specified by H-L pair T-states-6 Flags-None
M/C-1
Contents of H-L pair are transferred to program counter.

7. PROGRAM TO MULTIPLY TWO 8 BIT
NUMBERS
Address Mnemonics,Operand Remarks
2000 LXI H, 3000H 21 Load H-L pair with address
3000H.
Lower-order of 3000H.
Higher-order of 3000H.
2003 MOV B, M Move the 1st operand from memory
to reg. B.
2004 INX H Increment H-L pair.
2005 MOV C, M Move the 2nd operand from memory
to reg. C.
2006 MVI A, 00H Initialize accumulator with 00H.
Immediate value 00H.
2008 ADD B Add B with A.
2009 DCR C Decrement reg. C (counter).
200A JNZ 2008H Jump back to address 2008H if C ≠ 0.
Lower-order of 2008H.
Higher-order of 2008H.
200D INX H Increment H-L pair.
200E MOV M, A Move the result from accumulator to
memory.
200F HLT Halt.
• Assume that the operands stored at
memory location 3000H is 02H and
3001H is 05H.
• Then, by using successive addition
method, we get 02H + 02H + 02H +
02H + 02H = 0AH.
• Initially, H-L pair is loaded with the
address of first memory location.
• The first operand is moved to
register B from memory location
3000H and H-L pair is incremented
to point to next memory location.
• The second operand is moved to
register C from memory location
3001H to act as counter.
• Accumulator is initialized to 00H.
• Register B is added with accumulator
and the result is stored in
accumulator.
• Register C (counter) is decremented
by 1.
• Then, counter is checked for zero. If
it hasn’t become zero yet, then
register B is again added with
accumulator, and counter is again
checked for zero.
• If counter becomes zero, then H-L
pair is incremented and the result is