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  1. 1. SAP-2
  2. 2. Bidirectional Registers• Either enable or load only active .• During load input lines active output line float• During Enable output lines active input linefloat.• Input and output pins are shorted.• Single set of wires(path) between register andw-bus.
  3. 3. Architecture
  4. 4. Input portPort 1 and Port 2Port 1• Hexadecimal keyboard encoder• Sends ready signal to bit 0 of port 2 (indicatesthe data in port 1 is valid)Port 2Serial In
  5. 5. Program Counter16 bit addressThus can count fromPC= 0000 0000 0000 0000PC= 1111 1111 1111 1111(FFFFH)LOW CLR’
  6. 6. MAR and MEMORY16- bit address to MAR(From ???).• MAR OUTPUT to RAM• Memory Capacity(?????)• 2K ROM(0000H-07FFH) => Monitor Program• 62K RAM(0800H-FFFFH)
  7. 7. Memory Data Register• 8-bit Register• Output setup RAM• Receives data from the bus before writeoperation• Data to the bus after read operation
  8. 8. Instruction Register• 8-bit op code• Can accommodate 256 instruction• Only 42 instruction
  9. 9. Controller SequencerAs usual• Generates the control words(microinstructions)• Has more hardware(larger number ofinstruction)• Control Word is bigger (CON)
  10. 10. AccumulatorSame as SAP-1
  11. 11. ALU and FlagsALU :- Includes both arithmetic and logicaloperation4 or more control bits for determining theoperation to be performedFlag: Represent the status of the arithmetic andlogical operationFilp flops are used;Zero Flag(Z)Sign Flag(S)
  12. 12. Temp,B,and C registersTemporary register (TEMP)Register B and C are used to move data duringprogram run and accessible to programmers.
  13. 13. Outport Ports2 output ports(3 and 4)Port 3 : Drives Hexadecimal displayPort 4: sends ACKNOWLEDGE signals used tohexadecimal encoder.(Handshaking)Serial Out: Serial Transmission of data.
  14. 14. Microprocessor InstructionLDA and STAEg:LDA 2000HSTA 8000H
  15. 15. MVIMVI-Move ImmediateMVI A,37HMVI A,byteMVI B,byteMVI c, byte
  16. 16. Register InstructionMOVMOV A,BMOV A,CMOV B,AMOV B,CMOV C,AMOV C,B
  17. 17. Register InstructionADD and SUBEg ADD B /SUB BADD BADD CSUB BSUB C
  18. 18. Register InstructionINR and DCRINR A/DCR AINR B/DCR BINR C/DCR C
  19. 19. Jump And Call InstructionJMPJMP 3000HJM (Jump if Minus)JZ(Jump if zero)JNZ(Jump if not zero)
  20. 20. Jump And Call InstructionCALLSubroutine ????Call is used to call the subroutineRetReturn back from subroutineProgram Counter contents ????-----stored in the last two location of memory(FFFEH and FFFFH)
  21. 21. Logic InstructionCMA-Complement the accumulatorANA-And the accumulator with specified registereg ANA BORA- OR the accumulator with specified registereg ORA BXRA- XOR the accumulator with specified registereg XRA B
  22. 22. ANI: And ImmediateEg ANI C7H (AND accumulator with immediatedata C7H)ORI: OR immediateEg ORI C7HXRI: XOR immediateEg XRI C7H
  23. 23. Other InstructionOUT ( OUT byte eg: OUT 03H: accumulator to designated port)HLTIN(Input : Enter the data from designated input port to accumulator)eg: IN 02HNOPRAL(Rotate the accumulator left)A=1011 0100 After executionA=0110 1001RAR (Rotate the accumulator right)A= 1011 0100After executionA=0101 1010