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A random number generator for rfid tags
- 1. International JournalElectronics and Communication Engineering & Technology (IJECET),
International Journal of of Electronics and Communication
Engineering 6464(Print), ISSN 0976 – 6472(Online) Volume 1, Number 1, Sep - Oct (2010), © IAEME
ISSN 0976 –
& Technology (IJECET) IJECET
ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online)
Volume 1, Number 1, Sep - Oct (2010), pp. 71-87 ©IAEME
© IAEME, http://www.iaeme.com/ijecet.html
A RANDOM NUMBER GENERATOR FOR RFID TAGS
Mala Mitra
Department of Electronics and Communication Engineering
PES School of Engineering, Hosur Road, Electronic City
Bangalore, Email: mala_2001_in@yahoo.com
ABSTRACT
In this paper, a true random number generator based on a simple circuit is
proposed. The circuit consists of an operational amplifier with a positive feedback. It is a
Schmitt trigger circuit without any applied input signal. A Schmitt trigger circuit gives a
positive saturated output voltage +Vsat or negative saturated output voltage -Vsat
depending on the differential input is negative or positive at the instant of power supply
switch on. In the presence of any input signal the output state changes at the crossing of
either the upper trigger point or the lower trigger point. In absence of any input signal the
input shall be governed by resultant thermal noise voltage of the resistors present at the
input. It shall be set at one level either +Vsat /bit 1 or -Vsat /bit 0 depending on the polarity
of the differential input thermal noise. Instead of constant supply voltages to bias the
operational amplifier clock pair may be used. The polarity of the thermal noise voltage of
the resistors present at the input at the instant of rising/falling edge of the clock pair
decides the polarity of the output pulses. Since polarity of thermal noise voltage is
random the output bit-pattern of 1 and 0 is also random. The output bits are in polar RZ
format with no dc component. Results show that, the output passes the NIST test directly.
No further randomization of the output bits or input voltage control is required. The
proposed random number generator is suitable for RFID tag security and privacy
algorithms as the random number generator is very robust to noise, thermal and power
attacks prevalent in RFID systems. The simple circuit proposed here can be implemented
in existing popular embedded systems for RFID tags e.g. MSP430 microcontroller or
WISP.
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ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 1, Number 1, Sep - Oct (2010), © IAEME
Keywords: Johnson noise, NIST test, Operational amplifier, Schmitt trigger, Security
and privacy of RFID systems.
INTRODUCTION
RFID is a low-cost solution for object identification. Some of the typical
applications are supply chain management, access control, library management, smart
appliances etc. [1, 2]. As technology advances, RFID is penetrating more and more in our
everyday life. For more widespread applications and to make these systems more popular
the security and privacy of the system must be enhanced [3, 4]. An RFID tag sends an
Electronic Product Code or EPC for the object to which it is tagged. It gives information
about the object class and a unique identification number to any interrogator. This may
create a privacy problem.
For instance, an RFID tag can be impregnated on little Alice. While Alice plays
alone in her wonderland her parents can keep track of her using a RFID detector. Even if
Alice hides behind a bush the EPC code from the tag can be read by the detector as RFID
system does not need any Line of Sight (LOS) operation. But the problem is, the tag on
Alice responds to any detector that conforms to the standard. An adversary can use her
detector and by reading the object class can find out all the kids with RFID tags in the
vicinity. A kidnapper may track little Alice with the identity number available in the EPC
code. This may help to concoct a kidnap plan. Further after knowing the EPC code a tag
can be cloned with the same code. The cloned tag can be used for misguiding the parents
after a kidnap. The transmission from the original impregnated tag on Alice can be
prevented by a metal shield.
Standard encryption algorithms e.g. RSA, ECC [5, 6] cannot protect against
tracking and cloning. After standard encryption a tag shall send the same encrypted EPC
for any interrogation by any detector. An adversary can track an object or a person by the
encrypted EPC. No knowledge of the secret key is needed. With the encrypted EPC, tags
may be cloned. In case of RFID tag, the encryption algorithm should give different
cipher-text or encrypted EPC for each enquiry. However, the authentic interrogator
should have some secret information or a key to decrypt and get the unique EPC in every
interrogation. Without this secret key the adversary shall not be able to track the tag as
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ISSN 0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 1, Number 1, Sep - Oct (2010), © IAEME
each time her detector receives an apparently random number. Many algorithms have
been proposed in recent days to prevent tracking and cloning. Most of the advanced
algorithms use random numbers to randomize the cipher-text [7, 8].
Many random number generators (RNGs) have been proposed in the past and in
recent times [9 - 28]. Some of them are quite fit to serve a specific application e.g.
genetic algorithm [21], cryptography [10], random frequency hopping in a spread
spectrum communication system [22]. These technologies cannot be directly
implemented for RFID tags as RNG of an RFID tag must have some special features.
Some of the special requirements of the RNG for an RFID tag are listed below.
I. Robust to Thermal Attacks:
RFID tags and so the RNG must work for a varying working environment.
Thermal attack where an adversary deliberately changes the tag temperature to get
predictable data is quite possible. However, any RNG may fail beyond a certain range of
temperature. It is to be noted that attack usually takes place when a human carries the tag.
A human being feels uncomfortable when the temperature deviates abruptly by ± 15 0C
from the normal. In such situation the tag can be made inoperable with a metal film
cover. Within the comfortable temperature range the RNG should deliver unpredictable
data. Tokunaga et al. and Bellido et al [11, 23] utilized thermal noise voltage as input to a
meta-stable system. It was shown that at meta-stable point deterministic noise is less
when the resolution time of the output bit is high and the output bits from the system can
be considered as random. This meta-stable point is very sensitive to input bias, which in
its turn changes with ambient temperature. A control system brings the system back to a
meta-stable point if resolution time is below threshold. With a thermal attack before the
control system works initial bits may get predictable. As a measure, bits are dropped
when resolution time is low. But measured resolution time is an average for 128 bits. The
attack may happen for less number of bits maintaining the average resolution time at a
satisfactory level.
II. Robust to Power Attacks:
The random number generator should be robust against power attacks. Most of
the RFID tags are passive or battery-less. Those utilize the detector power. An adversary
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may deliberately transmit less power from the detector. The tag RNG may generate same
bit 0 or predictable bits when it is power hungry or supply voltage or current to the circuit
is low. This attack has been demonstrated for Philips Mifare tags [29].
In many of the RNGs randomness is decided by the clock jitter or time difference
between a clock pair. In a passive RFID tag instead of generation of clock pair the
transmitted pulse train from the detector can be utilized. In that case, the time difference
or clock jitter information is also available in the detector and the random number
produced is known to adversary [15].
III.Lightweight:
RNG and the RFID tag containing it must be lightweight. In most of the cases the
strategies used for RNGs give pseudo-random numbers. Additional circuits are used to
further randomize it. This takes additional chip area and the RNG no longer remains
lightweight. One of the strategies for RNG is to utilize thermal noise voltage as it is
known as one of the best sources of random noise. Since amplitude of noise voltage is
very low efforts were made to amplify it [20, 24]. In the process of amplification, the
voltage gets corrupted by deterministic noise generated in the amplifier. Also the finite
bandwidth of the amplifier makes the output colored though there is random or white
noise at the input. Further randomization is done with additional hardware. This
consumes additional Si area. For superconductive RNG in SFQ circuits [10] the circuit is
very sensitive to low thermal noise voltage and further magnification is not required.
However, maintenance of superconductive temperature is beyond the scope of a portable
lightweight device e.g. RFID.
IV.No Seed Value:
RNGs that require seed values [15, 28, 30] are not suitable for RFIDs. In this
automated system manual entry of seed value is not possible. If known parameters e.g.
date or time is used to provide the seed value the unpredictability of the output pattern is
lost. Most of the recent hardware RNGs do not need any seed value.
V.Intermittent Operation:
In some RNGs e.g. continuous chaotic oscillator [9, 25], meta-stable system [11]
initial few bits depend on the initial condition and are predictable. It quickly transforms
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to a state where generated data is unpredictable. For a continuously functioning generator
the first few predictable bits can be discarded. A passive RFID tag goes for a deep sleep
in absence of a detector and the available power. Generator should work satisfactorily as
soon as it wakes up.
VI.Qualify NIST Test Suite:
The output should not follow any definite pattern. The adversary should not be
able to predict the output by applying her knowledge. NIST test [31] has been accepted as
the standard for unpredictability. The output should pass the NIST test.
Apart from these essential features there are some desired features for RFID tags. These
are listed below:
VII.Part of an Embedded System:
There is an urgent need of secured RFID system. It is desirable that the RNG can
be implemented on an embedded system that is already in use for tags e.g. MSP430 /
WISP [32]. In that case, no extra component is needed for the development of tags to
provide security or privacy.
Si Chip Implementation: If embedded implementation is not feasible a fully tested
light-weight IC that can be readily incorporated in the system is desirable.
VIII.Pulsating Voltage:
It is desirable that the system consumes low power. As mentioned earlier, a
passive tag utilizes detector power. Detector transmits power in the form of a pulse train.
Rectifier and regulator circuits are required to convert this pulsating voltage to a stable dc
supply. A part of this power is consumed in these circuits. It is desirable that an RNG can
function with the pulsating voltage instead of stable dc supplies to minimize wastage of
power.
Table I and II show the suitability of recently proposed RNGs for RFID tags.
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Table 1 suitability of proposed random number generators for rfid tags
Refere Basic Principle Any particular Robust Lightweight Intermitt NIST Test
nce drawback to ent Results
Thermal Operatio
(T), and n
Power
(P)
Attacks
Chaotic oscillator, time Implementation No No
difference between clock of off-chip
pairs and further oscillator
(T) Not
randomization inductance along- 17 out of
[9] known
with tag antenna 17
(P) No
inductance
without mutual
coupling
[10] Thermal noise detection Maintenance of No No Not 1 out of 17
in Superconductive superconductive known
Single Flux Quantum temperature 4.2
Circuit K
[11] Meta-stability based -- No No No 7 out of
quality control 17*
[12] Chaos based generator -- Yes No No No result
[13] Meta-stability based Too many No No No 15 out of
output control reference 17
voltages to be
converted from
pulsating voltage
in a passive
RFID tag
[14] Clock jitter and further -- Not Yes Yes 13 out of
chaos known 17
[15] Rising edge time (i) Generation of No Yes Yes Not done
difference between two a pair of
independent clocks independent
clocks in a
passive RFID
tag.
(ii) Further
processing is
affected by clock
period variation.
A time attack is
possible.
[16] Chaos due to Bernoulli Difficult to (T) Yes Yes Yes 9 out of 17
shift and further implement on Si (P) No
randomization due to process
variation
[17] Random jitter in a Nearby ring Not No Yes Not shown
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number of ring oscillators oscillators get known
and further randomization phase locked and
randomness is
less than
expected
[19] Random fluctuation of Soft breakdown No Yes No Not shown
current in a MOS voltage is
capacitor after soft extremely
breakdown and further sensitive to
randomization fabrication
process and
operating
temperature. Any
fluctuation in the
operating point
may lead to no
breakdown or
hard breakdown.
[20] Amplification of thermal Amplifier (T) Not No Yes Not
noise voltage of a resistor degrades the known done
and further randomization randomness of (P) No
the thermal noise
voltage
This Saturation of thermal Yes Yes Yes 11 out of
work noise voltage 17
Table 2 suitability of proposed random number generators for rfid tags (continued)
Implemental in embedded processors Implemented Pulsating
Reference
on Si Power
[9] Not fully No No
[10] No Partly No
[11] No Partly No
[12] Yes, PSOC No need Partly
[13] No Partly No
[14] Yes, Xilinx Vertex II No need Yes
[15] Yes, MSP430 No need No
[16] No No No
[17] Yes, any FPGA. But consumes huge amount No No
of hardware
[19] No No No
[20] No Partly No
This Yes, MSP430, PSOC No need Yes
work
In the next section the proposed circuit of this paper is discussed.
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PROPOSED CIRCUIT
The proposed circuit configuration is based on a Schmitt Trigger circuit [33] as
shown in Fig. 1. Schmitt trigger is a special configuration of operational amplifier where
positive feedback is used. When the input signal applied at negative input exceeds any of
the voltage limits namely upper trigger point or the lower trigger point, the output gets
saturated to negative or the positive saturation voltage respectively.
Question that remains is: what will be the state of the output in absence of input
signal i.e. when the input voltage does not exceed any of the trigger points? Suppose the
supply voltage of the operational amplifier is switched on. The output will saturate to
either the positive or the negative value depending on the polarity of the difference
voltage at the inputs at the time of supply switch on. It will remain to this saturated value
as the input voltage does not exceed the trigger point. Instead of constant supply we can
apply clock and inverted clock at the positive and negative supply terminals of the
operational amplifier respectively as shown in Figure 1. The polarity of the output will be
decided by the polarity of the differential input voltage at the beginning of each pulse
pair. This input voltage can be given as:
Vin = Vtp − Vtn …………………………………………………… (1)
Where, Vtp and Vtn are the random thermal noise voltage of the resistor or Johnson
noise at the non-inverting (marked as + in Figure 1) and inverting node (marked as – in
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Figure 1) respectively. Since the polarity of the output is dependent only on the
difference of two thermal noise voltages or Johnson noise voltages it is truly random. To
satisfy this condition the output voltage Vout should become zero at the end of the off-
state of the clock cycle. In the beginning of the on-state of the clock cycle there should
not be any residual voltage Vor from the previous on-state of the clock cycle. If there is
any Vor then its polarity will decide the polarity of Vin as well as Vout. In this case, the
output will be of same signal level a string of all 1s or all 0s. For a fast clock there will be
Vor. For a fast decay of the output at the off-state of the clock many circuit enhancement
has been thought of. One of them is connection of an nmos / nFET with slightly negative
threshold voltage e.g. -0.1 volt in between output and ground. The gate of the nFET
should be connected to clk . In the off-state of the clock, gate voltage is 0 and the nFET
should conduct. In the on-state, the gate voltage is negative and below threshold of the
nFET so the nFET remains off.
The simple circuit proposed here fulfils the requirement of an RNG for an RFID
tag. These requirements are listed in Table I and discussed in Introduction section. The
following gives the properties of the Proposed Circuit (PC) those make it suitable for an
RFID tag.
I. Robust to Thermal Attacks:
Output bit in the PC depends upon the polarity of the input thermal voltage. Since
variation in temperature does not change the polarity of the input the RNG is robust to
thermal attacks. PC uses only an op-amp and resistors. These components work for a
wide temperature range. For example, LM741, the op-amp used here, has an operating
temperature range of -55 0C to 125 0C. If implemented on MSP430 microcontroller,
during thermal attacks if the temperature goes beyond this range the in-built temperature
sensor can be used to switch it off.
II. Robust to Power Attacks:
PC uses a clock pair instead of constant supplies. If the clock pair amplitude is
reduced the circuit will still remain functional.
III. Lightweight:
PC output gives random bits that pass the NIST test. No further randomization is
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necessary. The simple circuit is very lightweight consisting of only one operational
amplifier.
IV. No Seed Value:
PC is a true random number generator and does not need any seed value.
V. Intermittent Operation:
PC does not need any resolution time to get unpredictable data. Whenever clock
pair is applied at the supply terminals of the operational amplifier random bits are
produced.
VI. Qualify NIST Test Suite:
The tests suitable for small volume of data are done. All the tests are passed.
From NIST test qualification point of view it can be said that, the RNG is unpredictable
for this small volume of data.
VII. Part of an Embedded System:
Since PC consists of only one operational amplifier it can be implemented easily
in MSP430 from Texas Instruments or PSOC from Cypress Semiconductors.
VIII. Pulsating Voltage:
PC does not need any constant power supply instead it functions with a clock pair
as shown in Figure 1.
RESULTS
To study the behavior of the operational amplifier IC741 with a clock pair applied
at the supply terminals simulation is done. The output voltage as given in Fig. 2 is
simulated in TINA TI, a tool developed and supported by Texas Instruments. The clocks
given as clk and clk are applied at negative and positive supply terminal of the
operational amplifier respectively. In this simulator thermal noise voltage could not be
applied at input. Instead a faster clock is applied at the inverting node marked as - in Fig.
1. It can be observed that, the output voltage assumes -3 volts (or +3 volts) if input clock
is +200 mV (or -200 mV) at the beginning of the on-state of the clocks. The output bit-
stream is in polar RZ format with the advantage of no dc component [34].
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The circuit given in Figure 1 has been implemented on a bread-board. 289 bits
have been collected. Some of the tests in NIST require 106 bits. Automatic data
acquisition set-up is not ready at this moment. So such an amount of data could not be
produced. Only those tests with recommended data size less than 289 are carried out.
Lempel Ziv test has not been done as it was deleted from the test suite in the latest
version 800-22b. The programs necessary for all the tests were written in MATLAB. The
programs were tested with standard data that give predictable p-values. The results for the
standard data are listed in Table IV. Table III shows the results for measured data. The p-
values show that all the tests were passed. So the proposed RNG is definitely
unpredictable for 289 data. For higher volume of data it is quite likely that it shall remain
unpredictable.
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Table 3 NIST 800-22b test results for measured data
Test Input size Recommended p value*
Input Size
Frequency Sample size, n=289 n>=100 0.3776
(Monobit) Test Sample size n=122 1.0000
Frequency within a The length of each M>20, M>0.01n,
block block, M=96 . N<100, n≥100 0.4821
The no. of blocks, N
=3.
Total sample size,
n= MN= 288.
Run Sample size, n=289 n≥100 0.401573
Longest Run Sample size, n=128. n M Set I 0.6889
Block length, M=8 128 8 Set II
6272 128 0.9732
750000 100000
Binary Matrix Rank No. of rows in each 0.162297
matrix, M=2 N>= 38
No. of columns in
each matrix, Q=2
No. of matrices,
N=n/{MQ}=72
Total sample size,
n= 288
Non-Overlapping No. of blocks, N=2, N≤100 All p_values≥
Template Matching No. of data in each 0.148207
block, M=144,
Template length,
m=6
Serial (m=2) Sample size, n=289 m<log2n - 2 p value 1 = 0.888179,
Template size, m=2 p value 2 =0.842701.
Serial (m=3) Sample size, n=289 m<log2n - 2 p value 1 = 0.162805,
Template size, m=3 p value 2 = 0.084058.
Approximate Sample size, n=289 m<log2n - 2 p value= 0.453542
Entropy Template size, m=3
Cusum forward Sample size, n=289 n≥100 p value=1.000
Cusum reverse Sample size, n=289 n≥100 p value=1.000
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Table 4 NIST 800-22b test results for standard data
Test p value for data pattern
All 0 All 1 1010--
Frequency 8.2120e-65 8.2120e-65 0.9531
Monobit
Frequency 0.0000 0.0000 1.0000
within a block
Run No need of run test as No need of run test as 8.15516e-65
monobit freq test fails monobit freq test fails
|pai-0.5|=0.500000 >= |pai-0.5|=0.500000 >=
tau=0.117647 tau=0.117647
Longest Run Set I: Set I: Set I:
1.5129X10-32 4.85445X10-41 1.5129X10-32
Set II: Set II: Set II:
1.5129X10-32 4.85445X10-41 1.5129X10-32
Binary Matrix 0.0000 3.2371X10-28 3.2371X10-28
Rank
Non- p value=0.000 for p value = 0.000 for p value =
Overlapping template template 0.000 for
Template 000000000 111111111 templates:
Matching p value = 0.145254 p value = 0.145254 010101010
for other templates fot other templates 101010101
p value =
0.145254
for other
templates
Serial (m=2) p value 1 = 0,000, p value p value 1 = 0.000, p value p value 1 =
2 = 0.000 2 = 0.000 0.000, p value
2 = 0.000
Serial (m =3) p value 1 = 0,000, p value p value 1 = 0,000, p value p value 1 =
2 = 0.000 2 = 0.000 0,000, p value
2 = 0.000
Approximate 0.000 0.000 0.000
Entropy
Cusum forward -1.000 -1.000 1.000
Cusum reverse -1.000 -1.000 1.000
CONCLUSION
A random number generator suitable for RFID tags is proposed. The simple
circuit consists of an op-amp in the Schmitt trigger configuration. In-place of stable
power supplies to the op-amp terminals, clk and clk are applied. No signal is applied at
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the input instead the thermal noise voltage of the resistors at the input is allowed to
saturate and give the output as positive or negative saturation voltage. The circuit output
is simulated with the help of TINA TI. The circuit with a 741 op-amp is developed on a
bread-board. Measured output passes the NIST test.
The simple circuit can be implemented on popular embedded processors for RFID
tags e.g. MSP430 or WISP. Design effort can be made to achieve a low power high speed
op-amp suitable for this purpose.
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