Quiz and Lab Mid-Sem Solutions: DD Quiz 3 – Set-1 (and answers to Set-2) DD Lab Mid-Sem solutions (set-1)

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Session 28: Focus
 Quiz and Lab Mid-Sem Solutions:
◦ DD Quiz 3 – Set-1 (and answers to Set-2)
◦ DD Lab Mid-Sem solutions (set-1)

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DD: Q1
Correct Option: C Set-2 Answer key: B

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DD : Q2
Correct Option: D Set-2 Answer key: A

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IES : Q3
Correct Option: B Set-2 Answer key: C

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DD : Q4
Correct Option: D Set-2 Answer key: C

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IES : Q5
Correct Option: B Set-2 Answer key: A

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DD : Q6
Correct Option: A Set-2 Answer key: B

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DD : Q7
Correct Option: A Set-2 Answer key: B

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DD : Q8
Answer: ANS: Q alternates between zero and one
on every positive clock edge. It remains zero
after the 3rd positive clock edge.
Set-2 The Same Answer

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DD : Q9
Answer: Q(t) or no change, 0, 1, Q’(t) Set-2 The Same Answer

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DD : Q10
Answers:
> CLK
Q’ Q’
CLK
Set-2 The Same Answer

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DD : Q11
Set-2 The Same Answer

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DD : Q12
Answer:
Set-2 The Same Answer

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DD : Q13
Set-2 The Same Answer

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DD : Q14
Set-2 Answer:

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DD : Q15
Set-2 The Same Answer

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DD Lab Mid-Sem Solutions

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DD Lab: Q1
This construction (odd number of not gates) is called Ring Oscillator
The output oscillates between zero and one. The pulse width will be equal to the
Propagation delay of signal going through the logic gates from one end to the other
end of the loop.
We cannot see the flickering of LEDs with naked eyes, since the pulse width
is in the range of a few nano seconds.

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DD Lab: Q2
Answer: Output D is closer
Truth table for an XNOR gate
Input A Input B Output
false false true
false true false
true false false
true true true
XNOR Output:
Perfect output
Both will be given
marks

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DD Lab: Q3
ANS: 1 (for all the even number of XOR gates)

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DD Lab: Q3
ANS: 1 (for all the even number of XOR gates)

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DD Lab: Q4

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DD Lab: Q4 - Answer

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DD Lab: Q5
For Sa

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DD Lab: Q5 … contd.
For Sb

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Session 28: Summary
 Solutions:
◦ DD Quiz 3 – Set-1 (and answers to Set-2)
◦ DD Lab mid-sem solutions (set-1)