minimum instructions set computer

1. MISC
‫الطالب‬ ‫اعداد‬
‫مطر‬ ‫إبراهيم‬ ‫حيدر‬
‫النظم‬ ‫و‬ ‫السيطرة‬ ‫هندسة‬ ‫قسم‬/‫حاسبات‬

2. What is MISC ?
(Minimal Instruction Set Computer architecture)
are based on reducing the number of supported
instructions to a point where only essential instructions
which are necessary for functioning of microprocessor
are left, resulting in simple and reduced opcodes

3. The number of instructions in MISC are much
less than that of RISC, but similar to RISC, MISC
tends to synthesize necessary instructions from
simpler instruction whenever possible

4. As the inventor of MISC, Michael A. Baxter highlighted necessary
components of MISC architecture in his paper where architecture
comprised of :
1. central memory.
2. an instruction buffer.
3. control unit.
4. an I/O control unit.
5. a collection of functional units.
6. a set of register files.
7. and a data routing circuit

5. Key points
* Typically a minimal instruction set computer is viewed as having
32 or fewer instructions where NOP, RESET and CPUID type
instructions are generally not counted by consensus due to their
fundamental nature.
* 32 instructions is viewed as the highest allowable number of
instructions for a MISC, as 16 or 8 instructions are closer to what is
meant by "Minimal Instructions".

6.  •The implemented CPU instructions should by default not support a wide set of inputs, so this
typically means an 8-bit or 16-bit CPU.
 •If a CPU has an NX bit (no-execute) , it is more likely to be viewed as being CISC or RISC.
 •MISC chips typically don't have hardware memory protection of any kind unless there is an
application specific reason to have the feature.
 •If a CPU has a microcode subsystem, that excludes it from being a MISC system.
 •The only addressing mode considered acceptable for a MISC CPU to have is load/store, the same
as for RISC CPUs.
 •MISC CPUs can typically have between 64 KB to 4 GB of accessible addressable memory—but
most MISC designs are under 1 megabyte.

7. Disadvantages
• *Instructions tend to have more sequential dependencies, reducing
overall instruction-level parallelism.
• * Optimal features like Instruction pipelines, branch prediction,
out-of-order execution, register renaming and speculative
execution do not form a part hence, has lower performance.

8. Commercial Usage
MISC design is commercially used as:
* Each STEREO spacecraft includes two P24 MISC CPUs and
two CPU24 MISC CPUs.
* Most commercially successful MISC was the original INMOS
transputer architecture that had no floating-point unit.