2. Levels of Transformation
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Microarchitecture
ISA (Architecture)
Program/Language
Algorithm
Problem
Logic
Circuits
Runtime System
(VM, OS, MM)
Electrons
âThe purpose of computing is insightâ (Richard Hamming)
We gain and generate insight by solving problems
How do we ensure problems are solved by electrons?
3. What is Computer Architecture?
īŽ The science and art of designing, selecting, and
interconnecting hardware components and designing the
hardware/software interface to create a computing system
that meets functional, performance, energy consumption,
cost, and other specific goals.
īŽ We will soon distinguish between the terms architecture,
and microarchitecture.
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4. Computer Architecture Today (I)
īŽ Today is a very exciting time to study computer architecture
īŽ Industry is in a large paradigm shift (to multi-core and
beyond) â many different potential system designs possible
īŽ Many difficult problems motivating and caused by the shift
īą Power/energy constraints ī multi-core?
īą Complexity of design ī multi-core?
īą Difficulties in technology scaling ī new technologies?
īą Memory wall/gap
īą Reliability wall/issues
īą Programmability wall/problem
īą Huge hunger for data and new data-intensive applications
īŽ No clear, definitive answers to these problems
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5. What is A Computer?
īŽ Three key components
īŽ Computation
īŽ Communication
īŽ Storage (memory)
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6. What is A Computer?
īŽ We will cover all three components
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Memory
(program
and data)
I/O
Processing
control
(sequencing)
datapath
7. The Von Neumann Model/Architecture
īŽ Also called stored program computer (instructions in
memory). Two key properties:
īŽ Stored program
īą Instructions stored in a linear memory array
īą Memory is unified between instructions and data
īŽ The interpretation of a stored value depends on the control
signals
īŽ Sequential instruction processing
īą One instruction processed (fetched, executed, and completed) at a
time
īą Program counter (instruction pointer) identifies the current instr.
īą Program counter is advanced sequentially except for control transfer
instructions
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When is a value interpreted as an instruction?
8. The Von Neumann Model/Architecture
īŽ Recommended reading
īą Burks, Goldstein, von Neumann, âPreliminary discussion of the
logical design of an electronic computing instrument,â 1946.
īą Patt and Patel book, Chapter 4, âThe von Neumann Modelâ
īŽ Stored program
īŽ Sequential instruction processing
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9. The Von Neumann Model (of a Computer)
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CONTROL UNIT
IP Inst Register
PROCESSING UNIT
ALU TEMP
MEMORY
Mem Addr Reg
Mem Data Reg
INPUT OUTPUT
10. The Von Neumann Model (of a Computer)
īŽ Q: Is this the only way that a computer can operate?
īŽ A: No.
īŽ Qualified Answer: But, it has been the dominant way
īą i.e., the dominant paradigm for computing
īą for decades
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11. The Dataflow Model (of a Computer)
īŽ Von Neumann model: An instruction is fetched and
executed in control flow order
īą As specified by the instruction pointer
īą Sequential unless explicit control flow instruction
īŽ Dataflow model: An instruction is fetched and executed in
data flow order
īą i.e., when its operands are ready
īą i.e., there is no instruction pointer
īą Instruction ordering specified by data flow dependence
īŽ Each instruction specifies âwhoâ should receive the result
īŽ An instruction can âfireâ whenever all operands are received
īą Potentially many instructions can execute at the same time
īŽ Inherently more parallel
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12. The Von-Neumann Model
īŽ All major instruction set architectures today use this model
īą x86, ARM, MIPS, SPARC, Alpha, POWER
īŽ Underneath (at the microarchitecture level), the execution
model of almost all implementations (or, microarchitectures)
is very different
īą Pipelined instruction execution: Intel 80486 uarch
īą Multiple instructions at a time: Intel Pentium uarch
īą Out-of-order execution: Intel Pentium Pro uarch
īą Separate instruction and data caches
īŽ But, what happens underneath that is not consistent with
the von Neumann model is not exposed to software
īą Difference between ISA and microarchitecture
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13. What is Computer Architecture?
īŽ ISA+implementation definition: The science and art of
designing, selecting, and interconnecting hardware
components and designing the hardware/software interface
to create a computing system that meets functional,
performance, energy consumption, cost, and other specific
goals.
īŽ Traditional (ISA-only) definition: âThe term
architecture is used here to describe the attributes of a
system as seen by the programmer, i.e., the conceptual
structure and functional behavior as distinct from the
organization of the dataflow and controls, the logic design,
and the physical implementation.â Gene Amdahl, IBM
Journal of R&D, April 1964
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14. ISA vs. Microarchitecture
īŽ ISA
īą Agreed upon interface between software
and hardware
īŽ SW/compiler assumes, HW promises
īą What the software writer needs to know
to write and debug system/user programs
īŽ Microarchitecture
īą Specific implementation of an ISA
īą Not visible to the software
īŽ Microprocessor
īą ISA, uarch, circuits
īą âArchitectureâ = ISA + microarchitecture
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Microarchitecture
ISA
Program
Algorithm
Problem
Circuits
Electrons
15. ISA vs. Microarchitecture
īŽ What is part of ISA vs. Uarch?
īą Gas pedal: interface for âaccelerationâ
īą Internals of the engine: implement âaccelerationâ
īŽ Implementation (uarch) can be various as long as it
satisfies the specification (ISA)
īą Add instruction vs. Adder implementation
īŽ Bit serial, ripple carry, carry lookahead adders are all part of
microarchitecture
īą x86 ISA has many implementations: 286, 386, 486, Pentium,
Pentium Pro, Pentium 4, Core, âĻ
īŽ Microarchitecture usually changes faster than ISA
īą Few ISAs (x86, ARM, SPARC, MIPS, Alpha) but many uarchs
īą Why?
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16. ISA
īŽ Instructions
īą Opcodes, Addressing Modes, Data Types
īą Instruction Types and Formats
īą Registers, Condition Codes
īŽ Memory
īą Address space, Addressability, Alignment
īą Virtual memory management
īŽ Call, Interrupt/Exception Handling
īŽ Access Control, Priority/Privilege
īŽ I/O: memory-mapped vs. instr.
īŽ Task/thread Management
īŽ Power and Thermal Management
īŽ Multi-threading support, Multiprocessor support
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17. Microarchitecture
īŽ Implementation of the ISA under specific design constraints
and goals
īŽ Anything done in hardware without exposure to software
īą Pipelining
īą In-order versus out-of-order instruction execution
īą Memory access scheduling policy
īą Speculative execution
īą Superscalar processing (multiple instruction issue?)
īą Clock gating
īą Caching? Levels, size, associativity, replacement policy
īą Prefetching?
īą Voltage/frequency scaling?
īą Error correction?
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18. Property of ISA vs. Uarch?
īŽ ADD instructionâs opcode
īŽ Number of general purpose registers
īŽ Number of ports to the register file
īŽ Number of cycles to execute the MUL instruction
īŽ Whether or not the machine employs pipelined instruction
execution
īŽ Remember
īą Microarchitecture: Implementation of the ISA under specific
design constraints and goals
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19. Design Point
īŽ A set of design considerations and their importance
īą leads to tradeoffs in both ISA and uarch
īŽ Considerations
īą Cost
īą Performance
īą Maximum power consumption
īą Energy consumption (battery life)
īą Availability
īą Reliability and Correctness
īą Time to Market
īŽ Design point determined by the âProblemâ space
(application space), the intended users/market
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Microarchitecture
ISA
Program
Algorithm
Problem
Circuits
Electrons