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Computer Architecture
Lecture 2: Fundamental Concepts and ISA
Adapted from Professor onur motlu,
Carnegie Mellon University
Levels of Transformation
2
Microarchitecture
ISA (Architecture)
Program/Language
Algorithm
Problem
Logic
Circuits
Runtime System
(VM, OS, MM)
Electrons
“The purpose of computing is insight” (Richard Hamming)
We gain and generate insight by solving problems
How do we ensure problems are solved by electrons?
What is Computer Architecture?
īŽ The science and art of designing, selecting, and
interconnecting hardware components and designing the
hardware/software interface to create a computing system
that meets functional, performance, energy consumption,
cost, and other specific goals.
īŽ We will soon distinguish between the terms architecture,
and microarchitecture.
3
Computer Architecture Today (I)
īŽ Today is a very exciting time to study computer architecture
īŽ Industry is in a large paradigm shift (to multi-core and
beyond) – many different potential system designs possible
īŽ Many difficult problems motivating and caused by the shift
īą Power/energy constraints īƒ  multi-core?
īą Complexity of design īƒ  multi-core?
īą Difficulties in technology scaling īƒ  new technologies?
īą Memory wall/gap
īą Reliability wall/issues
īą Programmability wall/problem
īą Huge hunger for data and new data-intensive applications
īŽ No clear, definitive answers to these problems
4
What is A Computer?
īŽ Three key components
īŽ Computation
īŽ Communication
īŽ Storage (memory)
5
What is A Computer?
īŽ We will cover all three components
6
Memory
(program
and data)
I/O
Processing
control
(sequencing)
datapath
The Von Neumann Model/Architecture
īŽ Also called stored program computer (instructions in
memory). Two key properties:
īŽ Stored program
īą Instructions stored in a linear memory array
īą Memory is unified between instructions and data
īŽ The interpretation of a stored value depends on the control
signals
īŽ Sequential instruction processing
īą One instruction processed (fetched, executed, and completed) at a
time
īą Program counter (instruction pointer) identifies the current instr.
īą Program counter is advanced sequentially except for control transfer
instructions
7
When is a value interpreted as an instruction?
The Von Neumann Model/Architecture
īŽ Recommended reading
īą Burks, Goldstein, von Neumann, “Preliminary discussion of the
logical design of an electronic computing instrument,” 1946.
īą Patt and Patel book, Chapter 4, “The von Neumann Model”
īŽ Stored program
īŽ Sequential instruction processing
8
The Von Neumann Model (of a Computer)
9
CONTROL UNIT
IP Inst Register
PROCESSING UNIT
ALU TEMP
MEMORY
Mem Addr Reg
Mem Data Reg
INPUT OUTPUT
The Von Neumann Model (of a Computer)
īŽ Q: Is this the only way that a computer can operate?
īŽ A: No.
īŽ Qualified Answer: But, it has been the dominant way
īą i.e., the dominant paradigm for computing
īą for decades
10
The Dataflow Model (of a Computer)
īŽ Von Neumann model: An instruction is fetched and
executed in control flow order
īą As specified by the instruction pointer
īą Sequential unless explicit control flow instruction
īŽ Dataflow model: An instruction is fetched and executed in
data flow order
īą i.e., when its operands are ready
īą i.e., there is no instruction pointer
īą Instruction ordering specified by data flow dependence
īŽ Each instruction specifies “who” should receive the result
īŽ An instruction can “fire” whenever all operands are received
īą Potentially many instructions can execute at the same time
īŽ Inherently more parallel
11
The Von-Neumann Model
īŽ All major instruction set architectures today use this model
īą x86, ARM, MIPS, SPARC, Alpha, POWER
īŽ Underneath (at the microarchitecture level), the execution
model of almost all implementations (or, microarchitectures)
is very different
īą Pipelined instruction execution: Intel 80486 uarch
īą Multiple instructions at a time: Intel Pentium uarch
īą Out-of-order execution: Intel Pentium Pro uarch
īą Separate instruction and data caches
īŽ But, what happens underneath that is not consistent with
the von Neumann model is not exposed to software
īą Difference between ISA and microarchitecture
12
What is Computer Architecture?
īŽ ISA+implementation definition: The science and art of
designing, selecting, and interconnecting hardware
components and designing the hardware/software interface
to create a computing system that meets functional,
performance, energy consumption, cost, and other specific
goals.
īŽ Traditional (ISA-only) definition: “The term
architecture is used here to describe the attributes of a
system as seen by the programmer, i.e., the conceptual
structure and functional behavior as distinct from the
organization of the dataflow and controls, the logic design,
and the physical implementation.” Gene Amdahl, IBM
Journal of R&D, April 1964
13
ISA vs. Microarchitecture
īŽ ISA
īą Agreed upon interface between software
and hardware
īŽ SW/compiler assumes, HW promises
īą What the software writer needs to know
to write and debug system/user programs
īŽ Microarchitecture
īą Specific implementation of an ISA
īą Not visible to the software
īŽ Microprocessor
īą ISA, uarch, circuits
īą “Architecture” = ISA + microarchitecture
14
Microarchitecture
ISA
Program
Algorithm
Problem
Circuits
Electrons
ISA vs. Microarchitecture
īŽ What is part of ISA vs. Uarch?
īą Gas pedal: interface for “acceleration”
īą Internals of the engine: implement “acceleration”
īŽ Implementation (uarch) can be various as long as it
satisfies the specification (ISA)
īą Add instruction vs. Adder implementation
īŽ Bit serial, ripple carry, carry lookahead adders are all part of
microarchitecture
īą x86 ISA has many implementations: 286, 386, 486, Pentium,
Pentium Pro, Pentium 4, Core, â€Ļ
īŽ Microarchitecture usually changes faster than ISA
īą Few ISAs (x86, ARM, SPARC, MIPS, Alpha) but many uarchs
īą Why?
15
ISA
īŽ Instructions
īą Opcodes, Addressing Modes, Data Types
īą Instruction Types and Formats
īą Registers, Condition Codes
īŽ Memory
īą Address space, Addressability, Alignment
īą Virtual memory management
īŽ Call, Interrupt/Exception Handling
īŽ Access Control, Priority/Privilege
īŽ I/O: memory-mapped vs. instr.
īŽ Task/thread Management
īŽ Power and Thermal Management
īŽ Multi-threading support, Multiprocessor support
16
Microarchitecture
īŽ Implementation of the ISA under specific design constraints
and goals
īŽ Anything done in hardware without exposure to software
īą Pipelining
īą In-order versus out-of-order instruction execution
īą Memory access scheduling policy
īą Speculative execution
īą Superscalar processing (multiple instruction issue?)
īą Clock gating
īą Caching? Levels, size, associativity, replacement policy
īą Prefetching?
īą Voltage/frequency scaling?
īą Error correction?
17
Property of ISA vs. Uarch?
īŽ ADD instruction’s opcode
īŽ Number of general purpose registers
īŽ Number of ports to the register file
īŽ Number of cycles to execute the MUL instruction
īŽ Whether or not the machine employs pipelined instruction
execution
īŽ Remember
īą Microarchitecture: Implementation of the ISA under specific
design constraints and goals
18
Design Point
īŽ A set of design considerations and their importance
īą leads to tradeoffs in both ISA and uarch
īŽ Considerations
īą Cost
īą Performance
īą Maximum power consumption
īą Energy consumption (battery life)
īą Availability
īą Reliability and Correctness
īą Time to Market
īŽ Design point determined by the “Problem” space
(application space), the intended users/market
19
Microarchitecture
ISA
Program
Algorithm
Problem
Circuits
Electrons

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L2

  • 1. Computer Architecture Lecture 2: Fundamental Concepts and ISA Adapted from Professor onur motlu, Carnegie Mellon University
  • 2. Levels of Transformation 2 Microarchitecture ISA (Architecture) Program/Language Algorithm Problem Logic Circuits Runtime System (VM, OS, MM) Electrons “The purpose of computing is insight” (Richard Hamming) We gain and generate insight by solving problems How do we ensure problems are solved by electrons?
  • 3. What is Computer Architecture? īŽ The science and art of designing, selecting, and interconnecting hardware components and designing the hardware/software interface to create a computing system that meets functional, performance, energy consumption, cost, and other specific goals. īŽ We will soon distinguish between the terms architecture, and microarchitecture. 3
  • 4. Computer Architecture Today (I) īŽ Today is a very exciting time to study computer architecture īŽ Industry is in a large paradigm shift (to multi-core and beyond) – many different potential system designs possible īŽ Many difficult problems motivating and caused by the shift īą Power/energy constraints īƒ  multi-core? īą Complexity of design īƒ  multi-core? īą Difficulties in technology scaling īƒ  new technologies? īą Memory wall/gap īą Reliability wall/issues īą Programmability wall/problem īą Huge hunger for data and new data-intensive applications īŽ No clear, definitive answers to these problems 4
  • 5. What is A Computer? īŽ Three key components īŽ Computation īŽ Communication īŽ Storage (memory) 5
  • 6. What is A Computer? īŽ We will cover all three components 6 Memory (program and data) I/O Processing control (sequencing) datapath
  • 7. The Von Neumann Model/Architecture īŽ Also called stored program computer (instructions in memory). Two key properties: īŽ Stored program īą Instructions stored in a linear memory array īą Memory is unified between instructions and data īŽ The interpretation of a stored value depends on the control signals īŽ Sequential instruction processing īą One instruction processed (fetched, executed, and completed) at a time īą Program counter (instruction pointer) identifies the current instr. īą Program counter is advanced sequentially except for control transfer instructions 7 When is a value interpreted as an instruction?
  • 8. The Von Neumann Model/Architecture īŽ Recommended reading īą Burks, Goldstein, von Neumann, “Preliminary discussion of the logical design of an electronic computing instrument,” 1946. īą Patt and Patel book, Chapter 4, “The von Neumann Model” īŽ Stored program īŽ Sequential instruction processing 8
  • 9. The Von Neumann Model (of a Computer) 9 CONTROL UNIT IP Inst Register PROCESSING UNIT ALU TEMP MEMORY Mem Addr Reg Mem Data Reg INPUT OUTPUT
  • 10. The Von Neumann Model (of a Computer) īŽ Q: Is this the only way that a computer can operate? īŽ A: No. īŽ Qualified Answer: But, it has been the dominant way īą i.e., the dominant paradigm for computing īą for decades 10
  • 11. The Dataflow Model (of a Computer) īŽ Von Neumann model: An instruction is fetched and executed in control flow order īą As specified by the instruction pointer īą Sequential unless explicit control flow instruction īŽ Dataflow model: An instruction is fetched and executed in data flow order īą i.e., when its operands are ready īą i.e., there is no instruction pointer īą Instruction ordering specified by data flow dependence īŽ Each instruction specifies “who” should receive the result īŽ An instruction can “fire” whenever all operands are received īą Potentially many instructions can execute at the same time īŽ Inherently more parallel 11
  • 12. The Von-Neumann Model īŽ All major instruction set architectures today use this model īą x86, ARM, MIPS, SPARC, Alpha, POWER īŽ Underneath (at the microarchitecture level), the execution model of almost all implementations (or, microarchitectures) is very different īą Pipelined instruction execution: Intel 80486 uarch īą Multiple instructions at a time: Intel Pentium uarch īą Out-of-order execution: Intel Pentium Pro uarch īą Separate instruction and data caches īŽ But, what happens underneath that is not consistent with the von Neumann model is not exposed to software īą Difference between ISA and microarchitecture 12
  • 13. What is Computer Architecture? īŽ ISA+implementation definition: The science and art of designing, selecting, and interconnecting hardware components and designing the hardware/software interface to create a computing system that meets functional, performance, energy consumption, cost, and other specific goals. īŽ Traditional (ISA-only) definition: “The term architecture is used here to describe the attributes of a system as seen by the programmer, i.e., the conceptual structure and functional behavior as distinct from the organization of the dataflow and controls, the logic design, and the physical implementation.” Gene Amdahl, IBM Journal of R&D, April 1964 13
  • 14. ISA vs. Microarchitecture īŽ ISA īą Agreed upon interface between software and hardware īŽ SW/compiler assumes, HW promises īą What the software writer needs to know to write and debug system/user programs īŽ Microarchitecture īą Specific implementation of an ISA īą Not visible to the software īŽ Microprocessor īą ISA, uarch, circuits īą “Architecture” = ISA + microarchitecture 14 Microarchitecture ISA Program Algorithm Problem Circuits Electrons
  • 15. ISA vs. Microarchitecture īŽ What is part of ISA vs. Uarch? īą Gas pedal: interface for “acceleration” īą Internals of the engine: implement “acceleration” īŽ Implementation (uarch) can be various as long as it satisfies the specification (ISA) īą Add instruction vs. Adder implementation īŽ Bit serial, ripple carry, carry lookahead adders are all part of microarchitecture īą x86 ISA has many implementations: 286, 386, 486, Pentium, Pentium Pro, Pentium 4, Core, â€Ļ īŽ Microarchitecture usually changes faster than ISA īą Few ISAs (x86, ARM, SPARC, MIPS, Alpha) but many uarchs īą Why? 15
  • 16. ISA īŽ Instructions īą Opcodes, Addressing Modes, Data Types īą Instruction Types and Formats īą Registers, Condition Codes īŽ Memory īą Address space, Addressability, Alignment īą Virtual memory management īŽ Call, Interrupt/Exception Handling īŽ Access Control, Priority/Privilege īŽ I/O: memory-mapped vs. instr. īŽ Task/thread Management īŽ Power and Thermal Management īŽ Multi-threading support, Multiprocessor support 16
  • 17. Microarchitecture īŽ Implementation of the ISA under specific design constraints and goals īŽ Anything done in hardware without exposure to software īą Pipelining īą In-order versus out-of-order instruction execution īą Memory access scheduling policy īą Speculative execution īą Superscalar processing (multiple instruction issue?) īą Clock gating īą Caching? Levels, size, associativity, replacement policy īą Prefetching? īą Voltage/frequency scaling? īą Error correction? 17
  • 18. Property of ISA vs. Uarch? īŽ ADD instruction’s opcode īŽ Number of general purpose registers īŽ Number of ports to the register file īŽ Number of cycles to execute the MUL instruction īŽ Whether or not the machine employs pipelined instruction execution īŽ Remember īą Microarchitecture: Implementation of the ISA under specific design constraints and goals 18
  • 19. Design Point īŽ A set of design considerations and their importance īą leads to tradeoffs in both ISA and uarch īŽ Considerations īą Cost īą Performance īą Maximum power consumption īą Energy consumption (battery life) īą Availability īą Reliability and Correctness īą Time to Market īŽ Design point determined by the “Problem” space (application space), the intended users/market 19 Microarchitecture ISA Program Algorithm Problem Circuits Electrons