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A.Ramesh
#404,IndraNagar +918977939926
Hyderabad-500032
RESUME
ramesh4j1988@gmail.com
PROFESSIONAL EXPERIENCE
Total Experience : 2+ years .
Currently working at SMSilicon,Hyderabad.
Experience at SM Silicon,Hyderabad as CAD design engineer since Nov-2014
Roles at SMSilicon:
 Setting up flow for static and dynamic EMIR analysis in Redhawk and its analysis.
 Implemented own methodology to group single bit flop to TSMC’s multibit flop ,based on
the displacement limit and the slack at placement stage ,observed Improved power and
timing than cadence default flow.
 Worked in PD-flow enhancements which includes syn/pnr flow using rcp/encounter.
 Developed scripts to automate the licenses expiry report,ip-consistency checks, script to
find idle servers, different types of parsers using object oriented perl.
 Created webpages to display all tsmc standard cell views available ,regressions results
of every day run(LVS,DRC,ANTENNA…), for the users at glance.
 Deploying new tools from vendor site to servers, licenses bring up.
 Vendor(Tsmc/synopsys) provided cell libraries,memory compilers setup & releases to
the teams ,support and debugg on CAD flow.
 Generating macros(compiled memories) from synopsys compilers using integrator.
 Created different parsers for sdf,libs in perl .
 Support ,writing automation scripts for teams and tool development.
 Know various Version control system like SVN ,SOS.
 Foundry tech-files installation and there release flow development.
 Created flow for genus , have understanding of totem, extraction flow.
 Working on conformal LEC flow .
 Created GUI on Timing Path Viewer in perl tk from scratch :
 which contains canvas widget to show the flyline between begin and endpoint
(canvas is scaled to chip's floorplan) when one selects a bucket.(bucket is
collection of paths based on some classification)
 contains several buttons to open a window seperately ,
 filters to grep,grep –v or highlight nets ,classify paths whose begin-end points in
the same and different clusters.
 several windows which shows capture , launch ,path report when a particular
timing bucket is selected,
 each column is kept toggle sort(ascending, descending),
 mouse hovering feature,it displays a text information when mouse is hovered
over a net like metal layer used,capacitance,hold time,delay etc.
 a window which display image(histogram of bucket path's slack) ,
 hide and show headers,customised column headers,
 classify different paths(RTL,PD,ping-pong),
 Facilitated user to create his own defined buckets.
Previous Experience at Nvidia, Bangalore as CAD eng: 8 months.
Roles at Nvidia:
Worked in IEEE1500 test standard architecture Design, writing complex test suites , tcl
scripts to support the development of the design. Running and debugging checks and scan
insertion flow on various chips(CPU’s , GPU’s) at various modes and verifying that run is
clean.Debugging C++ and TCL programs using GDB and tn_shell. Fixing CAD-DFT Bugs and
documenting IEEE1500 and other DFT scan flow.
Good understanding of the DFT concepts and worked on the tools as well.
TECHNICAL SKILLS
SUMMARY

VLSI Domain Skills 
HDLs : Verilog HDL.
EDA Tools : Encounter,Redhawk,Tempus,Innovus,Calibre.
DFT tools : DFTAdvisor, FastScan, TestKompress, Etchecker.
Domain : ASIC/FPGA Design Flow.
Scripts :Shell Script, TCL,PERL,PHP,HTML.
Language : C, C++, OOPs concepts, DataStructures.
Experience in writing RTL models in Verilog HDL . 

EDUCATION
MTECH : Completed Mtech from IIIT Hyderabad in VLSI and computer engineering 2012-
2014 batch, secured a CGPA of 7.8 .
BE : Completed BE from Swami vivekanand technical university in year 2011,Bhilai. Secured
74.5%.
SSC : Completed from CGBSE board with 72% in year 2005.
HSC : Completed from CGBSE board with 77.5% in year 2003.
Extra-curricular Activities and Achievements:

Active member of Blood Donation group,Donate Blood Save Life,Lets-Vote campaign. 

Active member of an NGO named Friends For Seva at Hydrabad formed by us. 

Class Representative in BE for 4 years. 
Personal Profile

Date of Birth: 07 may 1988. 

Language Known: Telugu, Hindi, English. 
I hereby declare that the information given above is true to best of my knowledge and belief.
Place: - Hyderabad (A.Ramesh)

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Ramesh.resume_iiith

  • 1. A.Ramesh #404,IndraNagar +918977939926 Hyderabad-500032 RESUME ramesh4j1988@gmail.com PROFESSIONAL EXPERIENCE Total Experience : 2+ years . Currently working at SMSilicon,Hyderabad. Experience at SM Silicon,Hyderabad as CAD design engineer since Nov-2014 Roles at SMSilicon:  Setting up flow for static and dynamic EMIR analysis in Redhawk and its analysis.  Implemented own methodology to group single bit flop to TSMC’s multibit flop ,based on the displacement limit and the slack at placement stage ,observed Improved power and timing than cadence default flow.  Worked in PD-flow enhancements which includes syn/pnr flow using rcp/encounter.  Developed scripts to automate the licenses expiry report,ip-consistency checks, script to find idle servers, different types of parsers using object oriented perl.  Created webpages to display all tsmc standard cell views available ,regressions results of every day run(LVS,DRC,ANTENNA…), for the users at glance.  Deploying new tools from vendor site to servers, licenses bring up.  Vendor(Tsmc/synopsys) provided cell libraries,memory compilers setup & releases to the teams ,support and debugg on CAD flow.  Generating macros(compiled memories) from synopsys compilers using integrator.  Created different parsers for sdf,libs in perl .  Support ,writing automation scripts for teams and tool development.  Know various Version control system like SVN ,SOS.  Foundry tech-files installation and there release flow development.  Created flow for genus , have understanding of totem, extraction flow.  Working on conformal LEC flow .  Created GUI on Timing Path Viewer in perl tk from scratch :  which contains canvas widget to show the flyline between begin and endpoint (canvas is scaled to chip's floorplan) when one selects a bucket.(bucket is collection of paths based on some classification)  contains several buttons to open a window seperately ,  filters to grep,grep –v or highlight nets ,classify paths whose begin-end points in the same and different clusters.  several windows which shows capture , launch ,path report when a particular timing bucket is selected,  each column is kept toggle sort(ascending, descending),  mouse hovering feature,it displays a text information when mouse is hovered over a net like metal layer used,capacitance,hold time,delay etc.  a window which display image(histogram of bucket path's slack) ,
  • 2.  hide and show headers,customised column headers,  classify different paths(RTL,PD,ping-pong),  Facilitated user to create his own defined buckets. Previous Experience at Nvidia, Bangalore as CAD eng: 8 months. Roles at Nvidia: Worked in IEEE1500 test standard architecture Design, writing complex test suites , tcl scripts to support the development of the design. Running and debugging checks and scan insertion flow on various chips(CPU’s , GPU’s) at various modes and verifying that run is clean.Debugging C++ and TCL programs using GDB and tn_shell. Fixing CAD-DFT Bugs and documenting IEEE1500 and other DFT scan flow. Good understanding of the DFT concepts and worked on the tools as well. TECHNICAL SKILLS SUMMARY  VLSI Domain Skills  HDLs : Verilog HDL. EDA Tools : Encounter,Redhawk,Tempus,Innovus,Calibre. DFT tools : DFTAdvisor, FastScan, TestKompress, Etchecker. Domain : ASIC/FPGA Design Flow. Scripts :Shell Script, TCL,PERL,PHP,HTML. Language : C, C++, OOPs concepts, DataStructures. Experience in writing RTL models in Verilog HDL .   EDUCATION MTECH : Completed Mtech from IIIT Hyderabad in VLSI and computer engineering 2012- 2014 batch, secured a CGPA of 7.8 . BE : Completed BE from Swami vivekanand technical university in year 2011,Bhilai. Secured 74.5%. SSC : Completed from CGBSE board with 72% in year 2005. HSC : Completed from CGBSE board with 77.5% in year 2003. Extra-curricular Activities and Achievements:  Active member of Blood Donation group,Donate Blood Save Life,Lets-Vote campaign.   Active member of an NGO named Friends For Seva at Hydrabad formed by us.   Class Representative in BE for 4 years.  Personal Profile  Date of Birth: 07 may 1988.   Language Known: Telugu, Hindi, English.  I hereby declare that the information given above is true to best of my knowledge and belief. Place: - Hyderabad (A.Ramesh)