More Related Content Similar to Simulation Using Isim (20) More from Amr Ali (ISTQB CTAL Full, CSM, ITIL Foundation) (18) Simulation Using Isim 2. Copyrights
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2
3. Objective
• Using Isim to compile and simulate a given
design unit
• Skills gained:
– Identify basic Simulator flow
3
8. Write VHDL Code
Step 1:
Right click on project
node then select
New Source
Note:
if you have an
existing VHDL
file you can select
Add Source
Step 2:
- Set File Name and
Location
- Select VHDL Module
then press Next
9. Write VHDL Code Cont’d.
Step 3:
press Next
Note:
-you can change
entity name and
architecture name
-also you can add
ports as shown
and then press
Next -> finish
11. Check Syntax
To Check Syntax Follow
Steps as shown
Note:
if there is any error it will
appear Here
12. Simulation
To Open simulation
window Follow
Steps as shown
13. Simulation Cont’d.
1-Project ports and signals
2-Zooming
3-Restart
4-Run for the time specified
on the toolbar
14. Simulation Cont’d.
Force clock to i/p port:
Right click on the port then
select Force clock
Then set options and press
OK
15. Simulation Cont’d.
Force constant value to i/p port:
Right click on the port then
select Force constant
Then set the value and press
OK
17. Simulation Cont’d.
To show Variables in a proces
Follow Steps as shown
where #3 is process in your
project