Define synchronous system.What is a dynamic indicator on a l.pdf

Define "synchronous system".What is a "dynamic indicator" on a logic symbol?List all the
representations of state machines that we have discussed.What two checks you have to do for all
FSM states to ensure correct functionality?What is "switch contact bounce" and why is it a
problem?What is a "register"?What is a "synchronous parallel counter"?What is a shift
register?What are the three major types of shift register counters?Describe the pattern of outputs
produced by each type of shift register counter.What problem is fixed in a self-correcting
counter?Write the VHDL for a specific type of shift register or shift register counter.Define
"synchronous system".What is a "dynamic indicator" on a logic symbol?List all the
representations of state machines that we have discussed.What two checks you have to do for all
FSM states to ensure correct functionality?What is "switch contact bounce" and why is it a
problem?What is a "register"?What is a "synchronous parallel counter"?What is a shift
register?What are the three major types of shift register counters?Describe the pattern of outputs
produced by each type of shift register counter.What problem is fixed in a self-correcting
counter?Write the VHDL for a specific type of shift register or shift register counter.
Solution
SYNCHRONOUS SYSTEM
A synchronous system is a digital system in which the changes in the state of memory elements
are synchronized by a clock signal.
i.e, operations are coordinated under the centralized control of a fixed-rate clock signal or
several clocks.
DYNAMIC INDICATOR
dynamic(edge trigerred) inputs are sampled only when clock state changes .thsi type of input is
indicated on logic symbols by a small triangle (called as dynamic indicator) on the line where
input is given
REPRESENTATIONS OF FINITE STATE MACHINES (FSM)
EVENT/STATE TABLE
Several state transition table types are used. In general ,the combination of current state and input
shows the next state . The complete action's information is not directly described in the table and
can only be added using footnotes
UML STATE MACHINES
The Unified Modeling Language has a notation for describing state machines. UML state
machines overcome the limitations of traditional finite state machines while retaining their main
benefits. UML state machines introduce the new concepts of hierarchically nested statesand

orthogonal regions, while extending the notion of actions. UML state machines have the
characteristics of both Mealy machines andMoore machines. They support actions that depend
on both the state of the system and the triggering event, as in Mealy machines, as well as entry
and exit actions, which are associated with states rather than transitions, as in Moore machines.
SDL STATE MACHINES
The Specification and Description Language is a standard from ITU that includes graphical
symbols to describe actions in the transition:
SDL embeds basic data types called Abstract Data Types, an action language, and an execution
semantic in order to make the finite state machine executable.
CHECKS(TESTING) TO ENSURE FSM FUNCTIONALITY OR NOT
here we discuss the two types of testing problems.
In the first type of problems, we have the transition diagram of a finite state machine but we do
not know in which state it is. We apply an input sequence to the machine so that from its
input/output (I/O) behavior we can deduce desired information about its state. Specifically, in the
state identification problem we wish to identify the initial state of the machine; a test sequence
that solves this problem is called a distinguishing sequence. In the state verification problem we
wish to verify that the machine is in a specified state; a test sequence that solves this problem is
called a UIO sequence.
A different type of problem is conformance testing. Given a specification finite state machine,
for which we have its transition diagram, and an implementation, which is a ‘‘black box’’ for
which we can only observe its I/O behavior, we want to test whether the implementation
conforms to the specification. This is called the conformance testing or fault detection problem
and a test sequence that solves this problem is called a checking sequence.
SWITCH BOUNCE CONTACT
A switch is used to provide a “clock” signal to a digital counter circuit, so that each actuation of
the pushbutton switch is supposed to increment the counter by a value of 1, what will happen
instead is the counter will increment by several counts each time the switch is actuated. Since
mechanical switches often interface with digital electronic circuits in modern systems, switch
contact bounce is a frequent design consideration. Somehow, the “chattering” produced by
bouncing contacts must be eliminated so that the receiving circuit sees a clean, crisp off/on
transition:
REGISTER
Registers are groups of flip-flops, where each flip-flop is capable of storing one bit of
information. An n-bit register is a group of n flip-flops. The basic function of a register is to hold
information in a digital system and make it available to the logic elements for the computing
process. Registers consist of a finite number of flip-flops. Since each flip-flop is capable of

storing either a 0 or a 1 there is a finite number of 0-1 combinations that can be stored into a
register. Each of those combinations is known as state or content of the register
SYNCHRONOUS PARALLEL COUNTER
the clock inputs of all flipflops are connected together and are trigggered by input pulses, thus all
flipflops change state simultaneously (in parallel)
SHIFT REGISTERS
The shift register is another type of sequential logic circuit that can be used for storage or
transfer of data in the form of binary numbers .this sequential device loads the data present on
the inputs and the moves or shifts to its ouput for every clock cycle , hence named as shift
registeR
TYPES OF SHIFT REGISTER COUNTERS
two of the most comon types of shift counter registers are
ring counter
johnson counter
these are basically shift register with serial outputs connected back to serial inputs in order to
produce a particular sequence .these are called as counters since they exhibit a specified
sequence of states
RING COUNTER
a ring counter is basically a circuating shift register in which output of most significant stage is
fed back to input of least significant stage .let us assume a ring counter which consists of n D
flipflops
in this the output of each stage is shifted to next stage on positive edge of a clock pulse (let)
if the clear is high ,all flipflops except first one ,all are reset to zero ,fist have 1 instead of 0
It is self decoding , no extra decoding is required unlike binary counter
JOHNSON COUNTER
johnson counters are a variation of standard ring counters ,with the inverted output of last stage
back to input of first stage ,they are also known as twisted ring counters
self correcting counter
A self starting counter is one in which every possible state, even those not in the desired count
sequence, has a sequence of transitions that eventually leads to a valid counter state.
problem
This guarantees that no matter how the counter starts up, it will eventually enter the proper
counter sequence

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