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1. PRACTICAL-5(20BEC001)
Output characteristics-

2. Different Vgs output-

3. Different vds-

4. (id)^0.5 v/s VGS-

5. Self-Evaluations
1. Explain the procedure for current conduction in MOSFET after Pinch-Off.
Beyond the pinch-off point, i.e., for VDS > VD(SAT), a depleted surface region forms adjacent to the
drain, and this depletion region grows toward the source with increasing drain voltages. This
operation mode of the MOSFET is called the saturation mode or the saturation region; For a
MOSFET operating in the saturation region, the effective channel length is reduced as the
inversion layer near the drain vanishes, while the channel-end voltage remains essentially
constant and equal to VD(SAT). The pinched-off (depleted) section of the channel absorbs most of
the excess voltage drop (VDS – VD(SAT)) and a high-field region forms between the channel-end
and the drain boundary. Electrons arriving from the source to the channel-end are injected into
the drain-depletion region and are accelerated toward the drain in this high electric field,
usually reaching the drift velocity limit.
2.In digital circuits, source terminal can never be at lower potential compared to the Body
terminal. Justify.
The pn junctions defined by source-bulk and drain-bulk, which are basically two diodes, must
be reverse biased to stop them from leaking current from the source/drain to the substrate. This
means that the source potential must always be equal or greater than the bulk potential.
3. NMOS is preferable over PMOS. Justify.
 The mobility of electrons, which are carriers in the case of an n-channel device, is
about two times greater than that of holes, which are the carriers in the p-channel
device. Thus an n-channel device is faster than a p-channel device.
 Since electron mobility is twice that of hole mobility, an n-channel device will have
one-half the on-resistance or impedance of an equivalent p-channel device with the
same geometry and under the same operating conditions. Thus n-channel transistors
need only halt the size of p-channel devices to achieve the same impedance. Therefore,
n-channel ICs can be smaller for the same complexity or, even more important, they
can be more complex with no increase in silicon area.
 NMOS circuits offer a speed advantage over PMOS due to smaller junction areas. Since
the operating speed of an MOS IC is largely limited by internal RC time constants and
capacitance of diode is directly proportional to its size, an n-channel junction can have
smaller capacitance. This, in turn, improves its speed.