This document discusses the challenges of testing low dropout regulators (LDOs) and proposes implementing built-in self-test (BIST) as a solution. It presents two test modes for BIST - one that uses a servo loop to measure DC loop gain and another that uses an oscillator to measure unity gain bandwidth. BIST allows LDOs to be tested on-chip under various conditions without external equipment, reducing costs and enabling more comprehensive testing compared to traditional methods.
2. Index
• Introduction
• The Challenges of Testing LDOs
• BIST Basics
• Implementing BIST for LDOs
• Advantages of Using BIST for LDOs
• Conclusion
3. Introduction
• Integrated LDOs are closed loop systems, characterization of their gain and
bandwidth is critical.
• Generally, gain and bandwidth parameters are extracted from LDO design
simulations.
• However, LDO loop parameter testing requires breaking the loop and injecting a
test signal into the IC.
4. • This paper presents test bed simulations and new test techniques for direct
on-chip vector less measurement of LDO DC loop gain and bandwidth.
• This new test technique has been applied to measure a working LDO test IC
developed in a 65nm CMOS UMC technology.
• The simulation and practical implementation results show close agreement
and the proposed test techniques can be practically integrated in a BIST
structure.
5.
6. The Challenges of Testing LDOs
• LDOs are designed to regulate voltage with very low input-output voltage
difference, typically only a few hundred millivolts. This means that any noise
or variation in the input voltage can significantly affect the output voltage,
making it difficult to measure accurately.
• Additionally, LDOs are often used in power-hungry applications, such as
microprocessors and graphics cards, which require high current capabilities.
Testing LDOs under these conditions can be challenging, as traditional test
methods may not be able to supply enough current to properly stress the
regulator.
7.
8. Build In Self-Test
• BIST involves incorporating test circuitry into the design of an integrated
circuit. This circuitry allows the chip to test itself without requiring external
test equipment or complex test procedures.
• BIST typically involves adding a set of test registers to the chip, along with a
test controller that can generate test patterns and analyze the results. During
testing, the chip enters a special test mode where it runs through a series of
pre-defined test patterns and checks the results against expected values.
9. Implementing BIST for LDOs
• To implement BIST for LDOs, additional circuitry must be added to the
regulator design. This circuitry includes a test generator that can produce test
signals at the input of the LDO, and a test response analyzer that can measure
the output of the regulator and compare it to expected values.
• During testing, the LDO is put into a special test mode where it receives a
series of test signals from the test generator. The output of the regulator is
then compared to expected values using the test response analyzer. If any
discrepancies are found, the LDO can be flagged as defective and removed
from production.
10.
11. Test Mode I – Servo loop for DC Loop Gain
Measurement:
12.
13. Test Mode II – Oscillator based Test Strategy for UGBW
Measurement:
14.
15. Advantages of Using BIST for LDOs
• Using BIST to test LDOs offers several advantages over traditional test
methods. First, it allows for more comprehensive testing of the regulator, as
the chip can test itself under a wide range of conditions and load scenarios.
• Additionally, BIST can reduce the cost and complexity of testing LDOs, as it
eliminates the need for external test equipment and specialized test
procedures. This can lead to faster production times and lower manufacturing
costs.
16. Conclusion
• Testing LDOs can be challenging due to their low input-output voltage
difference and high current capabilities. However, by implementing BIST,
designers can ensure that their regulators are thoroughly tested under a wide
range of conditions.
• BIST offers several advantages over traditional test methods, including more
comprehensive testing, reduced testing costs, and faster production times. As
such, it is becoming an increasingly popular technique for testing integrated
circuits, including LDOs.