This document discusses different types of logic circuits including decoders, encoders, multiplexers, demultiplexers, and code converters. It describes the evolution of integrated circuit technology from SSI to ULSI and defines each level based on the number of logic gates per chip. Decoder circuits are explained including 1-of-8 decoders, BCD to decimal decoders, and a 1-of-32 decoder. Encoder, priority encoder, multiplexer, and demultiplexer circuits and their applications are also summarized. The document concludes with an explanation of BCD to binary code conversion.

1. MSI LOGIC CIRCUITS
CHAPTER -9
Instructor: Afroza Sultana

2. Digital IC Technology
• SSI (Small Scale Integration) – fewer than 12 gates per chip
• MSI (Medium Scale Integration) – 13 to 99 gates per chip
• LSI (Large Scale Integration) – 100 to 999 gates per chip
• VLSI (Very Large Scale Integration) – 1000 to 999,999 gates
per chip
• ULSI (Ultra Large Scale Integration) – 1000,000 to 999999
gates per chip
• GSI (Giga Scale Integration) – 1000000 or more gates per chip

3. The evolution of IC technique
Tran
sistor
Single
compon
ent
SSI MSI LSI VLSI ULSI GSI
Logic
Gate
count
---- ---- 10
100
~
1000
1000
~
20000
20000
~
500,000
>
500,000
>
10,000,000
1947 1950 1961 1966 1971 1980 1985 1990

4. Decoders
A decoder accepts a set of inputs that represents a
binary number and activates only the output that
corresponds to that input number.
Fig 9-1 General decoder diagram

5. 3-line-to-8-line (or 1-of-8) decoder

6. Some decoders have
one or more ENABLE
inputs used to control
the operation of the
decoder.
Fig 9-3
(a) Logic diagram for
74ALS138 decoder
(b) truth table
(c) logic symbol
3-line-to-8-line (or 1-of-8) decoder

7. FIG 9-4 Four 74AS138s forming a 1-of-32 decoder
1-of-32 decoder

8. • The IC 74LS138 and an INVERTER can be arranged
to function as a 1 of 32 decoders.
• The 5-bit input code A4A3A2A1A0 will activate the
output from 0 to 31.
• The IC Z1 will output the codes from 00000-00111
• The IC Z2 will output the codes from 01000-01111
• The IC Z3 will output the codes from 10000-10111
• The IC Z4 will output the codes from 11000-11111
• The IC Z1 will activate for A4A3 = 00, Z2 will activate
for A4A3 = 01, IC Z3 will activate for A4A3 = 10 and Z4
will activate for A4A3 = 11.
1-of-32 decoder

9. BCD-to-decimal decoder

10. BCD to 7-Segment Decoder/Drivers
Fig 9-7 (a) 7- segment arrangement display
(b) active segments for each digit

11. BCD-to-7-segment decoder/driver driving a 7-segment LED
display
BCD to 7-Segment Decoder/Drivers

12. Encoder
Fig 9-12 General encoder diagram.
The opposite of decoding process is called encoding
and it is performed by a logic circuit called encoder.
Digital circuit that produces an output code
depending on which of its inputs is activated.

13. Fig 9-13 Logic circuit for an octal-to-binary (8-line-to-3-line)
encoder. For proper operation, only one input should be active
at one time.
Octal-to-binary (8-line-to-3-line) Encoder

14. Priority Encoder
A priority encoder includes the necessary logic to
ensure that when two or more inputs are activated, the
output code will correspond to the highest-numbered
input.
Fig 9-14 74147 decimal-to-BCD priority encoder.

15. Multiplexers (Data Selectors)
Fig 9-18 Functional diagram of a digital multiplexer (MUX).
It is a logic circuit that, depending on its select inputs,
selects one of several data inputs and pass it to the
output.

16. Fig 9-19 Two-input multiplexer.
Multiplexers

17. Multiplexers
Fig 9-20 Four-input multiplexer.

18. 8- input Multiplexer

19. 16-input Multiplexer
Fig 9-22 Ex. 9-9; two 74HC151s combined to form a 16-input multiplexer.

20. Multiplexer Applications
Data Routing: Multiplexers can route data from one of several
sources to one destination. Fig 9-24shows a system for
displaying two multi digit BCD counters one at a time.

21. Multiplexer Applications
Parallel-to-Serial Conversion:

22. Multiplexer Applications
Operation Sequencing: The circuit of Fig 9-26 Seven-step control
sequencer uses an 8-input mux as part of control sequencer that steps
through seven steps each of which actuates some portion of the physical
process being controlled.

23. Multiplexer Applications
Logic Function Generation:
Fig 9-27 Mux used to implement a logic function

24. Demultiplexers (Data Distributors)
A DEMUX takes a single input and distributes it over
several outputs.

25. 1-line-to-8-line demux

26. • Clock Demultiplexer: Under control of the SELECT
inputs the clock signal is routed to the desired
destination (fig-9-31).
• Security Monitoring System: The open/close status
of an industrial plant is monitored and displayed by
LEDs on a remote monitoring panel at the security
station (fig:9-32).
• Synchronous Data Transmission System: Used to
serially transmit four 4-bit data words from a
transmitter to a remote receiver (fig:9-33).
De-Multiplexer Applications

27. Code Converters
A code converter is a logic circuit that changes data
presented in one type of binary code to another type of
binary code.
Fig 9-39 Basic idea of a two-digit BCD-to-binary converter.

28. BCD-to-Binary Conversion
• Compute the binary sum of the binary equivalents
of all bits in the BCD representation that are 1s.
Example
0101 0010(BCD)
= 0000010 (2) + 0001010 (10) + 0101000 (40)
= 0110100 (52)

29. BCD
bits
Decimal
Wt
Binary Equivalent
b6 b5 b4 b3 b2 b1 b0
A0 1 0 0 0 0 0 0 1
B0 2 0 0 0 0 0 1 0
C0 4 0 0 0 0 1 0 0
D0 8 0 0 0 1 0 0 0
A1 10 0 0 0 1 0 1 0
B1 20 0 0 1 0 1 0 0
C1 40 0 1 0 1 0 0 0
D1 80 1 0 1 0 0 0 0
BCD-to-Binary Conversion
b6=D1 b5=C1 b4=B1+D1 b3=D0+A1+C1 b2=C0+B1 b1=B0+ A1 b0=A0

30. Code Converter Circuit
Fig 9-40: BCD-to-binary converter with 4- bit parallel adders.
A0
B0+A1
C0+B1
D0+A1+C1
B1+0+D1
(C4=0)+C1
D1+0