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Logical Instructions
ā€“These are the instructions used for basic
logic operations such as AND, OR, NOT and
XOR.
ā€“These are also used for carrying out bit by
bit operations such as shift (SHR,SHL) or
rotate (ROL,ROR,RCR,RCL).
ā€“ One more Instruction under this category is
TEST instruction.
AND (Logical AND)
Syntax :-- AND destination, source
ā€¢ This instruction is used to bit by bit AND the
contents of source to the destination.
ā€¢The result is stored in the destination.
ā€¢The source operand can be a immediate, a
register or a memory location.
ā€¢The destination can be a register or a memory
location, but not an immediate data.
ā€¢Both operands cannot be immediate data or
memory location.
ā€¢Flags affected : OF = 0 ,CF = 0 , AF is undefined.
ā€¢ And other flags (SF, ZF, PF) are affected based on
the AND operation.
ā€¢ Operation Performed :--
ā€¢ Destination ļƒŸ Destination AND source
ā€¢ Examples :--
1. AND BH,CL ;AND byte in CL with Byte in BH,
result in BH.
2. AND BX,00FFH ;AND word in BX with immediate
data 00ffH
3. AND [5000H], DX ;AND word in DX with a
word in memory with offset
5000 in DS.
AND (Logical AND) contd..
Numeric Example
If AX = 3F0F,
After Instruction,
AND AX,9078H ; AX ļƒŸ AX AND 0008H
;AX ļƒŸ 3F0F AND 0008
3F0F ļƒ  0011 1111 0000 1111
AND
9078 ļƒ  1001 0000 0111 1000
-------------------------------------
= 0001 0000 0000 1000
1008H in AX register
OR (Logical OR)
Syntax :-- OR destination, source
ā€¢ This instruction is used to bit by bit OR the
contents of source to the destination.
ā€¢The result is stored in the destination.
ā€¢The source operand can be a immediate, a
register or a memory location.
ā€¢The destination can be a register or a memory
location, but not an immediate data.
ā€¢Both operands cannot be immediate data or
memory location.
ā€¢Flags affected : OF = 0 ,CF = 0 , AF is undefined.
ā€¢ And other flags (SF, ZF, PF) are affected based on
the OR operation.
ā€¢ Operation Performed :--
ā€¢ Destination ļƒŸ Destination OR source
ā€¢ Examples :--
1. OR BH,CL ;OR byte in CL with Byte in BH,
result in BH.
2. OR BX,00FFH ;OR word in BX with immediate
data 00ffH
3. OR [5000H], DX ; OR word in DX with a
word in memory with offset
5000 in DS.
OR (Logical OR) contd..
Numeric Example
If AX = 3F0F,
After Instruction,
OR AX,9078H ; AX ļƒŸ AX OR 9078H
;AX ļƒŸ 3F0F OR 9078
3F0F ļƒ  0011 1111 0000 1111
OR
9078 ļƒ  1001 0000 0111 1000
-------------------------------------
= 1011 1111 0111 1111
BF7FH in AX register
XOR (Logical XOR)
Syntax :-- XOR destination, source
ā€¢ This instruction is used to bit by bit XOR the
contents of source to the destination.
ā€¢The result is stored in the destination.
ā€¢The source operand can be a immediate, a
register or a memory location.
ā€¢The destination can be a register or a memory
location, but not an immediate data.
ā€¢Both operands cannot be immediate data or
memory location.
ā€¢Flags affected : OF = 0 ,CF = 0 , AF is undefined.
ā€¢ And other flags (SF, ZF, PF) are affected based on
the XOR operation.
ā€¢ Operation Performed :--
ā€¢ Destination ļƒŸ Destination XOR source
ā€¢ Examples :--
1. XOR BH,CL ;XOR byte in CL with Byte in BH,
result in BH.
2. XOR BX,00FFH ;XOR word in BX with immediate
data 00ffH
3. XOR [5000H], DX ; XOR word in DX with a
word in memory with offset
5000 in DS.
XOR (Logical XOR) contd..
Numeric Example
If AX = 3F0F,
After Instruction,
XOR AX,9078H ; AX ļƒŸ AX XOR 0008H
;AX ļƒŸ 3F0F XOR 0008
3F0F ļƒ  0011 1111 0000 1111
XOR
9078 ļƒ  1001 0000 0111 1000
-------------------------------------
= 1010 1111 0111 0111
AF77H in AX register
NOT (Logical Invert )
Syntax :-- NOT destination
ā€¢ This instruction complements (inverts) each
bit of the byte or word stored in the
destination.
ā€¢The result is stored in the destination.
ā€¢The destination can be a register or a memory
location.
ā€¢No Flags affected
ā€¢ Operation Performed :--
ā€¢ Destination ļƒŸ NOT Destination
ā€¢ Examples :--
1. NOT BH ;Complement byte in BH, result in BH.
2. NOT BX ; Complement word in BX, result in BX.
3. NOT BYTE PTR [5000H] ; Complement byte
in memory with offset 5000 in DS.
NOT (Logical Invert ) contd..
Numeric Example
If AX = 3F0F,
After Instruction,
NOT AX ; AX ļƒŸ NOT AX
;AX ļƒŸ NOT 3F0F
3F0F ļƒ  0011 1111 0000 1111
Complement
-------------------------------------
= 1100 0000 1111 0000
C0F0H in AX register
TEST (Logical compare )
Syntax :-- TEST destination, source
ā€¢ This instruction is used to bit by bit AND the
contents of source to the destination.
ā€¢The result is not stored in the destination.
ā€¢The source operand can be a immediate, a
register or a memory location.
ā€¢The destination can be a register or a memory
location, but not an immediate data.
ā€¢Both operands cannot be immediate data or
memory location.
ā€¢Flags affected : OF = 0 ,CF = 0 , SF, ZF, PF.
ā€¢TEST instruction is used to set flags before a
conditional jump instruction
ā€¢ Operation Performed :--
ā€“ Flags ļƒŸ set result of Destination AND source
ā€¢ Examples :--
1. TEST BH,CL ;AND byte in CL with Byte in BH,
no result but flags are affected.
2. TEST BX,00FFH ;AND word in BX with immediate
data 00ffH, no result but flags are
affected.
3. TEST DX, [5000H];AND word in DX with a word in
memory with offset 5000 in DS,
no result but flags are affected.
TEST (Logical Compare) contd..
SHL / SAL (Shift Logical/Arithmetic Left)
Syntax :-- SHL/SAL destination, count
ā€¢ SHL & SAL are the opcodes for the same
operation
ā€¢This instruction shifts the destination bit by bit to
the left and insert zeroes in the newly introduced
least significant bits.
ā€¢The shift operation is through carry.
ā€¢The count can be either 1 or specified by CL
register.
ā€¢The destination can be a byte or a word in
register or a memory location, but not an
immediate data.
ā€¢Flags affected : OF ,CF, SF, ZF, PF.
ā€¢These instructions can be used to multiply an
unsigned number by power of 2.
CF BX
0
0
1
CF BX
ā€¢ Operation Performed :--
ā€“CF ļƒŸ MSB ļƒŸ------------------ LSB ļƒŸ 0
ā€¢ Example :--
ā€“ If CF = 0, BX = E6D3H
ā€“ After SAL BX, 1 ; Shift the contents of BX
register by one towards left
SHL / SAL (Shift Logical/Arithmetic Left)Cntd..
1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1
1 1 0 0 1 1 0 1 1 0 1 0 0 1 1 0
BX = CDA6
ā€¢ Example :--
ā€¢ Use of SHL instruction for Multiplication:-
ā€“ If CF = 0, BH = 04H
ā€“ MOV CL, 03 ; Load CL register for
the count
ā€“ SHL BH, CL ; Shift the contents
of BX register by one
towards left
ā€“ BH = 20H (32D) [ 04 * 23 = 32 D]
ā€“ Note :-- SHL can be used to multiply a number
with powers of 2.
SHL / SAL (Shift Logical/Arithmetic Left)Cntd..
0 0 0 1 0 0 0 0
CF BH
0
0
0
0
0
0
0
SHL / SAL (Shift Logical/Arithmetic Left)Cntd..
BH = 20H with CF = 0
0 0 0 0 0 1 0 0
0 0 0 0 1 0 0 0
0 0 1 0 0 0 0 0
SAR (Shift Arithmetic Right )
Syntax :-- SAR destination, count
ā€¢ This instruction shifts the destination bit by bit to
the right and MSB position is kept in the old MSB
position
ā€¢The shift operation is through carry, LSB is shifted
to CF.
ā€¢The count can be either 1 or specified by CL
register.
ā€¢The destination can be a byte or a word in
register or a memory location, but not an
immediate data.
ā€¢Flags affected : OF ,CF, SF, ZF, PF.
ā€¢This instruction can be used to divide an unsigned
number by power of 2.
BX CF
0
1
BX CF
1 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1
ā€¢ Operation Performed :--
ā€“ MSB -----------------ļƒ  LSB ļƒ  CF
ā€¢ Example :--
ā€“ If CF = 0, BX = E6D3H
ā€“ After SAR BX, 1 ; Shift the contents of BX
register by one towards right
SAR (Shift Arithmetic Right)Cntd..
1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1
BX = F369H
ā€¢ Example :--
ā€¢ Use of SAR instruction for Division:-
ā€“ If CF = 0, BH = 14H
ā€“ MOV CL, 02 ; Load CL register for the
count
ā€“ SAR BH, CL ; Shift the contents
of BX register by one
towards right
ā€“ BH = 05H (20D) [ 20 / 22 = 5D]
ā€“ Note :-- SAR can be used to divide a number with
powers of 2 and get the quotient.
SAR (Shift Arithmetic Right )Cntd..
0 0 0 0 0 1 0 1
BH CF
0
0
0
SAR (Shift Arithmetic Right)Cntd..
BH = 05H with CF = 0
0 0 0 1 0 1 0 0
0 0 0 0 1 0 1 0
SHR (Shift Logical Right)
Syntax :-- SHR destination, count
ā€¢This instruction shifts the destination bit by
bit to the right and insert zeroes in the newly
introduced most significant bits.
ā€¢The shift operation is through carry.
ā€¢The count can be either 1 or specified by CL
register.
ā€¢The destination can be a byte or a word in
register or a memory location, but not an
immediate data.
ā€¢Flags affected : OF ,CF, SF, ZF, PF.
1 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1
BX CF
0
0
1
BX CF
ā€¢ Operation Performed :--
ā€“0 ļƒ  MSB ------------------ļƒ  LSB ļƒ  CF
ā€¢ Example :--
ā€“ If CF = 0, BX = E6D3H
ā€“ After SHR BX, 1 ; Shift the contents of BX
register by one towards right
SHR (Shift Logical Right)Cntd..
1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1
BX = F369H

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Copy of 8086inst logical

  • 1. Logical Instructions ā€“These are the instructions used for basic logic operations such as AND, OR, NOT and XOR. ā€“These are also used for carrying out bit by bit operations such as shift (SHR,SHL) or rotate (ROL,ROR,RCR,RCL). ā€“ One more Instruction under this category is TEST instruction.
  • 2. AND (Logical AND) Syntax :-- AND destination, source ā€¢ This instruction is used to bit by bit AND the contents of source to the destination. ā€¢The result is stored in the destination. ā€¢The source operand can be a immediate, a register or a memory location. ā€¢The destination can be a register or a memory location, but not an immediate data. ā€¢Both operands cannot be immediate data or memory location. ā€¢Flags affected : OF = 0 ,CF = 0 , AF is undefined. ā€¢ And other flags (SF, ZF, PF) are affected based on the AND operation.
  • 3. ā€¢ Operation Performed :-- ā€¢ Destination ļƒŸ Destination AND source ā€¢ Examples :-- 1. AND BH,CL ;AND byte in CL with Byte in BH, result in BH. 2. AND BX,00FFH ;AND word in BX with immediate data 00ffH 3. AND [5000H], DX ;AND word in DX with a word in memory with offset 5000 in DS. AND (Logical AND) contd..
  • 4. Numeric Example If AX = 3F0F, After Instruction, AND AX,9078H ; AX ļƒŸ AX AND 0008H ;AX ļƒŸ 3F0F AND 0008 3F0F ļƒ  0011 1111 0000 1111 AND 9078 ļƒ  1001 0000 0111 1000 ------------------------------------- = 0001 0000 0000 1000 1008H in AX register
  • 5. OR (Logical OR) Syntax :-- OR destination, source ā€¢ This instruction is used to bit by bit OR the contents of source to the destination. ā€¢The result is stored in the destination. ā€¢The source operand can be a immediate, a register or a memory location. ā€¢The destination can be a register or a memory location, but not an immediate data. ā€¢Both operands cannot be immediate data or memory location. ā€¢Flags affected : OF = 0 ,CF = 0 , AF is undefined. ā€¢ And other flags (SF, ZF, PF) are affected based on the OR operation.
  • 6. ā€¢ Operation Performed :-- ā€¢ Destination ļƒŸ Destination OR source ā€¢ Examples :-- 1. OR BH,CL ;OR byte in CL with Byte in BH, result in BH. 2. OR BX,00FFH ;OR word in BX with immediate data 00ffH 3. OR [5000H], DX ; OR word in DX with a word in memory with offset 5000 in DS. OR (Logical OR) contd..
  • 7. Numeric Example If AX = 3F0F, After Instruction, OR AX,9078H ; AX ļƒŸ AX OR 9078H ;AX ļƒŸ 3F0F OR 9078 3F0F ļƒ  0011 1111 0000 1111 OR 9078 ļƒ  1001 0000 0111 1000 ------------------------------------- = 1011 1111 0111 1111 BF7FH in AX register
  • 8. XOR (Logical XOR) Syntax :-- XOR destination, source ā€¢ This instruction is used to bit by bit XOR the contents of source to the destination. ā€¢The result is stored in the destination. ā€¢The source operand can be a immediate, a register or a memory location. ā€¢The destination can be a register or a memory location, but not an immediate data. ā€¢Both operands cannot be immediate data or memory location. ā€¢Flags affected : OF = 0 ,CF = 0 , AF is undefined. ā€¢ And other flags (SF, ZF, PF) are affected based on the XOR operation.
  • 9. ā€¢ Operation Performed :-- ā€¢ Destination ļƒŸ Destination XOR source ā€¢ Examples :-- 1. XOR BH,CL ;XOR byte in CL with Byte in BH, result in BH. 2. XOR BX,00FFH ;XOR word in BX with immediate data 00ffH 3. XOR [5000H], DX ; XOR word in DX with a word in memory with offset 5000 in DS. XOR (Logical XOR) contd..
  • 10. Numeric Example If AX = 3F0F, After Instruction, XOR AX,9078H ; AX ļƒŸ AX XOR 0008H ;AX ļƒŸ 3F0F XOR 0008 3F0F ļƒ  0011 1111 0000 1111 XOR 9078 ļƒ  1001 0000 0111 1000 ------------------------------------- = 1010 1111 0111 0111 AF77H in AX register
  • 11. NOT (Logical Invert ) Syntax :-- NOT destination ā€¢ This instruction complements (inverts) each bit of the byte or word stored in the destination. ā€¢The result is stored in the destination. ā€¢The destination can be a register or a memory location. ā€¢No Flags affected
  • 12. ā€¢ Operation Performed :-- ā€¢ Destination ļƒŸ NOT Destination ā€¢ Examples :-- 1. NOT BH ;Complement byte in BH, result in BH. 2. NOT BX ; Complement word in BX, result in BX. 3. NOT BYTE PTR [5000H] ; Complement byte in memory with offset 5000 in DS. NOT (Logical Invert ) contd..
  • 13. Numeric Example If AX = 3F0F, After Instruction, NOT AX ; AX ļƒŸ NOT AX ;AX ļƒŸ NOT 3F0F 3F0F ļƒ  0011 1111 0000 1111 Complement ------------------------------------- = 1100 0000 1111 0000 C0F0H in AX register
  • 14. TEST (Logical compare ) Syntax :-- TEST destination, source ā€¢ This instruction is used to bit by bit AND the contents of source to the destination. ā€¢The result is not stored in the destination. ā€¢The source operand can be a immediate, a register or a memory location. ā€¢The destination can be a register or a memory location, but not an immediate data. ā€¢Both operands cannot be immediate data or memory location. ā€¢Flags affected : OF = 0 ,CF = 0 , SF, ZF, PF. ā€¢TEST instruction is used to set flags before a conditional jump instruction
  • 15. ā€¢ Operation Performed :-- ā€“ Flags ļƒŸ set result of Destination AND source ā€¢ Examples :-- 1. TEST BH,CL ;AND byte in CL with Byte in BH, no result but flags are affected. 2. TEST BX,00FFH ;AND word in BX with immediate data 00ffH, no result but flags are affected. 3. TEST DX, [5000H];AND word in DX with a word in memory with offset 5000 in DS, no result but flags are affected. TEST (Logical Compare) contd..
  • 16. SHL / SAL (Shift Logical/Arithmetic Left) Syntax :-- SHL/SAL destination, count ā€¢ SHL & SAL are the opcodes for the same operation ā€¢This instruction shifts the destination bit by bit to the left and insert zeroes in the newly introduced least significant bits. ā€¢The shift operation is through carry. ā€¢The count can be either 1 or specified by CL register. ā€¢The destination can be a byte or a word in register or a memory location, but not an immediate data. ā€¢Flags affected : OF ,CF, SF, ZF, PF. ā€¢These instructions can be used to multiply an unsigned number by power of 2.
  • 17. CF BX 0 0 1 CF BX ā€¢ Operation Performed :-- ā€“CF ļƒŸ MSB ļƒŸ------------------ LSB ļƒŸ 0 ā€¢ Example :-- ā€“ If CF = 0, BX = E6D3H ā€“ After SAL BX, 1 ; Shift the contents of BX register by one towards left SHL / SAL (Shift Logical/Arithmetic Left)Cntd.. 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1 0 BX = CDA6
  • 18. ā€¢ Example :-- ā€¢ Use of SHL instruction for Multiplication:- ā€“ If CF = 0, BH = 04H ā€“ MOV CL, 03 ; Load CL register for the count ā€“ SHL BH, CL ; Shift the contents of BX register by one towards left ā€“ BH = 20H (32D) [ 04 * 23 = 32 D] ā€“ Note :-- SHL can be used to multiply a number with powers of 2. SHL / SAL (Shift Logical/Arithmetic Left)Cntd..
  • 19. 0 0 0 1 0 0 0 0 CF BH 0 0 0 0 0 0 0 SHL / SAL (Shift Logical/Arithmetic Left)Cntd.. BH = 20H with CF = 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0
  • 20. SAR (Shift Arithmetic Right ) Syntax :-- SAR destination, count ā€¢ This instruction shifts the destination bit by bit to the right and MSB position is kept in the old MSB position ā€¢The shift operation is through carry, LSB is shifted to CF. ā€¢The count can be either 1 or specified by CL register. ā€¢The destination can be a byte or a word in register or a memory location, but not an immediate data. ā€¢Flags affected : OF ,CF, SF, ZF, PF. ā€¢This instruction can be used to divide an unsigned number by power of 2.
  • 21. BX CF 0 1 BX CF 1 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 ā€¢ Operation Performed :-- ā€“ MSB -----------------ļƒ  LSB ļƒ  CF ā€¢ Example :-- ā€“ If CF = 0, BX = E6D3H ā€“ After SAR BX, 1 ; Shift the contents of BX register by one towards right SAR (Shift Arithmetic Right)Cntd.. 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1 BX = F369H
  • 22. ā€¢ Example :-- ā€¢ Use of SAR instruction for Division:- ā€“ If CF = 0, BH = 14H ā€“ MOV CL, 02 ; Load CL register for the count ā€“ SAR BH, CL ; Shift the contents of BX register by one towards right ā€“ BH = 05H (20D) [ 20 / 22 = 5D] ā€“ Note :-- SAR can be used to divide a number with powers of 2 and get the quotient. SAR (Shift Arithmetic Right )Cntd..
  • 23. 0 0 0 0 0 1 0 1 BH CF 0 0 0 SAR (Shift Arithmetic Right)Cntd.. BH = 05H with CF = 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 1 0
  • 24. SHR (Shift Logical Right) Syntax :-- SHR destination, count ā€¢This instruction shifts the destination bit by bit to the right and insert zeroes in the newly introduced most significant bits. ā€¢The shift operation is through carry. ā€¢The count can be either 1 or specified by CL register. ā€¢The destination can be a byte or a word in register or a memory location, but not an immediate data. ā€¢Flags affected : OF ,CF, SF, ZF, PF.
  • 25. 1 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 BX CF 0 0 1 BX CF ā€¢ Operation Performed :-- ā€“0 ļƒ  MSB ------------------ļƒ  LSB ļƒ  CF ā€¢ Example :-- ā€“ If CF = 0, BX = E6D3H ā€“ After SHR BX, 1 ; Shift the contents of BX register by one towards right SHR (Shift Logical Right)Cntd.. 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1 BX = F369H