1. 1
CURRICULUM VITAE
To seek a challenging job in a reputed VLSI organization and to integrate my knowledge in
your esteemed organization .
Work Experience
Company name Designation From To
1) STMicroelectronics Internship trainee
(SoC Verification
Team)
8 January 2015 Till date
Role : It involves analyzing the testcases for checking the connectivity of various signals coming
out from communication peripheral IP’s like UART , SSC ( Synchronous Serial Controller ) etc to the
boundary of SoC and running them on SoC . Several modules which are reused across the SOC
have been studied and perl scripts have been written to make testcases more easily reusable or
portable across diffrent SOC’s .
2) Magneti Marelli Electronics
Systems (Fiat Groups)
Validation
Engineer 8 June 2012 26 July 2013
Role : It involved performing and writing test cases for functional cluster testing of various vehicle
functions along with diagnostics(both KWP and UDP) using Canalyzer(CAN tool) and CANoe by
Vector Informatik GmbH for clients like Fiat Linea , Fiat Panda ,Fiat Ducato etc . It also
involved automation of test cases using CAPL scripting .
Academics Name of Institute University/ Board
Year of
Pass.
Percentage
Marks
MTech( VLSI Design)
(till 3rd semester)
Indira Gandhi Delhi
Technical University
For Women , New
Delhi
Indira Gandhi Delhi
Technical University
For Women , New Delhi
2015 86.03%
BTech (ECE)
Institute of Technology
and Management
(I.T.M) Gurgaon
Maharshi Dayanand
University, Rohtak
2012
76.01%
Intermediate (12th) Model School,Rohtak C.B.S.E. 2008 83.80%
High School(10th) Model School,Rohtak C.B.S.E. 2006 93.50%
Career Objective
Academic Qualifications
GEETIKA CHAUDHARY
Email : geetikachaudhary90@gmail.com
Address : House no. 2, Model Town ,Rohtak
Haryana
Mobile : +917838494088

2. 2
Languages known
 RTL Design with Verilog (hands-on)
 RTL Design with VHDL (hands-on)
 System Verilog
 Perl scripting (hands-on)
 PSPICE (hands-on)
 C language (hands-on)
Tools used
 Model-Sim v 6.4a
 Questa Sim 10.0b
 NCSim
 Xilinx ISE Design Suite 13.4
 ORCAD CAPTURE
 Turbo C
Implementation Platform
 FPGA Spartan 3E
Operating System used
 Windows
 Unix Operating system
Area of Interest
 Digital Electronics
 Digital Integrated Circuits
Academic Projects
M Tech Projects :
 Design and verification of AMBA AXI4 Lite Slave Bus protocol
This project involves design of AMBA AXI4 Lite Slave bus protocol and verification
using the Verification IP on Questa Sim v 10.0b
 Wideband Voltage Follower using Dynamic Threshold Logic
This project involves simulation of DTMOS based Level Shifted Flipped Voltage
Follower (LSFVF) to improve the bandwidth of the conventional LSFVF . The
simulation has been done on 180nm technology and simulated using SPICE in
ORCAD CAPTURE v 9.1
 Power Reduction using Adiabatic Logic
This project involves simulation of Fattree and Mux-based decoders using PFAL
adiabatic technique and eventual reduction in power dissipation as compared to
conventional CMOS based design . The simulation has been done on 180nm
technology and simulated using SPICE in ORCAD CAPTURE v 9.1
BTech Project :
 Evaluation of routing protocols of MANET in Homogeneous and Heterogeneous
Networks.
This project involves performance analysis of routing protocols (AODV , OLSR and
DYMO ) by comparing parameters like jitter,average end to end delay and throughput
using Qualnet version 5.
Technical skills

3. 3
Training Programs
 Digital design using Verilog and implementation using FPGA 3E at Sofcon India Pvt
Ltd., Noida(1 month Dec 2013)
 Training programme in System Verilog at Sofcon India Pvt Ltd.(1 and a half month
June-July 2014)
 Practical Training in GSM from Etisalat DB Telecom Pvt Ltd,Gurgaon(5 weeks June
–July 2010).
 Geetika Chaudhary ,Shelly Garg, Vandana Niranjan and Ashwani
Kumar,“Bandwidth Extention of Voltage Follower using DTMOS transistor ”
IEEE Conference on Innovative Applications of Computational Intellegence on
Power,Energy and Controls with their Impact on Humanity 2014
 Geetika Chaudhary , Divya Nagpal ,Deepika Garg , Amanpreet Kaur, “Evaluation of
Routing Ptotocols of MANET in Homogeneous and Heterogeneous Networks”
International Conference on Emerging Trends in Engineering and Management 2012
 Active participant in the college cultural & technical festival.
 Active participation in Solo and duet singing competitions .
 Secured 3rd
position in the event ‘SOLO SINGING’.
 Secured 3rd
position in the event “CV WRITING”
 Secured 1st
position in the event “Amaizing Race” organized by the Institute
 Coordinated event “Think Over It” in college
 Coordinated an event ‘Rural Management’ in the college.
Strengths: -
 My intellect lies in hard work,diligency and sincerity
 Ability to work in a team.
 Positive approach towards life.
 Self-motivated and Determined
Personal details: -
Date of Birth : 25th October,1990
Father’s Name : Dr. S.K. Chaudhary
Mother’s Name : Dr. Harjeet Kaur Chaudhary
Nationality : Indian
Languages Known : Hindi, English,Punjabi
Marital status : Single
Passport no . : K9804663
Declaration:
I hereby certify that the information furnished above is correct to the best of my knowledge
and I have not suppressed any information in any manner.
Place : Delhi GEETIKA CHAUDHARY
Date : May 2015
Research Publications
Co-curricular Activities and Achievements