1. FREDDIE MANUEL GUERRERO
21B del Pilar St. Paraiso, Tarlac City 2300 • (+63925) 878-2043 • freddiemguerrero@gmail.com
Page 1 of 3
JOB OBJECTIVE
To seek further job opportunities that utilizes my 4 years layout design
experience at the same time for career growth and development in IC
design and semiconductor knowledge.
CORE COMPETENCIES
 Semiconductor Knowledge
 Problem solving Techniques
 Communication Skill
 Technical writing Skill
 Supervisory Skill
 Computer Skill
 Human Relations
 Records Management
PROFESSIONAL EXPERIENCE
LAYOUT DESIGN ENGINEER, 2011 – Present
ON Semiconductor SSMP Philippine Design Center, Tarlac City, Philippines
Oversees definition, design, verification, and documentation for product development. Determines
architecture design, logic design, and system evaluation. Defines module interfaces/formats for
simulation. Contributes to the development of multi-dimensional designs involving the layout of complex
integrated circuits. Evaluates all aspects of the process flow from high-level design to synthesis, place and
route, and timing and power use. Analyzes equipment to establish operation data, conducts experimental
tests,and evaluate results.
Selected accomplishments:
 Acquired skill to perform small to large scale block and top design using Cadence, Pyxis and ISMO
tool.
 Completed 5 new projects (LV8531, LV8815, LV2240, LV5685, X316) with zero quality claim and
on-time delivery.
 Document owner for Design View Form, SOP and Work Instruction as part of the Layout Design
Procedure.
 Active participation for tool and process trainings with above average result.
 Subject Matter Expert for BiDC15C process know-how.
Key Responsibilities:
1. Designs blocks, Standard cells, and TOP layouts.
1.1 Checks and verifies designed layout using the required verification tool (Calibre).
1.2 Does visual inspection to the designed blocks, standard cells and chip to meet the quality

2. FREDDIE MANUEL GUERRERO
21B del Pilar St. Paraiso, Tarlac City 2300 • (+63925) 878-2043 • freddiemguerrero@gmail.com
Page 2 of 3
requirements and design specification
1.3 Submit designed data on or before the set Japan’s deadline.
2. Does Engineering Sample (ES) revision of blocks, standard cells, chips, and derived blocks,
standard cells and chips.
3. Communicates and coordinates regularly with the assigned technical leader and engineers in
Japan regarding the job status (as project leader).
4. Complies with current QMS, EMS, and EICC and COBC standards.
5. Attends training/seminar whenever required.
6. Performs clerical duties.
7. Assists other staff whenever needed.
8. Performs other duties that may be assigned by superior from time to time.
Competencies:
1. Design Tool Expertise;
1.1. Virtuoso (Cadence)
1.2. Ismo (Jedat)
1.3. Pyxis ( Mentor Graphics)
2. Design Process Expertise;
2.1. ONBCD25
2.2. ONC25
2.3. ON50
2.4. I3T5O
2.5. BIDC15C (Process-in-charged)
2.6. BIDC16
2.7. 0.12um PFLASH
2.8. TS18PM (Tower Jazz)
2.9. UBIC7 (RF design)
MATH INSTRUCTOR, 2008 – 2011
KUMON Learning Center, Tarlac City, Philippines
Handles all Mathematics teaching levels. Responsible for study projected plan for each student.
Coordinates to parents for each student’s progress.

3. FREDDIE MANUEL GUERRERO
21B del Pilar St. Paraiso, Tarlac City 2300 • (+63925) 878-2043 • freddiemguerrero@gmail.com
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EDUCATION
BACHELOF OF SCIENCE IN ELECTRICAL ENGINEERING, 2011
Tarlac State University, Tarlac City, Philippines
PROFESSIONAL AFFILIATIONS
 Member, INSTITUTE OF INTEGRATED ELECTRICAL ENGINEERS OF THE PHILIPPINES
 Member, PROFESSIONAL REGULATION COMMISSION(PRC license no. 0046925)
PERSONAL INFORMATION
Birth date : 16 August 1986
Age : 29
Status : Married
Spouse’s Name: Maria Riena Carillo - Guerrero
Height : 173 cm.
Weight : 76 kg.
Religion : The Church of Jesus Christ of Latter - Day Saints
CHARACTER REFERENCE
 JASON BALTAZAR
jason.baltazar@nxp.com
 FRANCIS BELEN
francis.belen@nxp.com
I hereby certify that the above-mentioned information is true and correct according to the best of
my knowledge.
FREDDIE M. GUERRERO
Applicant