Avionics Sensor Simulation and Prototype Design Workstation using
COTS reconfigurable computing technology
James Falasco T...
on a single chip.
A range of I/O options is offered including up to two Gigabit Ethernet channels, up to 12
bits of discre...
Fig. 3. Example: Sensor Images
This approach allows one to demonstrate how algorithms can be implemented and simulated in ...
PMC#3—High Speed Data Acquisition
High Speed A/D data acquisition PMC modules can be used to aid designers in creating the...
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Avionics Paperdoc

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Paper Presented at International Avionics Event. I have taught classes and given seminars internationally

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Avionics Paperdoc

  1. 1. Avionics Sensor Simulation and Prototype Design Workstation using COTS reconfigurable computing technology James Falasco Timothy Klassen P. Eng. Product Sales Leader Senior Engineer High Performance Computing & Graphics Sensor & Signal Processing GE Fanuc Intelligent Platforms GE Fanuc Intelligent Platforms 5201 Regent Ave., Irving, Texas USA 5430 Canotek Rd. ,Ottawa. On K1J9G2 972-536-8410 james.falasco@ge.com 613-749-9241 timothy.klassen@ge.com ABSTRACT This paper reviews hardware and software solutions that allow for rapid prototyping of new or modified embedded avionics sensor designs, mission payloads and functional sub assemblies. We define reconfigurable computing in the context of being able to place various PMC modules depending upon mission scenarios onto a base SBC (Single Board Computer). Keywords: Sensor simulation, reconfigurable computing, video compression, video, reflective memory, payload integration, sensor fusion, high speed data acquisition, video surveillance 1. INTRODUCTION The design of avionics sensors and mission payloads can be a complex and time-consuming process. However, the design cycle can be significantly shortened if the system designer has access to a flexible, reconfigurable development environment that closely mimics the capabilities and technologies of the deployed system. By integrating various PMC modules with a scalable, reconfigurable multiprocessor architecture, it is possible to create a development tool that will allow the system designer to rather quickly and accurately simulate and test with real data sets the various sensor designs and mission components to be fielded. Specifically, we present a rapid prototyping and rapid evaluation system that will simplify the establishment of performance requirements, and allow the quick evaluation of hardware and software components being considered for inclusion in a new sensor system design or a legacy platform upgrade. ( I reference HW but do not hit the SW ..I would like to also reference SW In the Intro) 2. AN OPEN SYSTEMS, COTS PLATFORM The system hardware and software used to evaluate sensor designs and mission payload components and algorithms should be open and reconfigurable to allow for the mixing and matching of various vendor offerings. Provision for hardware independence is critical, since the hardware is very likely to rapidly evolve at the pace of new computer technology. The software infrastructure should be scalable and flexible allowing the algorithm developers the ability to spend their time and budget addressing the important functionality and usability aspects of the systems design. The system proposed here, a test and evaluation workstation built around reconfigurable hardware and a component-based software toolset, provides the necessary tools to ensure the success and cost effectiveness of initial sensor design and payload development. At the center of any scalable prototyping system is a reconfigurable multiprocessing CPU engine with associated memory. The system depicted in Fig. 1 provides developers a scalable environment for application design and test. A COTS single board computer (SBC) tightly integrated to a PMC FPGA card for design experimentation forms the core system. A typical COTS SBC host as shown in Figure 1 is designed for demanding applications with restrictive dimensional requirements Many times we see the extremely space- efficient 3U form factor being utilized with it's impressive processing core based around a Free scale 7448 PowerPC processor and a Marvell Discovery 3 Integrated System Controller which combines high bandwidth memory control and PCI bridging with an array of communication peripherals, including high speed serial and Ethernet ports, all
  2. 2. on a single chip. A range of I/O options is offered including up to two Gigabit Ethernet channels, up to 12 bits of discrete digital I/O, and up to two serial channels capable of high speed operation in either asynchronous or synchronous mode and software programmable as RS232/422 or 485. Figure 1 Typical COTS Host Other PMC modules can then be selected depending on the type of sensor input that needs to be processed. One of the main advantages of this approach is the ability to rapidly prototype mockups for test and evaluation without a concern for the limitations of embedded development at this early stage. COTS SBC' s usually have the ability to host two PMC modules per card. The Video card can efficiently manage real sensor input coming in from an EO/IR sensor/camera, and also display that data in a fused fashion. This approach allows the system builder to work in the lab and the field using the same hardware/software environment. This system configuration also provides the developer with a test bed to define/design new hardware requirements and processing streams. (Here I would like to elaborate on the Idea of video recording) 3. PROTOTYPING SYSTEM STRUCTURE Modern embedded avionics sensor design is primarily driven by the goal of providing a net-centric flow of data from platform to platform. The achievement of this vision depends on transferring and processing vast amounts of data from multiple sources. Let’s examine how one could use this approach to control and manage various sensors in a rapid prototyping environment. As depicted in Figure 1, the host server for the embedded avionics sensor design workstation is a COTS PPC 7448 .The boards architecture provides robust scaling to achieve high performance for the most demanding signal and Image Processing applications. design requirements associated with various sensor and mission payload solutions. Fig. 2. FPGA vision and graphics platform The COTS SBC architecture combined with the FPGA/Video cards allows for seamless mapping of imaging applications oriented toward change detection and sensor fusion which will allow the systems designer to view multiple data streams in a simulations real time display environment. All old ( replace with new story) . The prototyping architecture outlined here is based on a combination of tightly integrated reconfigurable computing, video and graphics. It will place the embedded avionics sensor design community in position to utilize the proposed system architecture in development of the actual controller for payload packages as well as the sensor itself and in its actual deployment integration. Most importantly it will allow for cost-effectively maintaining and extending the system when new technologies are available in the future.
  3. 3. Fig. 3. Example: Sensor Images This approach allows one to demonstrate how algorithms can be implemented and simulated in a familiar rapid application development environment before they are automatically transposed for downloading directly to the distributed multiprocessing computing platform. This complements the established control tools, which usually handle the configuration and control of the processing systems leading to a tool suite for system development and implementation. 3.1 The advantages of FPGA Computing A key component of reconfigurable scalable embedded avionics sensor design and prototyping capability is access to FPGA based processing. FPGA (Field Programmable Gate Array) is defined as an array of logic blocks that can be ‘glued’ together (or configured) to produce higher level functions in hardware. Based on SRAM technology, i.e., configurations are defined on power up and when power is removed the configuration is lost – until it is ‘reconfigured’ again. Since an FPGA is a hardware device, it is faster than software. The FPGA can best be described as a parallel device that makes it faster than software. FPGAs as programmable “ASICs” can be configured for high performance processing, excelling at continuous, high bandwidth applications. FPGAs can provide inputs from digital and analog sensors —LVDS, Camerink, RS170 — with which the designer can interactively apply filters, do processing ,compression, image reconstruction and encryption time of applications. Examples of the flexibility of this approach using COTS PMC Modules hosted by a COTS multiprocessing base platform are shown in Figures 2 & 3 3.2 The ‘Mix and Match’ Platform Advantage Today’s soldier, who is the ultimate customer of the embedded systems designer, is faced with a continuously fluid chain of world events. These changing events are closely mapped into the deployment of various air, sea and land platforms which contain the reconfigurable embedded systems architecture under discussion in this paper. For example, based on changing mission requirements, any of the following three different areas might be needed by the war fighter. A key cornerstone of the ‘mix and match’ strategy is that while the PMC module may change from application to application, the core SBC ‘multiprocessor’ engine and its associated software tool chain remains constant. The same can be said for the VME enclosure that contains the processing cards. Let’s now examine the application areas and understand how we could place various PMC combinations together to address the processing requirements of each application. The system designer addressing these defined application areas could place various PMC modules together in the prototyping system with relative ease. Specifically, these applications might collectively require the following list of PMC modules: PMC #1—Graphics Graphics PMC modules allow one to combine a graphics overlay symbology scheme with incoming video. This type of module can be used in ISR payload design by showing various streams of incoming data taken from multiple sensors processed and fused ; allowing designers to determine optimal sensor combinations for different mission scenarios. ( elaborate on sw aspect) PMC#2—Video Compression In the video surveillance application area, the video compression PMC module would pre-process and reduce the incoming data stream and pass it to the multiprocessor base system for potential change detection analysis. Then using a PMC 1553 module, one could communicate to an external avionics platform to perhaps control or guide ordnance being placed upon the target under surveillance. In each of the three examples above, the modules are interchangeable depending upon the specific mission. This approach would allow the soldier to move module packages between platforms achieving different mission scenarios ( elaborate on sw aspect)
  4. 4. PMC#3—High Speed Data Acquisition High Speed A/D data acquisition PMC modules can be used to aid designers in creating the optimal sensor combinations to perform evolving missions. ( Elaborate on FPGA and discuss Ottawa technology) . 4. CONCLUSIONS The goal of integrating a COTS system such as the one depicted here is to allow designers to use the same environment in the lab that they could then take to the field for live data collection activity. This is of particular value to a system engineer who could use such an environment to perform new development activities. Because of these efficiencies, the outlined prototyping system would pay off in accelerated product development time. Systems designers are traditionally faced with the challenge that today’s sensors are generating data at a rate far faster than the backend end systems are configured to process. Combine this fact with the reality that a sensor fusion “paradigm” is now mandatory for designers wishing to turn concepts into reality rapidly. A key component to a flexible hardware system, of course, is a software structure that enables designers to go from their ideas and algorithmic concepts to code or HDL. ( elaborate here) Packaging of the system is largely dependent on the user’s requirements for flexibility. Should the user desire a system that can be scaled up by adding additional cards, then a larger slot chassis could be configured to allow for the addition of other cards. The key point is that the core hardware outlined not only has the potential for scalability by adding additional modules to the base processing units, but the entire system has scalability as well.

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