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Signal Integrity Design   Agilent EEsof EDA
                   Using
Fast Channel Simulation    Colin Warwick
                           Signal Integrity Product Manager
                     and
Statistical Eye Diagrams   July 22th, 2009




                                                   © 2009 Agilent Technologies, Inc.
1                                                                   July 22th, 2009
How To Optimize Tx, Channel, and Rx in a Large
Multi-dimensional Design Space?
            XTalk1   Jitter

             PRBS      ∑      EQ


            TX       Jitter          Channel             Jitter     RX

             PRBS      ∑      EQ                           ∑      EQ

                                                                    Received
            XTalkN   Jitter                                         Signal

             PRBS      ∑      EQ

• Optimization goal
  – Lowest cost way of achieving 10−10 or 10−12 BER contour versus eye mask
• Need BER @ thousands of sets of settings in the design space
• Multi-million-bit SPICE-like simulations are prohibitively long
• Bit-by-bit fast channel simulation is better – million bits per minute
• Statistical channel simulation is even better – ultralow BER in a few seconds

                                                                       © 2009 Agilent Technologies, Inc.
2                                                                                       July 22th, 2009
Comparison of Techniques

                 Transient            Channel            Channel
                 (SPICE-like)         Simulator,         Simulator,
                 Simulator            Bit-by-bit mode    Statistical mode
Method           Modified nodal       Bit-by-bit         Statistical
                 analysis of          superposition of   calculations
                 Kirchoff’s current   step responses     based on step
                 laws for every                          response
                 time step
Applicability    Linear and non-      LTI, any specific LTI, fixed, general
                 linear circuits      bit pattern,      bit pattern, fixed
                                      adaptive eq. taps eq. taps
BER floor in one ~10-3                ~10-6              Arbitrarily low
minute simulation



                                                              © 2009 Agilent Technologies, Inc.
3                                                                              July 22th, 2009
Channel Simulator: Bit-by-bit mode

    1) SPICE-like transient response of single bit: runs on existing schematic




    2) Response of millions of bits per minute using signal processing techniques

                                    Superposition

                                                                    ISI




                                                                          © 2009 Agilent Technologies, Inc.
4                                                                                          July 22th, 2009
Channel Simulator: Statistical mode

    1) SPICE-like transient response of single bit: runs on existing schematic




    2) Statistical calculations including ISI, crosstalk, jitter specification, equalizers,
        and encoding




                                                                               © 2009 Agilent Technologies, Inc.
5                                                                                               July 22th, 2009
Channel Simulator: Bit-by-bit and Statistical Modes
                                                                               Integrate layout                   EyeDiff_Probe
                                                                                                                  EyeDiff
                                                                               artwork into       V+


                              ML2CTL_V
                                                                               schematic               V-

                              CLin1
                4


            1
                                                                        Via1
                      2
                                                                                                            TL1
                3   Re f




            S4P
            SNP1           Metal-1                                   Via2
                                                                                                            TL2
                                       Dielectric-1                             blah
                           Metal-2
                           Metal-i :     T[i], COND[i], TYPE[i]
                                                                                blah_1
                             Dielectric-i : ER[i], H[i], T AND[ i]
                                                                                ModelType=MW
                                 Subst1




                                                                                                                   © 2009 Agilent Technologies, Inc.
6                                                                                                                                   July 22th, 2009
Demo
    youtube.com/watch?v=AZ8Kv8l4Fjc



                              © 2009 Agilent Technologies, Inc.
7                                              July 22th, 2009
Summary and Next Steps

• Explore a large design space quickly using statistical
  channel simulation and optimization of BER contours
  versus eye mask goals
• In-depth webcast: live July 29th, 2009 11AM PDT
    http://event.on24.com/r.htm?e=151461&s=1&k=45AAAF345F3B6FC01400112AD06ED046
  Google “Agilent channel simulator webcast”
• Application page:
  http://www.agilent.com/find/signal-integrity
• Blog:
  http://signal-integrity-tips.com
• Evaluate ADS 2009 Update 1:
  http://www.agilent.com/find/eesof-ads2009-update1
  – Early Access (beta) available now
  – Product Shipment in September



                                                                                  © 2009 Agilent Technologies, Inc.
8                                                                                                  July 22th, 2009

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Preview of Agilent ADS Channel Simulator Webcast

  • 1. Signal Integrity Design Agilent EEsof EDA Using Fast Channel Simulation Colin Warwick Signal Integrity Product Manager and Statistical Eye Diagrams July 22th, 2009 © 2009 Agilent Technologies, Inc. 1 July 22th, 2009
  • 2. How To Optimize Tx, Channel, and Rx in a Large Multi-dimensional Design Space? XTalk1 Jitter PRBS ∑ EQ TX Jitter Channel Jitter RX PRBS ∑ EQ ∑ EQ Received XTalkN Jitter Signal PRBS ∑ EQ • Optimization goal – Lowest cost way of achieving 10−10 or 10−12 BER contour versus eye mask • Need BER @ thousands of sets of settings in the design space • Multi-million-bit SPICE-like simulations are prohibitively long • Bit-by-bit fast channel simulation is better – million bits per minute • Statistical channel simulation is even better – ultralow BER in a few seconds © 2009 Agilent Technologies, Inc. 2 July 22th, 2009
  • 3. Comparison of Techniques Transient Channel Channel (SPICE-like) Simulator, Simulator, Simulator Bit-by-bit mode Statistical mode Method Modified nodal Bit-by-bit Statistical analysis of superposition of calculations Kirchoff’s current step responses based on step laws for every response time step Applicability Linear and non- LTI, any specific LTI, fixed, general linear circuits bit pattern, bit pattern, fixed adaptive eq. taps eq. taps BER floor in one ~10-3 ~10-6 Arbitrarily low minute simulation © 2009 Agilent Technologies, Inc. 3 July 22th, 2009
  • 4. Channel Simulator: Bit-by-bit mode 1) SPICE-like transient response of single bit: runs on existing schematic 2) Response of millions of bits per minute using signal processing techniques Superposition ISI © 2009 Agilent Technologies, Inc. 4 July 22th, 2009
  • 5. Channel Simulator: Statistical mode 1) SPICE-like transient response of single bit: runs on existing schematic 2) Statistical calculations including ISI, crosstalk, jitter specification, equalizers, and encoding © 2009 Agilent Technologies, Inc. 5 July 22th, 2009
  • 6. Channel Simulator: Bit-by-bit and Statistical Modes Integrate layout EyeDiff_Probe EyeDiff artwork into V+ ML2CTL_V schematic V- CLin1 4 1 Via1 2 TL1 3 Re f S4P SNP1 Metal-1 Via2 TL2 Dielectric-1 blah Metal-2 Metal-i : T[i], COND[i], TYPE[i] blah_1 Dielectric-i : ER[i], H[i], T AND[ i] ModelType=MW Subst1 © 2009 Agilent Technologies, Inc. 6 July 22th, 2009
  • 7. Demo youtube.com/watch?v=AZ8Kv8l4Fjc © 2009 Agilent Technologies, Inc. 7 July 22th, 2009
  • 8. Summary and Next Steps • Explore a large design space quickly using statistical channel simulation and optimization of BER contours versus eye mask goals • In-depth webcast: live July 29th, 2009 11AM PDT http://event.on24.com/r.htm?e=151461&s=1&k=45AAAF345F3B6FC01400112AD06ED046 Google “Agilent channel simulator webcast” • Application page: http://www.agilent.com/find/signal-integrity • Blog: http://signal-integrity-tips.com • Evaluate ADS 2009 Update 1: http://www.agilent.com/find/eesof-ads2009-update1 – Early Access (beta) available now – Product Shipment in September © 2009 Agilent Technologies, Inc. 8 July 22th, 2009