1. Gallium Nitride
Power JFET Stress Test
Abhimanyu Madan
12 December 2014
Master Thesis Presentation

2. Copyright © Infineon Technologies 2010. All rights reserved.
Overview
Development of an application reliability stress test system for
Infineon Gallium Nitride Power JFETs in order to generate stress
related degradation and failure modes in GaN power devices
Application hardware – Power factor correction boost converter with
constant current operation
Page 2

3. Copyright © Infineon Technologies 2010. All rights reserved.
Hardware
 Block Diagram
Page 3
DC
Gate Driver
Protection MOSFET
PWM
PWM
Protection Diodes
Current Sensor
40 uF
20uF 135 uH
750 nF
4.7 uH
Inrush Current path
10 nF
4.4 Ohms
2.2nF12 Ohms
Electronic
Load
Microcontroller
Board

4. Copyright © Infineon Technologies 2010. All rights reserved.
Hardware
Page 4
Main Board Device under Test Board and Heatsink
• Passive Components
• Protection elements
• Current sensing
• Controller Board
• Active half Bridge
• Heatsink thermal resistance – 0.4 K/W
• DuT Layout tradeoff b/w optimum heat
conduction and capacitive coupling with
heatsink

5. Copyright © Infineon Technologies 2010. All rights reserved.
Hardware Verification
Page 5
 High Voltage Tests 220 V – 3.5 A, 100 V 7.5 A
Rise Time – 5.642 ns Fall Time – 4.434 ns
GaN Turn Off GaN Turn On
R_gate,off = 0 W
dV/dt,off = 23 V/ns
R_gate,on = 2.2 W
dV/dt,on = 20 V/ns

6. Copyright © Infineon Technologies 2010. All rights reserved.
Hardware Verification
Page 6
 High Voltage Tests 400 V – 10 A
Lower GaN VDS
Gate Signal
Inductor Current
Output Current
• Low overshoot (VDS) during turn off (low parasitic L)
• DC link voltage – low ripple (snubber)
• Current – low noise (2 inductors in series)

7. Copyright © Infineon Technologies 2010. All rights reserved.
Hardware Verification
Page 7
 High Voltage Tests 400 V – 10 A
Rise Time – 7.609 ns Fall Time – 5.504 ns
GaN Turn Off GaN Turn On
Dead Time – 25 ns
R_gate,off = 10 W
dV/dt,off = 33 V/ns
R_gate,on = 10 W
dV/dt,on = 46 V/ns

8. Copyright © Infineon Technologies 2010. All rights reserved.
Hardware Verification
 Snubber Performance
Page 8
Without Capacitor Smaller Inductor Bypassed
Ringing frequency increasedNoise peak lower
Oscillations increase
135 uH
4.7 uH
2.2nF12 Ohms

9. Copyright © Infineon Technologies 2010. All rights reserved.
Hardware Verification
 Protection Circuit
Page 9
Inductor Current
Output Current
Lower GaN VDS
• Inrush current higher than reference for protection
• Comparator detects over current – shutdown
• Current extinguished ~ 40 us

10. Copyright © Infineon Technologies 2010. All rights reserved.
Hardware Verification
Page 10
 Thermal Images
Lower GaN Temp – 111.5°C Upper GaN Temp – 102.6°C
• Heatsink with phase change isolation material
• Total Power Stage Rth ~ 4 K/W to ambient
(total dissipation measured at low V / high I)

11. Copyright © Infineon Technologies 2010. All rights reserved.
Hardware Problems
 Current Oscillation
Page 11
Inductor Current
Output Current
Gate Signal (VGS)
Lower GaN VDS
• Oscillation - certain output voltage levels
• Stable for other values

12. Copyright © Infineon Technologies 2010. All rights reserved.
Stress Test
 Test Setup
Page 12

13. Copyright © Infineon Technologies 2010. All rights reserved.
Stress Test
 Test Startup - Finite State Machine
Idle – Idle state, waiting for start command
Init - Initialize required modules
Conf – Set test parameters
Run – Start test execution with protection limits
Temp - Check for over temperature
Cleanup – stop test and disable modules
Page 13

14. Copyright © Infineon Technologies 2010. All rights reserved.
Stress Test
 Controller Instability
Page 14
Unstable current Stable Current

15. Copyright © Infineon Technologies 2010. All rights reserved.
Conclusion
 Application hardware – developed
 Device performance characterized
 Controller parameters for testing
 Stress Test with 100 hours testing
 Controller stability – testing ongoing
 Full stress test - ongoing
Page 15

16. Thanks for your attention
abhimanyu.madan@k-ai.at