Overview of Triad Semiconductor, fabless provider of via-configurable mixed signal ASIC solutions - ASIC benefits without the problems - 80% savings in development cost, kick-off to working silicon in 3-5 months, desktop design tools.

1. Triad Semiconductor
Company Overview
The Low Cost Mixed Signal ViaASIC Company
© Triad Semiconductor 2012

2. Company Snapshot ViaASIC
• Founded in 2002 in Winston-Salem NC
• Triad makes developing mixed-signal
custom silicon fast and affordable
• Patented VCA technology and
Via-Only™ EDA software
• Fabless provider of custom ICs to
defense, industrial, medical &
consumer markets
• Highly experienced IC design team
• World-class semiconductor supply-chain
and partners
www.triadsemi.com 2

3. Fast, Affordable Semiconductor Integration
• Lower Cost
REG
FPGA • Reduce Size, Weight, Power
REG ADC ASIC • Protect IP
CPU
• Improve Reliability
• Improve Manufacturability
What the customer has What the customer wants
• Expensive NRE +$1,000,000 • $200K - $300K NRE (80% off)
• Long development +18 months Triad’s • 3-5 months (70% sooner)
• Risky (schedule & performance) ViaASIC • Low risk – proven silicon
• High volume only • Any production volume
The customer’s adoption barriers Triad’s ViaASIC™ - ASIC benefits minus the problems
www.triadsemi.com 3

4. VCA Via Configurable Array Technology
1 Triad develops 2
full-custom high- 3 Tiles are assembled to create a VCA
performance IP is grouped into
a variety of tiles targeted at a particular application space
mixed signal IP
• Single-Ended
• Op amps • Differential
• Resistors • Low-Noise
• Capacitors • Wideband
• Transistors • High Voltage
• Switches • FET Tiles
• Band Gaps • Rad-Hard
• ADCs, DACs • Memory
• Regulators • PHYs
• Logic, RAM • …
• ARM CPUs
• …
4 A patented global routing fabric covers
6 A single via mask is the entire array
processed against 5 Triad’s mixed-signal aware
ViaASIC staged wafers
place & route tool puts vias in
the fabric to connect resources
www.triadsemi.com 4

5. Mentor Graphics
SystemVision Working with Triad ViaDesigner
Modelsim
Digital Simulation
FPGA
Long-Term
ELDO
REG
REG
ADC
Supply of
Analog Simulation custom parts
CPU
5, 10, 15+
VHDL, Verilog,
Find leads needing Refine Development 3-6 month Revisions in years
VHDL-AMS, SPICE
integration requirements proposal development 4-weeks
Easy to use
Full Turnkey
Design WizardsHigh-Level Detailed Prototype Production Package &
Service by
Front-End Design Back-End Design Fabrication Fabrication Test
Triad
ViaDesigner High-Level Detailed Prototype Production Package &
2012 Front-End Design Back-End Design Fabrication Fabrication Test
ViaDesigner High-Level Detailed Prototype Production Package &
2013 Front-End Design Back-End Design Fabrication Fabrication Test
ViaDesigner customers get even lower NRE & gain more IP control
www.triadsemi.com 5

6. Via Configurable Arrays For More Information
• 3-6 month development cycle
• Low cost development
• Low risk – 4-week re-spin Triad Semiconductor
• Any production volume 3900 Westpoint Blvd
Winston-Salem NC 27103
336.774.2150
Integrated www.triadsemi.com
Circuit
Traditional ASICs Phil Muehring
• Long development VP Strategic Business
• Expensive dev
Development
• Risky development
• High volume only phil@triadsemi.com
952.451.4658 (mobile)
Application
Specific Reid Wender
A better ASIC. Application specific VP Marketing &
optimization, integrated circuit Technical Sales
benefits – without traditional ASIC rwender@triadsemi.com
headaches. 865.684.5106 (mobile)
Low Cost Mixed Signal ASIC Design
6
© Triad Semiconductor, 2012