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Peeyush Pashine
Peeyush Pashine
1 of 21
Naivedya Mishra(2011H140034H) Peeyush Pashine(2011H140033H) Pravesh Tamrakar(2011H140036H) M Ashwin(2011H140038H)
 BACKGROUND Use of ECG Records the rhythm and electrical activity of patient Types of Noise  Power Line Noise  Baseband Vendor Noise  Muscular Noise
 Power Line Noise (50 Hz)  How to get a pure ECG signal Determine set of filter coefficient to meet a design Specification  Tools used MATLAB,VERILOG…
 Power Frequency Deviation Transition from 50 Hz…  Filter Specifications
 Appropriate Filter IIR vs FIR Chebyshev Over Other Filters Chebyshev1 Over Chebyshev2
 4th order BS - more accurately as compared to other filters  2nd order BS filter & 2nd order Notch filter - similar coefficients and characteristics  Differentiated by computational methods
 Generation of Verilog code and corresponding Testbench for filter  Simulation of testbench using Xilinx 13.1  Coded for Spartan 3E(standard).
 MAC: a <- a+ (b*c)  Coefficients fed from LUT’s  Multiplication in form of recursive addition
THANK YOU

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Dsp Presentation

  • 1. Naivedya Mishra(2011H140034H) Peeyush Pashine(2011H140033H) Pravesh Tamrakar(2011H140036H) M Ashwin(2011H140038H)
  • 2. BACKGROUND Use of ECG Records the rhythm and electrical activity of patient Types of Noise  Power Line Noise  Baseband Vendor Noise  Muscular Noise
  • 3. Power Line Noise (50 Hz)  How to get a pure ECG signal Determine set of filter coefficient to meet a design Specification  Tools used MATLAB,VERILOG…
  • 4. Power Frequency Deviation Transition from 50 Hz…  Filter Specifications
  • 5.
  • 6. Appropriate Filter IIR vs FIR Chebyshev Over Other Filters Chebyshev1 Over Chebyshev2
  • 7.
  • 8.
  • 9.
  • 10.
  • 11.
  • 12.
  • 13.
  • 14.
  • 15. 4th order BS - more accurately as compared to other filters  2nd order BS filter & 2nd order Notch filter - similar coefficients and characteristics  Differentiated by computational methods
  • 16.
  • 17. Generation of Verilog code and corresponding Testbench for filter  Simulation of testbench using Xilinx 13.1  Coded for Spartan 3E(standard).
  • 18.
  • 19. MAC: a <- a+ (b*c)  Coefficients fed from LUT’s  Multiplication in form of recursive addition
  • 20.