1. Effect of Electrostatic Discharge on Analog Circuits
Rajashree Narendra1
, M.L. Sudheer2
and D.C.Pande3
1
BNM Institute of Technology, Bangalore, India
E-mail:rajashree.narendra@gmail.com
2
UVCE, Bangalore, India
E-mail::mlsudheer@gmail.com
3
EMI/EMC Group, LRDE, Bangalore, India
E-mail::pandedc@gmail.com
Abstract— A study of the effects of ESD on analog circuit is carried out. The analog circuit
is a RC phase shift oscillator followed by a zero crossing detector (ZCD). The analog circuit
is subjected to indirect discharge on horizontal coupling plane and direct air discharge and
the effects of ESD on oscillator and ZCD circuit are analyzed. The analog circuit is also
modeled using five-spice to check if it is possible to simulate ESD events and predict its
behavior. The simulation and experimental results show similar results though not identical
in all the cases. Simulation becomes useful in predictions of the effect of ESD at various
points in the analog circuit and this helps us in locating weak points of the circuit where
extra protection may be needed.
Index Terms— Electrostatic discharge, Analog circuits, phase shift oscillator, susceptibility,
spice simulation, electromagnetic compatibility, zero crossing detector, direct ESD, Indirect
ESD and Five spice.
I. INTRODUCTION
Susceptibility tests are performed on a device to determine whether the device is susceptible to RF signals
levels having specified amplitude over a specified frequency range. If the device operates acceptably as the
signal is applied and swept over the specified frequency range the device is considered to have passed. If not,
it has failed. In many cases a device that is adversely affected by the applied signal will return to normal
operation when the signal is removed. If the device under investigation is found to be susceptible to the
applied signal, the amplitude at which the device exhibits susceptible behavior is called the susceptibility
threshold. Thus, for injected signal levels below the susceptibility threshold the device operates acceptably,
and at levels above the susceptibility threshold the device does not operate acceptably. The criteria for
establishing what constitutes ‘operating acceptably’ are a function of the device and its intended use [1]. In
addition to identifying a sensitive component or circuit, susceptibility testing must be able to quantify
susceptibility levels and ideally correlate these results with the system level test results. Simply doing a
system level test on a device is useless unless susceptibility levels of that device or circuit can be determined
and quantified.
Most of the electronic components that are considered fairly rugged can be damaged by ESD. Bipolar
transistors, the earliest of the solid state devices, are not immune, though less susceptible compared to field
effect transistors. There are components that might not be considered at risk, such as resistors and capacitors
but they are also affected by ESD. Amplifiers, oscillators are used in applications where they are often
DOI: 02.PEIE.2014.5.8
© Association of Computer Electronics and Electrical Engineers, 2014
Proc. of Int. Conf. on Advances in Power Electronics and Instrumentation Engineering, PEIE

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exposed to electromagnetic interference, electrostatic discharge and overvoltage events [2]. Devices
manufactured using CMOS technology is more susceptible to ESD [3-5] and some of the newer high speed
components can be ruined with quite low voltages.
Damage to components can, and usually do, occur when the part is in the ESD path. Many components in the
circuits are designed to be very robust, can handle the discharge and undergo upsets. But if a part has a small
or thin geometry as part of their physical structure then the voltage can break down that part of the
semiconductor [6, 7]. Part of the component is left permanently damaged by the high ESD current, which
can cause two types of failure modes - Catastrophic and Latent failure. If the components with latent failure
end up in critical applications such as medical, military and space, then the consequences can be grim.
A simple RC phase shift oscillator has been selected as a typical analog feedback circuit that is self starting.
This represents all oscillators used for clocking and self starting circuits. A level sensitive circuit ZCD is
also included as its responses are easily corrupted. Indirect discharge on the horizontal coupling plane (HCP)
and direct air discharge [8] is performed on the RC phase shift oscillator and ZCD. Direct and Indirect
discharge is conducted to verify the ESD immunities of the components in the circuit [9-13]. First the
Indirect discharge is carried out at different voltages and distances. Then the direct air discharge is done at
the oscillator output and input of ZCD. Circuit level modeling of the analog circuit has also been done using
p-spice/ORCAD. The experimental results obtained are compared with the results from the circuit level
modelling and effect of ESD on analog circuit is summarized.
II. CIRCUIT DIAGRAM AND ITS OPERATION
The RC Phase Shift Oscillator produces a sine wave output using regenerative feedback from the resistor-
capacitor combination. This resistor-capacitor (RC) feedback network is connected as shown in the Figure 1
as a phase advance network to produce a sine wave oscillation at a frequency of 1150 Hz with an amplitude
of 6.5V. By varying one or more of the resistors or capacitors in the phase-shift network, the frequency can
be varied and generally this is done using a 3-ganged variable capacitor. The resistor-capacitor combination
in RC phase shift Oscillator circuit also acts as an attenuator producing an attenuation of 1/29 (Vo/Vi = β).
The gain of the amplifier is adjusted sufficiently large to overcome the losses in the phase shift network.
Figure 1 Circuit diagram of RC phase-shift oscillator followed by Zero crossing detector
Zero-crossing detector using an op-amp (IC μA741) comparator used to produce square wave output is
shown in Figure 1. The output of the analog circuit built is shown in Figure 2. The sine wave at the output of
the oscillator produces square wave at the output of the zero crossing detector at a frequency of 1150 Hz.
III. INDIRECT DISCHARGE ON HCP (RADIATIVE COUPLING)
The oscillator and ZCD circuit was placed on the designed IEC standard ESD test bench and an indirect
discharge was done onto the horizontal plane at different voltages and different distances. Results of some of
the tests are presented and discussed.
When a discharge of 4kV was given on the horizontal plane at a distance of 0.9m there was a change in the
ZCD output for 6.67μs indicating a spike of 7V at oscillator output below 0V for that period of time as
shown in Figure 3.

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When a discharge of 8kV was given on HCP at 0.9 m, two spikes 7 V and 2 V are observed in oscillator
output as shown in the Figure 4. At the first instance for a period of 2μs and second instance for a period of
1μs which is indicated by the shift of ZCD output.
A small phase shift and a spike of 13V are observed at the output of oscillator when discharged at 15kV on
HCP at 0.9m as shown in Figure 5. But a very small spike of about 1V is observed in ZCD output because
the output is low at the point of trigger.
Effects of ESD at a constant voltage of 8kV for different distances are discussed. The effect at 8kV on HCP
at 0.9 m has a spike of 7V at oscillator output.
When 8kV is discharged at 0.7m, a spike of 9V in oscillator output is observed as shown in Figure 6. The
oscillator output goes below reference level at the instance of trigger which is seen by the shift in the ZCD
output for 3μs.
When 8kV is discharged on HCP at 0.5m as shown in Figure 7, the oscillator output goes below reference
level at the instance of trigger which is seen by the shift in the ZCD output for 5μs. A spike of 11V in
oscillator output is observed.
Figure 2 Initial output of the circuit
Figure 3 Effect of discharge at 4kV at a distance of 0.9m

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IV. DIRECT AIR DISCHARGE
A. Discharge at the ZCD
The following results are observed when air discharge is conducted into the ZCD circuit at the input point.
With air discharge at 2kV, the sine wave of the oscillator output shows a kink which results in the changed
state of ZCD output. An increase in amplitude of next peak by 1V is observed at oscillator output as shown in
Figure 8.
Figure 4 Effect of discharge at 8kV at a distance of 0.9m
Figure 5 Effect of discharge at 15kV at a distance of 0.9m
When air discharged at 4kV at ZCD input, oscillator output being sine wave shows a kink resulting in change
in state of ZCD output. An increase in amplitude of next peak by 2V at oscillator output is also observed as
shown in Figure 9.
When air discharged at 8kV at ZCD, the oscillator output shows a kink and stays above 0V reference voltage
for 650 μs. Also an increase in amplitude of next peak by 3V at oscillator output is observed as shown in
Figure 10. The ZCD output also stays high for 650 μs till the sine wave recovers.
When air discharged at 15kV at ZCD, oscillator output shows a kink and stays above 0V reference voltage
for 1500 μs. Also an increase in amplitude of next peak by 5V at oscillator output is observed as shown in
Figure 11. The ZCD output also stays high for 1500 μs till the sine wave recovers.

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Figure 6 Effect of discharge of 8kV at a distance of 0.7m
Figure 7 Effect of discharge of 8kV at a distance of 0.5m
Figure 8 Effect of 2 kV air discharge at ZCD

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Figure 9 Effect of 4 kV air discharge at ZCD
Another instance when air discharged at 15kV at ZCD, there is a kink at oscillator output below the reference
voltage and increase in the next peak. But eventually only the oscillator output recovers as shown in Figure
12. The ZCD output goes to negative saturation around -10V and IC μA741 is spoilt.
B. Discharge at the Oscillator
When air discharge to the pickup point occurs, the source capacitor (200 pF) discharges to the oscillator
circuit at the output point. At this point the source sees the circuit as a RC network and the circuit capacitors
are charged to a value determined by the ratio of circuit to source capacitance followed by the discharge into
the circuit. This takes the application point to a high voltage and clamps the output resulting in the formation
of a kink at that instant. The simulation results also show the formation of kink at lower frequency and a
larger kink for larger frequency of oscillation and sometimes complete cessation of oscillation which restarts
after the circuit capacitors discharge to their steady state values.
When a 2kV air discharge is given to the pickup point at oscillator circuit the sine wave has a kink which is
indicated by the change in state in ZCD output and there is an increase in amplitude of next peak by 2V at
oscillator output. This is shown in Figure 13.
When an air discharge of 4kV is given at the oscillator, the sine wave has a kink which is indicated by the
change in state in ZCD output for 600μs and there is an increase in amplitude of next peak by 2V at oscillator
output for 600μs as shown in Figure 14.
When an air discharge of 8kV is given at the oscillator, the sine wave has a kink which is indicated by the
change in state in ZCD output. The oscillator output remains above the reference voltage for 750μs. Also the
ZCD output remains high for entire period of 750μs till the sine wave recovers as shown in Figure 15.
Figure 10 Effect of 8 kV air discharge at ZCD

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When an air discharge of 15kV is given at the oscillator, the sine wave has a kink which is indicated by the
change in state in ZCD output. The oscillator output remains above 0V for 1.35ms then it regains its original
functionality. Meanwhile the ZCD output remains at high for 1.35 ms till the oscillator output recovers as
shown in Figure 16.
The experimental results revealed the effect of ESD at different points in the circuit namely the output of
oscillator and the input of ZCD. Air discharge at pick up points on the circuit was carried out and it was
observed that most of the ESD current took the least resistance path to the ground and there was only a 28V
ringing transient spike at the discharge point which lasted for 2μs. But the oscillator output was affected by
this ESD transient as discussed and the ZCD output mimics the oscillator output.
Figure 11 Effect of 15 kV air discharge at ZCD
Figure 12 Effect of 15 kV air discharge at ZCD
V. CIRCUIT MODELING
Circuit modelling is designed to predict the behaviour of an electronic device. Circuit level modelling
connects all of the circuit elements into a network that can be simulated. Parasitic elements that are present
must be included in the simulation to make an accurate representation. Even the ESD event can be modelled
in this environment. The voltage response of the circuit is modelled and compared with the desired response.
Transient analysis is used for evaluating ESD response on the analog circuit.
The goals of ESD modelling are: first to be able to assess the impact ESD has on the performance of the
circuit and second to provide a prediction of the ESD threshold. The location of any weakness in the circuit
design from an ESD perspective should be included in the ESD threshold prediction. This pinpoints where
improvements are needed if the threshold does not meet the requirements. Evaluating ESD robustness of a
circuit requires a set of simulations to look into the output of the circuit when ESD transient is applied at
different points in the analog circuit.

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Figure 13 Effect of 2 kV air discharge at oscillator
Figure 14 Effect of 4 kV air discharge at oscillator
Figure 15 Effect of 8kV air discharge at oscillator

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Figure 16 Effect of 15kV air discharge at oscillator
The phase shift oscillator along with the zero crossing detector that was built and tested for ESD as shown in
Figure 1 is simulated using Five-spice. The software allows use of graphical user interface (GUI) and
produces net list from the circuit. The models used that of transistor and operational amplifier are from the
repository. The circuit oscillates at 1100Hz with amplitude of 7.0V with a fairly good sine wave output.
Five-spice is used to model the HBM ESD event. The ESD event is modelled by an RC circuit with
C=200pF and R=1.5kΩ (HBM) pre-charged to ESD voltage as initial condition. This RC is connected to the
point discharge through an ideal switch for a period of 200 ns simulating direct discharge. The oscillator
circuit takes about 25 ms to break into oscillations after connecting to power. Hence the ESD event (closure
of switch) is delayed by 36 ms so that the oscillations have stabilized by then and the effect of ESD is studied
till 44 ms. ESD discharge was applied at the output of oscillator at 40 ms. The results are analyzed and
presented as below.
First the discharge at 15kV with a 200ns time period and 1 ns rise time ESD waveform is considered. The
transient source is placed at the oscillator output just before the load resistor RL and after output coupling
capacitor C5. The simulation is run and the output shown is observed. At 15kV discharge voltage the
oscillator output shows a kink as shown in Figure 17. The next two peaks of sine wave stay above the 0V
reference and ZCD output stays high for 1.35 ms till the sine wave recovers in the next cycle.
At 8kV discharge voltage the oscillator output shows a kink as shown in Figure 18. The peak of sine wave
stays above the 0V reference and ZCD output stays high for 0.75 ms till the sine wave recovers in the
negative peak of the next cycle.
At 4kV discharge voltage the oscillator output shows a kink as shown in Figure 19. The peak of sine wave
stays above the 0V reference and ZCD output stays high for 0.65 ms till the sine wave recovers in the
negative peak of the next cycle.
When Five-spice simulation results are compared with the experimental results a very close match in the
nature and magnitude of response is observed. The experimental results for 15kV and 8kV air discharge at
oscillator output and the simulation results offer a very close match in the nature of behaviour and the time
taken for the change in state of the output as well as the recovery of the waveforms. The experimental results
of 4kV air discharge at oscillator output and the simulation do not offer a close match as the responses are
different and there is small difference in the nature of behaviour and magnitude. There will be a small
mismatch in the simulation and experimental results. This is to be expected as the values of the components
used are slightly different than possible parasitic values, and simulation output will be only a close match to
experimental output. A predominant observation is the delay in reaching steady state after the ESD event
which was about 2 to 3 ms. A good spice simulation is useful in predicting effect on circuits but may not be
very helpful in predicting device damage.
V. CONCLUSIONS
In the indirect discharge on HCP it is seen that effect of ESD on analog circuit depends on both the distance
and discharge voltage. Higher discharge voltage and shorter distances produces larger effect and bigger

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spikes. The phase shift oscillator designed with discreet components is affected by ESD but it recovers back
after some time.
Figure 17 Effect of 15kV discharge
Figure 18 Effect of 8kV discharge
Figure 19 Effect of 4kV discharge

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When air discharged at 15kV at ZCD input, the output of the oscillator shows a kink indicated by the change
in state of the ZCD output. Also an increase in peak of the oscillator output after ESD event is observed.
The ZCD output stays high for 1500 μs till oscillator sine wave recovers.
In another case when air discharged at 15kV at ZCD input there is transition of oscillator output below the
reference voltage. But eventually only the oscillator output recovered and ZCD output went to negative
saturation around -10V and IC μA741 is spoilt. After some time the oscillator circuit came back to its initial
working condition (due to slow discharge of charges accumulation). From experimental results it can be
definitely said that the zero crossing detector using operational amplifier is more susceptible to ESD when
compared to the RC phase shift oscillator made up of discrete R and C components.
An air discharge of 15kV at the oscillator output shows a large kink and an increase in the peak of the sine
wave. The oscillator output remains above the reference voltage for 1.35ms after which it regains its original
value. Meanwhile the ZCD output remains at high till the sine wave recovers.
In simulation, when 15kV was discharged at oscillator output just before the load resistor RL and after the
output coupling capacitor C5, the oscillator output shows a kink. The next two peaks of sine wave stay
above the 0V reference and ZCD output stays high for 1.35ms until sine wave recovers. This behaviour is
similar to the experimental direct air discharge at 15kV at oscillator output where the sine wave recovered
after 1.35 ms.
Also when 8kV was discharged at oscillator output, the oscillator output shows a kink. The first peak of sine
wave stays above the 0V reference and ZCD output stays high for 0.75 ms until sine wave recovers. This
behaviour is similar to the experimental direct air discharge at 8kV at oscillator output where the sine wave
recovered after 0.75 ms. There may be a small mismatch in simulation and experimental results which was
seen in the case of 4kV discharge. This is to be expected as the values of the components used are slightly
different than possible parasitic values which results in different response and values for the simulation and
experimental results
It is observed that the oscillator is disturbed for both indirect and direct air discharge with the magnitude
depending on the voltage and relative instant of discharge. The magnitude of disturbance is directly related
to the discharge voltage. The magnitude of disturbance is inversely related to the distance of discharge. The
disturbance reduces and the oscillator output recovers after some time. The simulation and experimental
results show similar results though not identical in all the cases. Simulation becomes useful in predictions of
the effect of ESD at various points in the analog circuit and this helps us in locating weak points of the circuit
where extra protection may be needed.
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