SDR for radar 090623

NATO RTO SET-136 (23-25.06.09.) - SM on "Software Defined Radar" 1www.sagax.hu
Software Defined Radio TechnologySoftware Defined Radio Technology
forfor Radar SystemsRadar Systems
Dr. Bertalan EGEDDr. Bertalan EGED
Managing DirectorManaging Director
Sagax Communications, Ltd.Sagax Communications, Ltd.
Haller u. 11Haller u. 11--13. Budapest 1096 Hungary13. Budapest 1096 Hungary
www.sagax.huwww.sagax.hu
Analog- and digital hw Signal processing- and operating sw Equipment System

OutlineOutline
•• RootsRoots
•• ModelingModeling
•• Implementation levelsImplementation levels
•• Analog frontAnalog front--end processingend processing
•• Domain conversionDomain conversion
•• Digital signal processingDigital signal processing
•• SCA operating environmentSCA operating environment
•• Related work in RTORelated work in RTO
•• Future trendsFuture trends
•• Conclusions and remarksConclusions and remarks

SINCGARS ESIP
HAVE QUICK II
Wideband Networking Waveform (WNW)
DAMA 181/182/183/184
Link 16 (TADIL J)
HF ISB w/ALE
HF SSB w/ALE
VHF ATC Data Link
VHF AM ATC
VHF AM/FM
STANAG 5066 (HF)
STANAG 4529 (HF)
Link 4A (TADIL C)
Link 11 (TADIL A)
Link 11B (TADIL B)
SATURN
BOWMAN
UHF AM/FM PSK
HF ATC Data Link
VHF AM ATC Extended
GPS/SASSM
BFT/RFT
NIPRNET
SIPRNET
NDL
Joint Network Management System (JNMS)
Soldier and M16A2
Soldier Radio Waveform (SRW)
Link 22 (NILE)
JTRS WNW Network Manager (JWNM)
TETRA
Roots of SDR conceptRoots of SDR concept
US DoD inventory of at least 25 to 30 different radio types:
750,000 radios in all, many nearing end of operational lifetime

Radio electronic devicesRadio electronic devices modelingmodeling
Traditional implementation
IF Down
Conversion
Baseband
Down
Conversion
Baseband
Demodulation
and
Processing
RF IF BB
Conversion
technology
RF
technology
DSP
technology
GUI
technology
Analog
Signal
Processing
Digital
Signal
Processing
Domain
Conversion
A/D or D/A
Software defined implementation

Different implementation levelsDifferent implementation levels
Digital
signal
handling
Digital
BB
processing
Digital
IF
processing
Digital
RF
processing

AnalogAnalog frontfront--endend signal processingsignal processing
•• Frequency transformation of airFrequency transformation of air--band to the digitallyband to the digitally
processableprocessable frequency, bandwidth and levelfrequency, bandwidth and level
•• Performance merits:Performance merits:
–– Noise/dynamic rangeNoise/dynamic range
–– Frequency bandwidthFrequency bandwidth
and agilityand agility
•• TypicalTypical technologies:technologies:
–– Frequency generationFrequency generation
–– MixingMixing
–– FilteringFiltering
–– Gain controlGain control
–– AmplificationAmplification

Typical analog frontTypical analog front--end architecturesend architectures
Digital
BB
generation
Digital
IF
generation
Digital
RF
generation

•• Conversion between the analog and digital representationConversion between the analog and digital representation
of the signalsof the signals
•• Performance merits:Performance merits:
–– Input and instantaneous bandwidthInput and instantaneous bandwidth
–– Noise level and dynamic rangeNoise level and dynamic range
•• Possible technologiesPossible technologies
–– FlashFlash
–– PipelinePipeline
–– FoldingFolding
–– SigmaSigma--deltadelta
–– InterleavedInterleaved
Domain conversionDomain conversion

Analog to Digital converterAnalog to Digital converter’’ss evolutionevolution
@2005@1990
100 MHz to 3 GHz @ 12 BITS
Close to Moore’s law: X2/2Y

Sampling clock jitter requirementsSampling clock jitter requirements
––––24
–––0.16 ps20
––0.12 ps1.21 ps18
–0.05 ps0.49 ps4.86 ps16
0.02 ps0.19 ps1.94 ps19.4 ps14
0.08 ps0.78 ps7.77 ps77.7 ps12
0.31 ps3.11 ps31.1 ps311 ps10
1.24 ps12.4 ps124 ps1.24 ns8
1 GHz100 MHz10 MHz1 MHz
Input frequencyADC
res.
in bit

Improved dynamic range by ditheringImproved dynamic range by dithering

Digital signal processingDigital signal processing
•• FSIC (Function Specific Integrated Circuit)FSIC (Function Specific Integrated Circuit)
–– Best in size and power consumptionBest in size and power consumption
–– Limited configurabilityLimited configurability
•• FPGA (FieldFPGA (Field--Programmable Gate Array)Programmable Gate Array)
–– Could implement any hw with arbitrary changed configurationsCould implement any hw with arbitrary changed configurations
–– Slower and more expensiveSlower and more expensive
•• DSP (DDSP (Dedicatededicated Signal Processor)Signal Processor)
–– Optimized architecture for typical processing tasksOptimized architecture for typical processing tasks
–– Limited data transfer capabilityLimited data transfer capability
•• GPP (General Porpuse Processor)GPP (General Porpuse Processor)
–– The performance limited by its architectureThe performance limited by its architecture
–– The speed of execution overdrives architectural limitsThe speed of execution overdrives architectural limits

How these chips should be usedHow these chips should be used
•• It is best to combine FSIC, FPGA, DSP and GPPIt is best to combine FSIC, FPGA, DSP and GPP
taking advantage of each characteristicstaking advantage of each characteristics
Common Object Request Broker Architecture

JTRS SCA operating environmentJTRS SCA operating environment

SDR related work in RTOSDR related work in RTO
•• ISTIST--80 RTG80 RTG
•• Possible way for followPossible way for follow--up:up:
–– SCA compliantSCA compliant (passive)(passive) radarradar (receiver)(receiver) waveform demonstratorwaveform demonstrator

•• OptoOpto--electric deviceselectric devices
–– Optical sources have betterOptical sources have better
jitter (jitter (=phase noise) performance=phase noise) performance
–– Better frequency mixers and samplersBetter frequency mixers and samplers
RX: 2RX: 2--18 GHz, 500MHz BW, 3dB NF, 147dBHz18 GHz, 500MHz BW, 3dB NF, 147dBHz2/32/3 DRDR
•• HighHigh--temperature superconductingtemperature superconducting
–– One of the limits of highOne of the limits of high--level integrationlevel integration
is the power dissipationis the power dissipation
–– Handling heating problems leads to moreHandling heating problems leads to more
compact and effective devicescompact and effective devices
ADC: 20 GHz sampling and 12 bit resolutionADC: 20 GHz sampling and 12 bit resolution
Future trendsFuture trends impact SDR technologyimpact SDR technology

ConclusionsConclusions and commentsand comments
•• Software defined radio technology determines theSoftware defined radio technology determines the
development trends in radio electronic evolutiondevelopment trends in radio electronic evolution
•• Radar systems also will follow this general trendRadar systems also will follow this general trend
•• Some potential technology could be seen to ensureSome potential technology could be seen to ensure
the base of developments in bandwidth and dynamicthe base of developments in bandwidth and dynamic
rangerange

References and readingsReferences and readings
• R.C.Hiks „A Servey of Analog to Digital Converters for Radar aplication”, Radar 92.
International Conference, 12-13 Oct 1992, pp. 534 - 537
• Kent H. Lundberg, „High-Speed Analog-to-Digital Converter Survey”,
http://web.mit.edu/klund/www/papers
• F. Boré, S. Bruel, M. Wingender „A 10-bit 2.2 Gsps ADC Operating Over First and Second
Nyquist Zones”, ATMEL Application journal, Number 6, Winter 2006, pp. 43-48.
www.atmel.com
• Analog Devices Application Note 501: Aperture Uncertainty and ADC System Performance ,
www.analog.com
• Linear Technoligy Design Note 1013: Understanding the Effect of Clock Jitter on High Speed
ADCs, www.linear.com
• R. H. Hosking, „Building SCA-compliant software-defined radios „„ DSPDSP DesignLineDesignLine ,,
September 27, 2006September 27, 2006,, www.dspdesignline.com
• MUKHANOV et al.: SUPERCONDUCTOR ANALOG-TO-DIGITAL CONVERTERS,
PROCEEDINGS OF THE IEEE, VOL. 92, NO. 10, OCTOBER 2004, www.hypres.com
• www.ece.drexel.edu/CMLE/index.html

SDR for radar 090623

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SDR for radar 090623