VECTOR ARCHITECTURE
Elagant interpretation of SIMD is called vector
architecture—by SEYMOUR CRAY in 1970
DATA PARALLELISM
CONCURRENCY ARISES FROM PERFORMING THE SAME
OPERATIONS ON DIFFERENT PIECES OF DATA
SINGLE INSTRUCTION MULTIPLE DATA (SIMD)
E.G., DOT PRODUCT OF TWO VECTORS
CONTRAST WITH DATA FLOW
CONCURRENCY ARISES FROM EXECUTING DIFFERENT OPERATIONS
IN PARALLEL (IN A DATA DRIVEN MANNER)
CONTRAST WITH THREAD (“CONTROL”) PARALLELISM
CONCURRENCY ARISES FROM EXECUTING DIFFERENT THREADS OF
CONTROL IN PARALLEL
SIMD EXPLOITS INSTRUCTION-LEVEL PARALLELISM
MULTIPLE INSTRUCTIONS CONCURRENT: INSTRUCTIONS HAPPEN TO BE THE
SAME
INTRODUCTION:
TYPES OF ARRAY PROCESSORS
THERE ARE BASICALLY TWO TYPES OF
ARRAY PROCESSORS:
 Attached Array Processors
 SIMD Array Processors
ATTACHED ARRAY PROCESSORS
SIMD ARRAY PROCESSORS
COMPONENTS OF VECTOR PROCESSORS
MODERN MULTIPLE PIPELINE VECTOR
COMPUTER:
VMIPS INSTRUCTIONS
EXAMPLE SIMD CODE
SIMILARITIES AND DIFFERENCES BETWEEN
VECTOR ARCHITECTURES AND GPUS
• BOTH ARCHITECTURES ARE DESIGNED TO EXECUTE
DATA-LEVEL PARALLEL PROGRAMS.
• THE VMIPS REGISTER FILE HOLDS ENTIRE
VECTORS—
THAT IS, A CONTIGUOUS BLOCK OF 64 DOUBLES. IN
CONTRAST, A SINGLE VECTOR IN A GPU WOULD BE
DISTRIBUTED ACROSS THE REGISTERS OF ALL SIMD
LANES.
• THE CALCULATIONS ARE IMPLICIT IN VECTOR
ARCHITECTURE BUT THEY ARE EXPLICIT IN GPUS.
23
VECTOR ARCHITECTURE
• VECTOR ARCHITECTURES ARE EASIER TO
UNDERSTAND
AND TO COMPILE TO THAN OTHER SIMD VARIATIONS,
• BUT THEY WERE CONSIDERED TOO EXPENSIVE FOR
MICROPROCESSORS UNTIL RECENTLY.
6
THANK YOU

Vector architecture

  • 1.
    VECTOR ARCHITECTURE Elagant interpretationof SIMD is called vector architecture—by SEYMOUR CRAY in 1970
  • 2.
    DATA PARALLELISM CONCURRENCY ARISESFROM PERFORMING THE SAME OPERATIONS ON DIFFERENT PIECES OF DATA SINGLE INSTRUCTION MULTIPLE DATA (SIMD) E.G., DOT PRODUCT OF TWO VECTORS CONTRAST WITH DATA FLOW CONCURRENCY ARISES FROM EXECUTING DIFFERENT OPERATIONS IN PARALLEL (IN A DATA DRIVEN MANNER) CONTRAST WITH THREAD (“CONTROL”) PARALLELISM CONCURRENCY ARISES FROM EXECUTING DIFFERENT THREADS OF CONTROL IN PARALLEL SIMD EXPLOITS INSTRUCTION-LEVEL PARALLELISM MULTIPLE INSTRUCTIONS CONCURRENT: INSTRUCTIONS HAPPEN TO BE THE SAME
  • 3.
  • 4.
    TYPES OF ARRAYPROCESSORS THERE ARE BASICALLY TWO TYPES OF ARRAY PROCESSORS:  Attached Array Processors  SIMD Array Processors
  • 5.
  • 6.
  • 7.
  • 8.
    MODERN MULTIPLE PIPELINEVECTOR COMPUTER:
  • 9.
  • 10.
  • 11.
    SIMILARITIES AND DIFFERENCESBETWEEN VECTOR ARCHITECTURES AND GPUS • BOTH ARCHITECTURES ARE DESIGNED TO EXECUTE DATA-LEVEL PARALLEL PROGRAMS. • THE VMIPS REGISTER FILE HOLDS ENTIRE VECTORS— THAT IS, A CONTIGUOUS BLOCK OF 64 DOUBLES. IN CONTRAST, A SINGLE VECTOR IN A GPU WOULD BE DISTRIBUTED ACROSS THE REGISTERS OF ALL SIMD LANES. • THE CALCULATIONS ARE IMPLICIT IN VECTOR ARCHITECTURE BUT THEY ARE EXPLICIT IN GPUS. 23
  • 12.
    VECTOR ARCHITECTURE • VECTORARCHITECTURES ARE EASIER TO UNDERSTAND AND TO COMPILE TO THAN OTHER SIMD VARIATIONS, • BUT THEY WERE CONSIDERED TOO EXPENSIVE FOR MICROPROCESSORS UNTIL RECENTLY. 6
  • 13.