This document summarizes the results of device modeling tests on a CMOS digital integrated circuit (TC7SET08F) manufactured by Toshiba. It includes truth tables, circuit simulations, evaluation circuits, and comparison tables showing that measurements and simulations match within 1% error for input/output voltage levels and propagation delay times.
SPICE MODEL of TC7SET02FU in SPICE PARK. English Version is http://www.spicepark.net. Japanese Version is http://www.spicepark.com by Bee Technologies.
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SPICE MODEL of TC7SET08F in SPICE PARK
1. Device Modeling Report
COMPONENTS : CMOS DIGITAL INTEGRATED CIRCUIT
PART NUMBER : TC7SET08F
MANUFACTURER : TOSHIBA
Bee Technologies Inc.
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005
2. Truth Table
Circuit simulation result
U1:A 0
U1:B 0
Y1 0
0s 0.5us 1.0us
Time
Evaluation circuit
U1
LO
INB VCC
LO
INA
GND OUTY
Y1
R1 V1
TC7SET08
1MEG 5
0
Comparison table
Input Output
%Error
An Bn Yn (Measurement) Yn (Simulation)
L L L L 0
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005
3. Truth Table
Circuit simulation result
U1:A 0
U1:B 1
Y1 0
0s 0.5us 1.0us
Time
Evaluation circuit
U1
HI INB VCC
LO
INA
GND OUTY
Y1
R1 V1
TC7SET08
1MEG 5
0
Comparison table
Input Output
%Error
An Bn Yn (Measurement) Yn (Simulation)
L H L L 0
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005
4. Truth Table
Circuit simulation result
U1:A 1
U1:B 0
Y1 0
0s 0.5us 1.0us
Time
Evaluation circuit
U1
LO
INB VCC
HI INA
GND OUTY
Y1
R1 V1
TC7SET08
1MEG 5
0
Comparison table
Input Output
%Error
An Bn Yn (Measurement) Yn (Simulation)
H L L L 0
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005
5. Truth Table
Circuit simulation result
U1:A 1
U1:B 1
Y1 1
0s 0.5us 1.0us
Time
Evaluation circuit
U1
HI INB VCC
HI INA
GND OUTY
Y1
R1 V1
TC7SET08
1MEG 5
0
Comparison table
Input Output
%Error
An Bn Yn (Measurement) Yn (Simulation)
H H H H 0
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005
6. High Level and Low Level Input Voltage
Circuit simulation result
5.0V
Output
2.5V Input
0V
0s 1.0ms 2.0ms 3.0ms 4.0ms
V(R1:1) V(V1:+)
Time
Evaluation circuit
U1
INB VCC
HI INA
GND OUTY
V2
V1
TC7SET08
V1 = 0 5
V2 = 5 R1
TD = 0.5m 1MEG
TR = 0.1m
TF = 0.1m
PW = 1m
PER = 2m
0
Comparison table
VCC = 5V Measurement Simulation %Error
VIH (V) 2 2 0
VIL (V) 0.8 0.799245 -0.094
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005
7. High Level and Low Level Output Voltage
Circuit simulation result
5.0V
2.5V
SEL>> Output
0V
V(R1:1) Input
5.0V
2.5V
0V
0s 5ms 10ms
V(V1:+)
Time
Evaluation circuit
U1
INB VCC
HI INA
GND OUTY
V1 V2
V1 = 0
TC7SET08
V2 = 4.5 4.5
TD = 0.5m R1
TR = 3n 1MEG
TF = 3n
PW = 1m
PER = 2m
0
Comparison table
VCC = 4.5V Measurement Simulation %Error
VOH (V) 4.5 4.4988 -0.027
VOL (V) 0 0 0
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005
8. Propagation Delay Time
Circuit simulation result
5.0V
Output
2.5V Input
0V
0s 50ns 100ns
V(C1:1) V(V1:+)
Time
Evaluation circuit
U1
INB VCC
HI INA
GND OUTY
V2
V1 = 0 V1
V2 = 5
TC7SET08
TD = 10n 5
TR = 3n
TF = 3n C1
PW = 50n
PER = 100n 15p
0
Comparison table
CL=15pF,VCC=5 V,Tr=Tf=3ns Measurement Simulation %Error
tpLH (ns) 4.2 4.2747 1.779
tpHL (ns) 4.2 4.2438 1.043
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005