The document provides details of the syllabus for various computer science subjects for 7th and 8th semester B.Tech students in Computer Engineering at Rajasthan Technical University.
It outlines 5 units of content for each subject, including topics like software project management, wireless communication networks, compiler construction, computer aided design for VLSI, computer graphics and multimedia techniques, advanced database management systems.
For each subject, it lists the evaluation details along with 3 textbooks and references that can be used to study the subject.
Performance analysis of machine learning approaches in software complexity pr...Sayed Mohsin Reza
This video contains the presentation at TCCE 2020 by Sayed Mohsin Reza on his paper titled "Performance Analysis of Machine Learning Approaches in Software Complexity Prediction"
Keywords: Software Complexity, Software Quality, Machine Learning, Software Design, Software Reliability, etc
Authors :
1. Sayed Mohsin Reza, Ph.D. Student, University of Texas
2. Mahfujur Rahman, Lecturer, Daffodil International University
3. Hasnat Parvez, Student, Jahangirnagar University
4. Omar Badreddin, Professor, University of Texas
5. Shamim Al Mamun, Professor, Jahangirnagar University
Abstract: Software design is one of the core concepts in software engineering. This covers insights and intuitions of software evolution, reliability, and maintainability. Effective software design facilitates software reliability and better quality management during development which reduces software development cost. Therefore, it is required to detect and maintain these issues earlier. Class complexity is one of the ways of detecting software quality. The objective of this paper is to predict class complexity from source code metrics using Machine Learning (ML) approaches and compare the performance of the approaches. In order to do that, we collect ten popular and quality maintained open source repositories and extract 18 source code metrics that relate to complexity for class-level analysis. First, we apply statistical correlation to find out the source code metrics that impact most on class complexity. Second, we apply five alternative ML techniques to build complexity predictors and compare the performances. The results report that the following source code metrics: Depth Inheritance Tree (DIT), Response For Class (RFC), Weighted Method Count (WMC), Lines of Code (LOC), and Coupling Between Objects (CBO) have the most impact on class complexity. Also, we evaluate the performance of the techniques and results show that Random Forest (RF) significantly improves accuracy without providing additional false negative or false positive that work as false alarms in complexity prediction.
A Novel, Robust, Hierarchical, Text-Independent Speaker Recognition TechniqueCSCJournals
Automatic speaker recognition system is used to recognize an unknown speaker among several reference speakers by making use of speaker-specific information from their speech. In this paper, we introduce a novel, hierarchical, text-independent speaker recognition. Our baseline speaker recognition system accuracy, built using statistical modeling techniques, gives an accuracy of 81% on the standard MIT database and our baseline gender recognition system gives an accuracy of 93.795%. We then propose and implement a novel state-space pruning technique by performing gender recognition before speaker recognition so as to improve the accuracy/timeliness of our baseline speaker recognition system. Based on the experiments conducted on the MIT database, we demonstrate that our proposed system improves the accuracy over the baseline system by approximately 2%, while reducing the computational time by more than 30%.
Functional Verification of Large-integers Circuits using a Cosimulation-base...IJECEIAES
Cryptography and computational algebra designs are complex systems based on modular arithmetic and build on multi-level modules where bit-width is generally larger than 64-bit. Because of their particularity, such designs pose a real challenge for verification, in part because large-integer‘s functions are not supported in actual hardware description languages (HDLs), therefore limiting the HDL testbench utility. In another hand, high-level verification approach proved its efficiency in the last decade over HDL testbench technique by raising the latter at a higher abstraction level. In this work, we propose a high-level platform to verify such designs, by leveraging the capabilities of a popular tool (Matlab/Simulink) to meet the requirements of a cycle accurate verification without bit-size restrictions and in multi-level inside the design architecture. The proposed high-level platform is augmented by an assertion-based verification to complete the verification coverage. The platform experimental results of the testcase provided good evidence of its performance and re-usability.
Performance analysis of machine learning approaches in software complexity pr...Sayed Mohsin Reza
This video contains the presentation at TCCE 2020 by Sayed Mohsin Reza on his paper titled "Performance Analysis of Machine Learning Approaches in Software Complexity Prediction"
Keywords: Software Complexity, Software Quality, Machine Learning, Software Design, Software Reliability, etc
Authors :
1. Sayed Mohsin Reza, Ph.D. Student, University of Texas
2. Mahfujur Rahman, Lecturer, Daffodil International University
3. Hasnat Parvez, Student, Jahangirnagar University
4. Omar Badreddin, Professor, University of Texas
5. Shamim Al Mamun, Professor, Jahangirnagar University
Abstract: Software design is one of the core concepts in software engineering. This covers insights and intuitions of software evolution, reliability, and maintainability. Effective software design facilitates software reliability and better quality management during development which reduces software development cost. Therefore, it is required to detect and maintain these issues earlier. Class complexity is one of the ways of detecting software quality. The objective of this paper is to predict class complexity from source code metrics using Machine Learning (ML) approaches and compare the performance of the approaches. In order to do that, we collect ten popular and quality maintained open source repositories and extract 18 source code metrics that relate to complexity for class-level analysis. First, we apply statistical correlation to find out the source code metrics that impact most on class complexity. Second, we apply five alternative ML techniques to build complexity predictors and compare the performances. The results report that the following source code metrics: Depth Inheritance Tree (DIT), Response For Class (RFC), Weighted Method Count (WMC), Lines of Code (LOC), and Coupling Between Objects (CBO) have the most impact on class complexity. Also, we evaluate the performance of the techniques and results show that Random Forest (RF) significantly improves accuracy without providing additional false negative or false positive that work as false alarms in complexity prediction.
A Novel, Robust, Hierarchical, Text-Independent Speaker Recognition TechniqueCSCJournals
Automatic speaker recognition system is used to recognize an unknown speaker among several reference speakers by making use of speaker-specific information from their speech. In this paper, we introduce a novel, hierarchical, text-independent speaker recognition. Our baseline speaker recognition system accuracy, built using statistical modeling techniques, gives an accuracy of 81% on the standard MIT database and our baseline gender recognition system gives an accuracy of 93.795%. We then propose and implement a novel state-space pruning technique by performing gender recognition before speaker recognition so as to improve the accuracy/timeliness of our baseline speaker recognition system. Based on the experiments conducted on the MIT database, we demonstrate that our proposed system improves the accuracy over the baseline system by approximately 2%, while reducing the computational time by more than 30%.
Functional Verification of Large-integers Circuits using a Cosimulation-base...IJECEIAES
Cryptography and computational algebra designs are complex systems based on modular arithmetic and build on multi-level modules where bit-width is generally larger than 64-bit. Because of their particularity, such designs pose a real challenge for verification, in part because large-integer‘s functions are not supported in actual hardware description languages (HDLs), therefore limiting the HDL testbench utility. In another hand, high-level verification approach proved its efficiency in the last decade over HDL testbench technique by raising the latter at a higher abstraction level. In this work, we propose a high-level platform to verify such designs, by leveraging the capabilities of a popular tool (Matlab/Simulink) to meet the requirements of a cycle accurate verification without bit-size restrictions and in multi-level inside the design architecture. The proposed high-level platform is augmented by an assertion-based verification to complete the verification coverage. The platform experimental results of the testcase provided good evidence of its performance and re-usability.
IMPLEMENTATION OF DYNAMIC COUPLING MEASUREMENT OF DISTRIBUTED OBJECT ORIENTED...IJCSEA Journal
Software metrics are increasingly playing a central role in the planning and control of software development projects. Coupling measures have important applications in software development and maintenance. Existing literature on software metrics is mainly focused on centralized systems, while work in the area of distributed systems, particularly in service-oriented systems, is scarce. Distributed systems with service oriented components are even more heterogeneous networking and execution environment. Traditional coupling measures take into account only “static” couplings. They do not account for “dynamic” couplings due to polymorphism and may significantly underestimate the complexity of software and misjudge the need for code inspection, testing and debugging. This is expected to result in poor predictive accuracy of the quality models in distributed Object Oriented systems that utilize static coupling measurements. In order to overcome these issues, we propose a hybrid model in Distributed Object Oriented Software for measure the coupling dynamically. In the proposed method, there are three steps such as Instrumentation process, Post processing and Coupling measurement. Initially the instrumentation process is done. In this process the instrumented JVM that has been modified to trace method calls. During this process, three trace files are created namely .prf, .clp, .svp. In the second step, the information in these file are merged. At the end of this step, the merged detailed trace of each JVM contains pointers to the merged trace files of the other JVM such that the path of every remote call from the client to the server can be uniquely identified. Finally, the coupling metrics are measured dynamically. The implementation results show that the proposed system will effectively measure the coupling metrics dynamically.
IMPLEMENTATION OF DYNAMIC COUPLING MEASUREMENT OF DISTRIBUTED OBJECT ORIENTED...IJCSEA Journal
Software metrics are increasingly playing a central role in the planning and control of software development projects. Coupling measures have important applications in software development and maintenance. Existing literature on software metrics is mainly focused on centralized systems, while work in the area of distributed systems, particularly in service-oriented systems, is scarce. Distributed systems with service oriented components are even more heterogeneous networking and execution environment. Traditional coupling measures take into account only “static” couplings. They do not account for “dynamic” couplings due to polymorphism and may significantly underestimate the complexity of software and misjudge the need for code inspection, testing and debugging. This is expected to result in poor predictive accuracy of the quality models in distributed Object Oriented systems that utilize static coupling measurements. In order to overcome these issues, we propose a hybrid model in Distributed Object Oriented Software for measure the coupling dynamically. In the proposed method, there are three steps
such as Instrumentation process, Post processing and Coupling measurement. Initially the instrumentation process is done. In this process the instrumented JVM that has been modified to trace method calls. During this process, three trace files are created namely .prf, .clp, .svp. In the second step, the information in these file are merged. At the end of this step, the merged detailed trace of each JVM contains pointers to the merged trace files of the other JVM such that the path of every remote call from the client to the server can be uniquely identified. Finally, the coupling metrics are measured dynamically. The implementation results show that the proposed system will effectively measure the coupling metrics dynamically.
HW/SW Partitioning Approach on Reconfigurable Multimedia System on ChipCSCJournals
Due to the complexity and the high performance requirement of multimedia applications, the design of embedded systems is the subject of different types of design constraints such as execution time, time to market, energy consumption, etc. Some approaches of joint software/hardware design (Co-design) were proposed in order to help the designer to seek an adequacy between applications and architecture that satisfies the different design constraints. This paper presents a new methodology for hardware/software partitioning on reconfigurable multimedia system on chip, based on dynamic and static steps. The first one uses the dynamic profiling and the second one uses the design trotter tools. The validation of our approach is made through 3D image synthesis.
Analysis and assessment software for multi-user collaborative cognitive radi...IJECEIAES
Computer simulations are without a doubt a useful methodology that allows to explore research queries and develop prototypes at lower costs and timeframes than those required in hardware processes. The simulation tools used in cognitive radio networks (CRN) are undergoing an active process. Currently, there is no stable simulator that enables to characterize every element of the cognitive cycle and the available tools are a framework for discrete-event software. This work presents the spectral mobility simulator in CRN called “App MultiColl-DCRN”, developed with MATLAB’s app designer. In contrast with other frameworks, the simulator uses real spectral occupancy data and simultaneously analyzes features regarding spectral mobility, decision-making, multi-user access, collaborative scenarios and decentralized architectures. Performance metrics include bandwidth, throughput level, number of failed handoffs, number of total handoffs, number of handoffs with interference, number of anticipated handoffs and number of perfect handoffs. The assessment of the simulator involves three scenarios: the first and second scenarios present a collaborative structure using the multi-criteria optimization and compromise solution (VIKOR) decision-making model and the naïve Bayes prediction technique respectively. The third scenario presents a multi-user structure and uses simple additive weighting (SAW) as a decision-making technique. The present development represents a contribution in the cognitive radio network field since there is currently no software with the same features.
ENHANCING AND MEASURING THE PERFORMANCE IN SOFTWARE DEFINED NETWORKINGIJCNCJournal
Software Defined Networking (SDN) is a challenging chapter in today’s networking era. It is a network design approach that engages the framework to be controlled or 'altered' adroitly and halfway using programming applications. SDN is a serious advancement that assures to provide a better strategy than displaying the Quality of Service (QoS) approach in the present correspondence frameworks. SDN etymologically changes the lead and convenience of system instruments using the single high state program. It separates the system control and sending functions, empowering the network control to end up specifically. It provides more functionality and more flexibility than the traditional networks. A network administrator can easily shape the traffic without touching any individual switches and services which are needed in a network. The main technology for implementing SDN is a separation of data plane and control plane, network virtualization through programmability. The total amount of time in which user can respond is called response time. Throughput is known as how fast a network can send data. In this paper, we have design a network through which we have measured the Response Time and Throughput comparing with the Real-time Online Interactive Applications (ROIA), Multiple Packet Scheduler, and NOX.
Removing Uninteresting Bytes in Software FuzzingAftab Hussain
Imagine a world where software fuzzing, the process of mutating bytes in test seeds to uncover hidden and erroneous program behaviors, becomes faster and more effective. A lot depends on the initial seeds, which can significantly dictate the trajectory of a fuzzing campaign, particularly in terms of how long it takes to uncover interesting behaviour in your code. We introduce DIAR, a technique designed to speedup fuzzing campaigns by pinpointing and eliminating those uninteresting bytes in the seeds. Picture this: instead of wasting valuable resources on meaningless mutations in large, bloated seeds, DIAR removes the unnecessary bytes, streamlining the entire process.
In this work, we equipped AFL, a popular fuzzer, with DIAR and examined two critical Linux libraries -- Libxml's xmllint, a tool for parsing xml documents, and Binutil's readelf, an essential debugging and security analysis command-line tool used to display detailed information about ELF (Executable and Linkable Format). Our preliminary results show that AFL+DIAR does not only discover new paths more quickly but also achieves higher coverage overall. This work thus showcases how starting with lean and optimized seeds can lead to faster, more comprehensive fuzzing campaigns -- and DIAR helps you find such seeds.
- These are slides of the talk given at IEEE International Conference on Software Testing Verification and Validation Workshop, ICSTW 2022.
GridMate - End to end testing is a critical piece to ensure quality and avoid...ThomasParaiso2
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IMPLEMENTATION OF DYNAMIC COUPLING MEASUREMENT OF DISTRIBUTED OBJECT ORIENTED...IJCSEA Journal
Software metrics are increasingly playing a central role in the planning and control of software development projects. Coupling measures have important applications in software development and maintenance. Existing literature on software metrics is mainly focused on centralized systems, while work in the area of distributed systems, particularly in service-oriented systems, is scarce. Distributed systems with service oriented components are even more heterogeneous networking and execution environment. Traditional coupling measures take into account only “static” couplings. They do not account for “dynamic” couplings due to polymorphism and may significantly underestimate the complexity of software and misjudge the need for code inspection, testing and debugging. This is expected to result in poor predictive accuracy of the quality models in distributed Object Oriented systems that utilize static coupling measurements. In order to overcome these issues, we propose a hybrid model in Distributed Object Oriented Software for measure the coupling dynamically. In the proposed method, there are three steps such as Instrumentation process, Post processing and Coupling measurement. Initially the instrumentation process is done. In this process the instrumented JVM that has been modified to trace method calls. During this process, three trace files are created namely .prf, .clp, .svp. In the second step, the information in these file are merged. At the end of this step, the merged detailed trace of each JVM contains pointers to the merged trace files of the other JVM such that the path of every remote call from the client to the server can be uniquely identified. Finally, the coupling metrics are measured dynamically. The implementation results show that the proposed system will effectively measure the coupling metrics dynamically.
IMPLEMENTATION OF DYNAMIC COUPLING MEASUREMENT OF DISTRIBUTED OBJECT ORIENTED...IJCSEA Journal
Software metrics are increasingly playing a central role in the planning and control of software development projects. Coupling measures have important applications in software development and maintenance. Existing literature on software metrics is mainly focused on centralized systems, while work in the area of distributed systems, particularly in service-oriented systems, is scarce. Distributed systems with service oriented components are even more heterogeneous networking and execution environment. Traditional coupling measures take into account only “static” couplings. They do not account for “dynamic” couplings due to polymorphism and may significantly underestimate the complexity of software and misjudge the need for code inspection, testing and debugging. This is expected to result in poor predictive accuracy of the quality models in distributed Object Oriented systems that utilize static coupling measurements. In order to overcome these issues, we propose a hybrid model in Distributed Object Oriented Software for measure the coupling dynamically. In the proposed method, there are three steps
such as Instrumentation process, Post processing and Coupling measurement. Initially the instrumentation process is done. In this process the instrumented JVM that has been modified to trace method calls. During this process, three trace files are created namely .prf, .clp, .svp. In the second step, the information in these file are merged. At the end of this step, the merged detailed trace of each JVM contains pointers to the merged trace files of the other JVM such that the path of every remote call from the client to the server can be uniquely identified. Finally, the coupling metrics are measured dynamically. The implementation results show that the proposed system will effectively measure the coupling metrics dynamically.
HW/SW Partitioning Approach on Reconfigurable Multimedia System on ChipCSCJournals
Due to the complexity and the high performance requirement of multimedia applications, the design of embedded systems is the subject of different types of design constraints such as execution time, time to market, energy consumption, etc. Some approaches of joint software/hardware design (Co-design) were proposed in order to help the designer to seek an adequacy between applications and architecture that satisfies the different design constraints. This paper presents a new methodology for hardware/software partitioning on reconfigurable multimedia system on chip, based on dynamic and static steps. The first one uses the dynamic profiling and the second one uses the design trotter tools. The validation of our approach is made through 3D image synthesis.
Analysis and assessment software for multi-user collaborative cognitive radi...IJECEIAES
Computer simulations are without a doubt a useful methodology that allows to explore research queries and develop prototypes at lower costs and timeframes than those required in hardware processes. The simulation tools used in cognitive radio networks (CRN) are undergoing an active process. Currently, there is no stable simulator that enables to characterize every element of the cognitive cycle and the available tools are a framework for discrete-event software. This work presents the spectral mobility simulator in CRN called “App MultiColl-DCRN”, developed with MATLAB’s app designer. In contrast with other frameworks, the simulator uses real spectral occupancy data and simultaneously analyzes features regarding spectral mobility, decision-making, multi-user access, collaborative scenarios and decentralized architectures. Performance metrics include bandwidth, throughput level, number of failed handoffs, number of total handoffs, number of handoffs with interference, number of anticipated handoffs and number of perfect handoffs. The assessment of the simulator involves three scenarios: the first and second scenarios present a collaborative structure using the multi-criteria optimization and compromise solution (VIKOR) decision-making model and the naïve Bayes prediction technique respectively. The third scenario presents a multi-user structure and uses simple additive weighting (SAW) as a decision-making technique. The present development represents a contribution in the cognitive radio network field since there is currently no software with the same features.
ENHANCING AND MEASURING THE PERFORMANCE IN SOFTWARE DEFINED NETWORKINGIJCNCJournal
Software Defined Networking (SDN) is a challenging chapter in today’s networking era. It is a network design approach that engages the framework to be controlled or 'altered' adroitly and halfway using programming applications. SDN is a serious advancement that assures to provide a better strategy than displaying the Quality of Service (QoS) approach in the present correspondence frameworks. SDN etymologically changes the lead and convenience of system instruments using the single high state program. It separates the system control and sending functions, empowering the network control to end up specifically. It provides more functionality and more flexibility than the traditional networks. A network administrator can easily shape the traffic without touching any individual switches and services which are needed in a network. The main technology for implementing SDN is a separation of data plane and control plane, network virtualization through programmability. The total amount of time in which user can respond is called response time. Throughput is known as how fast a network can send data. In this paper, we have design a network through which we have measured the Response Time and Throughput comparing with the Real-time Online Interactive Applications (ROIA), Multiple Packet Scheduler, and NOX.
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Imagine a world where software fuzzing, the process of mutating bytes in test seeds to uncover hidden and erroneous program behaviors, becomes faster and more effective. A lot depends on the initial seeds, which can significantly dictate the trajectory of a fuzzing campaign, particularly in terms of how long it takes to uncover interesting behaviour in your code. We introduce DIAR, a technique designed to speedup fuzzing campaigns by pinpointing and eliminating those uninteresting bytes in the seeds. Picture this: instead of wasting valuable resources on meaningless mutations in large, bloated seeds, DIAR removes the unnecessary bytes, streamlining the entire process.
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- These are slides of the talk given at IEEE International Conference on Software Testing Verification and Validation Workshop, ICSTW 2022.
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The modern software delivery process (or the CI/CD process) includes many tools, distributed teams, open-source code, and cloud platforms. Constant focus on speed to release software to market, along with the traditional slow and manual security checks has caused gaps in continuous security as an important piece in the software supply chain. Today organizations feel more susceptible to external and internal cyber threats due to the vast attack surface in their applications supply chain and the lack of end-to-end governance and risk management.
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1. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
7CS1 SOFTWARE PROJECT MANAGEMENT (Common to Comp. Engg. & Info. Tech)
Class: VII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Project Management: The management spectrum, the people, the product, the process,
the project, the W5HH principle, critical practices
I Metrics for Process and Project: Metrics in the process and project Domains, software
measurements, metrics for software quality, integrating metrics within software process,
metrics for small organizations, establishing a software metrics program.
Estimation: Observations, Project planning Process, software scope and feasibility,
II resources, software project estimation, decomposition techniques, empirical estimation
models, estimation for object oriented projects, estimation for Agile development and
web engineering projects, the make/buy decision.
Project Scheduling: Basic concepts, project scheduling, defining a task set and task
network, scheduling, earned value analysis.
Risk Management: Reactive V/S proactive Risk Strategies, software risks, Risk
identification, Risk projection, risk refinement, risk mitigation, monitoring and
III management, the RMMM plan
Quality Planning: Quality Concepts, Procedural Approach to Quality Management,
Quantitative Approaches to Quality Management, Quantitative Quality Management
Planning, Setting the Quality Goal, Estimating Defects for Other Stages, Quality Process
Planning, Defect Prevention Planning.
Quality Management: Quality Concepts, Software Quality assurances, software reviews,
IV formal technical reviews, Formal approaches to SQA, Statistical Software Quality
assurances, Change Management: software Configuration Management, The SCM
repository, SCM Process, Configuration Management for Web Engineering
Project Execution And Closure:
Reviews. The Review Process, Planning, Overview and Preparation, Group Review
Meeting, Rework and Follow-up, One-Person Review, Guidelines for Reviews in
Projects, Data Collection, Analysis and Control Guidelines, Introduction of Reviews and
V the NAH Syndrome.
Project Monitoring and Control: Project Tracking, Activities Tracking, Defect
Tracking, Issues Tracking, Status Reports, Milestone Analysis, Actual Versus Estimated
Analysis of Effort and Schedule, Monitoring Quality, Risk-Related Monitoring.
Project Closure: Project Closure Analysis, The Role of Closure Analysis, Performing
Closure Analysis.
Text/References:
1. R. S. Pressman, Software Engineering, TMH, 7th ed.
2. Pankaj Jalote, Software project management in practice, Addison-Wesley
3. B. Hughes & M. Cotterell, Software Project Management, TMH
2. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
7CS2 WIRELESS COMMUNICATION & NETWORKS (Common to Comp. Engg. & Info.
Tech.)
Class: VIII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Introduction to Wireless Communication Systems: Evolution of mobile Radio Communications,
Communication
Applications of mobile communication, Mobile Radio Systems Around the World, Example of
Wireless Communication Systems, Second Generation(2G) Cellular Networks, Third
Generation(3G) Wireless Networks, Frequency Reuse, Channel Assignment Strategies, Handoff
I Strategies, Interference and System Capacity, Improving Coverage and Capacity in Cellular
Systems [3].Frequencies for radio transmission & regulations [1].
Introduction to signals, analog & digital data transmission, transmission impairments, effect of
multipath propagation, type of fading & error compensation [2].
Medium access control: need for specialized MAC, hidden and exposed terminal, near and far
terminals, MAC schemes: Fixed TDMA, Aloha, CSMA, DAMA, PRMA, reservation TDMA,
II MACA, polling, ISMA, CDMA- SAMA, comparisons [1].
Telecommunication systems: GSM: mobile services, system architecture, radio interface, protocols,
localization and calling, handover, security, new data services-HSCSD, introduction to GPRS [1,3].
Wireless LAN: advantages, disadvantages and design goals, infra red v/s radio transmission,
infrastructure and ad-hoc network, IEEE 802.11: System architecture, protocol architecture,
physical layer, medium access control layer, MAC management and functions, brief idea of -
III 802.11b, 802.11a, newer developments [1].
HIPERLAN: HIPERLAN 1, Bluetooth: user scenarios, architecture, radio layer, base band layer,
link manager protocol, L2CAP, security, SDP, profiles, IEEE 802.15 [1].
Mobile network layer: mobile IP - Goals, assumptions and requirements, entities and terminology,
IP packets delivery, agent discovery, registration, tunneling and encapsulation, optimizations,
reverse tunneling, DHCP. Mobile Ad hoc network – usage & routing- global state routing (GSR),
Destination sequenced distance vector routing (DSDV), Dynamic source routing (DSR), Ad Hoc on
IV demand distance vector routing (AODV), Temporary ordered routing algorithm (TORA) [1].
Mobile transport layer: Implications of mobility in Traditional TCP, classical TCP improvements:
indirect TCP, snooping TCP, mobile TCP, fast retransmit/fast recovery, transmission/time-out
freezing, selective retransmission, transaction-oriented TCP [1].
Support for mobility: File systems - Introduction to coda, little work, Ficus, MIo-NFS, rover. World
wide web - hypertext transfer protocol, hypertext language, system architecture. Wireless
Application Protocol - architecture, wireless datagram protocol, wireless transport layer security,
V
wireless transaction protocol, wireless session protocol, wireless application environment, wireless
markup language, WML Script, wireless telephony application, push architecture, push/pull
services, example stacks with WAP1.x [1].
References
ferences:
Text Books & References:
1. Mobile Communications, Schiller, 2nd Ed., Pearson.
2. Wireless Communications, Theodore S. Rappaport, 2nd Ed., PHI.
3. Wireless Communications, William Stallings, Prentice Hall
4. WIRELESS COMMUNICATIONS & NETWORKING, Vijay Garg, The Morgan Kaufmann Series
in Networking
3. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
7CS3 COMPILER CONSTRUCTION (Comp. Engg.)
Class: VII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Compiler, Translator, Interpreter definition, Phase of compiler introduction to one pass &
Multipass compilers, Bootstrapping, Review of Finite automata lexical analyzer, Input,
I
buffering, Recognition of tokens, Idea about LEX: A lexical analyzer generator, Error
handling.
Review of CFG Ambiguity of grammars, Introduction to parsing. Bottom up parsing Top
down parsing techniques, Shift reduce parsing, Operator precedence parsing, Recursive
II descent parsing predictive parsers. LL grammars & passers error handling of LL parser. LR
parsers, Construction of SLR, Conical LR & LALR parsing tables, parsing with ambiguous
grammar. Introduction of automatic parser generator: YACC error handling in LR parsers.
Syntax directed definitions; Construction of syntax trees, L-attributed definitions, Top
down translation. Specification of a type checker, Intermediate code forms using postfix
III
notation and three address code, Representing TAC using triples and quadruples,
Translation of assignment statement. Boolean e xpression and control structures.
Storage organization, Storage allocation, Strategies, Activation records, Accessing local
IV and non local names in a block structured language, Parameters passing, Symbol table
organization, Data structures used in symbol tables.
Definition of basic block control flow graphs, DAG representation of basic block,
Advantages of DAG, Sources of optimization, Loop optimization, Idea about global data
V
flow analysis, Loop invariant computation, Peephole optimization, Issues in design of code
generator, A simple code generator, Code generation from DAG.
Text/References:
1. Aho, Ullman and Sethi: Compilers, Addison Wesley.
2. Holub, Compiler Design in C, PHI.
4. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
7CS4 COMPUTER AIDED DESIGN FOR VLSI (Comp. Engg.)
Class: VII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Complexity in microelectronic circuit design and Moore’s Law, design styles -Full-
custom design, standard-cell design, Programmable Logic Devices, Field
I
Programmable Gate Arrays, Design Stages, Computer-Aided Synthesis and
Optimizations, design flow and related problems.
Boolean functions and its representations – co-factor, unite, derivatives,
consensus and smoothing; tabular representations and Binary Decision
Diagram (BDD), OBDD, ROBDD and Bryant’s reduction algorithm and ITE
II
algorithm. Hardware abstract models – structures and logic networks, State
diagram, data-flow and sequencing graphs, hierarchical sequencing graphs.
Compilation and behavioral optimizations.
Architectural Synthesis – Circuit description and problem definition, temporal and
spatial domain scheduling, synchronization problem. Scheduling algorithms - ASAP
III
and ALAP scheduling algorithms, scheduling under constraints, relative scheduling,
list scheduling heuristic. Scheduling in pipelined circuits.
Resource Sharing & Binding in sequencing graphs for resource dominated circuits,
sharing of registers and busses; binding variables to registers.
IV Two-level logic optimization principles – definitions and exact logic minimizations.
Positional cube notations, functions with multi-valued logic. List-oriented
manipulations.
Physical Design. Floor planning – goals and objectives. Channel definition, I/O and
power planning. Clock Planning. Placement – goals and objectives. Placement
algorithms. Iterative improvement algorithms. Simulated Annealing. Timing-driven
V Placement. Global routing – goals and objectives. Global routing methods. Timing-
driven global routing. Detailed Routing – goals and objectives. Left-edge algorithm.
Constraints and routing graphs. Channel routing algorithms. Via minimization.
Clock routing, power routing, circuit extraction and Design Rule Checking.
Text Books:
1. S.H. Gerez. Algorithms VLSI Design Automation. Wiley India. (Indian edition available.)
2. Michael John Sebastian Smith. Application-Specific Integrated Circuits. Addison-Wesley.
(Low-priced edition is available.)
3. G.D. Micheli, Synthesis and optimization of digital circuits, TMH.
References:
References
1. http://www.fie-conference.org/fie98/papers/1002.pdf
2. S. Sait and H. Youssef. VLSI Physical Design Automation: Theory and Practice.
5. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
7CS5 COMPUTER GRAPHICS & MULTIMEDIA TECHNIQUES (Common to Comp. Engg.
& Info. Tech.)
Class: VII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Introduction: Introduction to Raster scan displays, Storage tube displays, refreshing,
flicking, interlacing, color monitors, display processors, resolution, Introduction to
Interactive. Computer Graphics: Picture analysis, Overview of programmer’s model
I
of interactive graphics, Fundamental problems in geometry. Scan Conversion: point,
line, circle, ellipse polygon, Aliasing, and introduction to Anti Aliasing (No anti
aliasing algorithm).
2D & 3D Co-ordinate system: Homogeneous Co-ordinates, Translation, Rotation,
Co- system:
Scaling, Reflection, Inverse transformation, Composite transformation. Polygon
II Representation, Flood Filling, Boundary filling.
Point Clipping, Cohen-Sutherland Line Clipping Algorithm, Polygon Clipping
algorithms.
Hidden Lines & Surfaces Image and Object space, Depth Buffer Methods, Hidden
Surfaces:
Facets removal, Scan line algorithm, Area based algorithms.
III
Curves and Splines Parametric and Non parametric Representations, Bezier curve, B-
Splines:
Spline Curves.
Rendering:
Rendering: Basic illumination model, diffuse reflection, specular reflection, phong
IV
shading, Gourand shading, ray tracing, color models like RGB, YIQ, CMY, HSV
Multimedia: Multimedia components, Multimedia Input/Output Technologies:
V Storage and retrieval technologies, Architectural considerations, file formats.
Animation: Introduction, Rules, problems and Animation techniques.
Text/References:
1. J. Foley, A. Van Dam, S. Feiner, J. Hughes: Computer Graphics- Principles and Practice, Pearson
2. Hearn and Baker: Computer Graphics, PHI
3. Multimedia Systems Design, Prabhat Andleigh and Thakkar, PHI.
4. Multimedia Information Networking, N.K.Sharda, PHI..
6. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
7CS6.1 ADVANCE DATABASE MANGEMENT SYSTEMS (Common to Comp. Engg. & Info.
Tech.)
Class: VII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Query Processing and Optimization Overview of Relational Query Optimization,
and Optimization:
mization
I System Catalog in a Relational DBMS, Alternative Plans, Translating SQL, Queries
into Algebra, Estimating the Cost of a Plan, Relational Algebra Equivalences,
Enumeration of Alternative Plans. [2]
Object Database Systems: Motivating Examples, Structured Data Types, Operations
Object Systems
On Structured Data, Encapsulation and ADT's, Inheritance, Objects, OIDs and
II Reference Types, Database Design for an ORDBMS, ORDBMS Implementation
Challenges, ORDBMS, Comparing RDBMS, OODBMS, and ORDBMS.
Parallel and Distributed Databases Architectures for Parallel, Databases, Parallel
Databases:
Query Evaluation, Parallelizing Individual Operations, Parallel Query Optimization,
III Distributed DBMS Architectures, Storing Data in a Distributed DBMS, Distributed
Catalog Management, Distributed Query Processing, Updating Distributed Data,
Introduction to Distributed Transactions, Distributed Concurrency Control,
Distributed Recovery. [2]
Database Security and Authorization: Introduction to Database Security, Access
Authorization
Control, Discretionary Access Control- Grant and Revoke on Views and Integrity
IV Constraints, Mandatory Access Control- Multilevel Relations and Polyinstantiation,
Covert Channels, DoD Security Levels, Additional Issues Related to Security- Role of
the Database Administrator, Security in Statistical Databases, Encryption. [2]
POSTGES:
POSTGES POSTGRES user interfaces, sql variations and extensions, Transaction
Management, Storage and Indexing, Query processing and optimizations, System
V Architectures.
XML: Motivation, Structure of XML data, XML Document Schema, Querying and
Transformation, Application Program Interface to XML, Storage of XML Data, XML
applications. [2]
Text/References
1. Elmasri R and Navathe SB, Fundamentals of Database Systems, 3rd Edition, Addison
Wesley,2000.
2. Connolly T, Begg C and Strachan A, Database Systems, 2nd Edition, Addison Wesley, 1999
3. Ceri Pelagatti , Distributed Database: Principles and System - (McGraw Hill)
4. Simon AR, Strategic Database Technology: Management for the Year 2000, Morgan Kaufmann,
1995
5. A. Silversatz, H. Korth and S. Sudarsan: Database Cocepts 5th edition, Mc-Graw Hills 2005.
7. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
7CS6.2 DATA MINING & WARE HOUSING (Comp. Engg.)
Class: VII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Overview, Motivation(for Data Mining),Data Mining-Definition & Functionalities,
Data Processing, Form of Data Preprocessing, Data Cleaning: Missing Values, Noisy
Data, (Binning, Clustering, Regression, Computer and Human inspection),
I
Inconsistent Data, Data Integration and Transformation. Data Reduction:-Data Cube
Aggregation, Dimensionality reduction, Data Compression, Numerosity Reduction,
Clustering, Discretization and Concept hierarchy generation.
Concept Description: Definition, Data Generalization, Analytical Characterization,
Analysis of attribute relevance, Mining Class comparisons, Statistical measures in
large Databases. Measuring Central Tendency, Measuring Dispersion of Data, Graph
Displays of Basic Statistical class Description, Mining Association Rules in Large
II
Databases, Association rule mining, mining Single-Dimensional Boolean Association
rules from Transactional Databases– Apriori Algorithm, Mining Multilevel
Association rules from Transaction Databases and Mining Multi- Dimensional
Association rules from Relational Databases.
What is Classification & Prediction, Issues regarding Classification and prediction,
Decision tree, Bayesian Classification, Classification by Back propagation, Multilayer
feed-forward Neural Network, Back propagation Algorithm, Classification methods
K-nearest neighbour classifiers, Genetic Algorithm. Cluster Analysis: Data types in
III
cluster analysis, Categories of clustering methods, Partitioning methods. Hierarchical
Clustering- CURE and Chameleon. Density Based Methods-DBSCAN, OPTICS. Grid
Based Methods- STING, CLIQUE. Model Based Method –Statistical Approach,
Neural Network approach, Outlier Analysis
Data Warehousing: Overview, Definition, Delivery Process, Difference between
Database System and Data Warehouse, Multi Dimensional Data Model, Data Cubes,
IV
Stars, Snow Flakes, Fact Constellations, Concept hierarchy, Process Architecture, 3
Tier Architecture, Data Mining.
Aggregation, Historical information, Query Facility, OLAP function and Tools.
V OLAP Servers, ROLAP, MOLAP, HOLAP, Data Mining interface, Security, Backup
and Recovery, Tuning Data Warehouse, Testing Data Warehouse.
References:
Text Books & References
1. Data Warehousing in the Real World – Anahory and Murray, Pearson Education.
2. Data Mining – Concepts and Techniques – Jiawai Han and Micheline Kamber.
3. Building the Data Warehouse – WH Inmon, Wiley.
8. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
7CS6.3 Data Compression Techniques (Comp. Engg.)
Class: VII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Compression Techniques: Lossless, lossy, measure of performance, modeling &
coding.
Lossless compression: Derivation of average information, data models, uniquely
I decodable codes with tests, prefix codes, Kraft-Mc Millan inequality.
Huffman coding: Algorithms, minimum variance Huffman codes, optimality, length
extended codes, adaptive coding, Rice codes, using Huffman codes for lossless image
compression.
Arithmetic coding with application to lossless compression.
II Dictionary Techniques: LZ77, LZ78, LZW
Predictive coding: Burrows-Wheeler Transform and move-to-front coding, JPEG-LS
Facsimile Encoding: Run length, T.4 and T.6
Lossy coding Mathematical preliminaries: Distortion criteria, conditional entropy,
coding-
average mutual information, differential entropy, rate distortion theory, probability
and linear system models.
III Scalar quantization: The quantization problem, uniform quantizer, Forward adaptive
quantization, non-uniform quantization-Formal adopting quantization,
companded Quantization
Vector quantization: Introduction, advantages, The Linde-Ruzo-Grey algorithm,
quantization:
lattice vector quantization.
Differential encoding – Introduction, Basic algorithm, Adaptive DPCM, Delta
IV modulation, speech and image coding using delta modulation.
Sampling in frequency and time domain, z-transform, DCT, DST, DWHT,
quantization and coding of transform coefficient.
Sub band coding: Introduction, Filters, Basic algorithm, Design of Filter banks,
V G.722, MPEG.
Wavelet based compression: Introduction, wavelets multi-resolution analysis and the
scaling function implementation using filters.
References:
Text Books & References
1. Sayood K: Introduction to Data Compression: ELSEVIER 2005.
9. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
7CS7 COMPUTER GRAPHICS & MULTIMEDIA LAB (Common to Comp. Engg. &
Info. Tech)
Class: VII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Four (4) Hours
Schedule per Week Maximum Marks = 50
Practical Hrs.: 2 [Sessional /Mid-term (30) & End-term (20)]
Objectives:
At the end of the semester, the students should have clearly understood and implemented the
following:
1. To produce a single pixel and pre specified pattern on screen:
2. To implement features like changing background color, foreground color, resizing of
window, repositioning of window:
3. To implement mid point algorithm to draw circle and ellipse:
4. Use the line drawing & circle drawing programs to draw composite objects containing
only circle & lines. You can take shapes like a cart, car etc.
5. To Implement Clipping (various algorithms).
6. Simple fonts, graphical fonts, scalable fonts.
7. Input a polygon by drawing lines, use appropriate methods for filling and filling
convex & concave polygons.
Suggested Platform/Tools:
1. For this lab, the students can choose any platform either Microsoft Windows or Linux.
2. Compilers & Libraries: Microsoft Platform- Visual Studio.Net, Linux – Xlib/OpenGL.
3. No turbo C/C++. No library function except the one required to put a single pixel on the
screen.
Indicative List of Experiments:
1. Programs to produce a single pixel produce a pre specified pattern with features like changing
background color, foreground color, resizing of window, repositioning of window must be
demonstrated.
2. Use Mid Point algorithm to draw line between two points. The program must be independent
of the slope i.e. lines of all slopes must be drawn.
3. Use Mid Point algorithm to draw ellipse. Implement circle drawing as a special case of ellipse.
Extend this to draw arcs between points.
4. Programs to draw composite objects containing circles & lines, drawing lines thicker than one
pixel, you can take shapes like a cart, car etc.
5. Programs to demonstrate text generation e.g. simple fonts, graphical fonts, and scalable fonts.
6. Programs to demonstrate filling algorithms eg. filling convex & concave polynomials. The
program must be able to (i) input a polynomial by drawing lines (ii) determine whether convex
or concave (iii) use appropriate methods for filling.
7. Programs to demonstrate clipping algorithms eg. program to clip a (i) line and (ii) polygon
using Cohen-Sutherland Clipping algorithm(s), clipping lines, circles against a rectangular clip
area.
8. Programs to demonstrate presentation of geometrical objects e.g. circle and rectangle with
audio description i.e. size, color of boundary and interior etc. played synchronously one after
another.
10. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
7CS8 VLSI PHYSICAL DESIGN LAB (Comp. Engg.)
Class: VII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Four (4) Hours
Schedule per Week Maximum Marks = 75
Practical Hrs : 3 [Sessional/Mid-term (45) & End-term (30)]
VLSI Physical Design Automation is essentially the research, development and
productization of algorithms and data structures related to the physical design process. The
objective is to investigate optimal arrangements of devices on a plane (or in three
dimensions) and efficient interconnection schemes between these devices to obtain the
desired functionality and performance. Since space on a wafer is very expensive real estate,
algorithms must use the space very efficiently to lower costs and improve yield. In addition,
the arrangement of devices plays a key role in determining the performance of a chip.
Algorithms for physical design must also ensure that the layout generated abides by all the
rules required by the fabrication process. Fabrication rules establish the tolerance limits of the
fabrication process. Finally, algorithms must be efficient and should be able to handle very
large designs. Efficient algorithms not only lead to fast turn-around time, but also permit
designers to make iterative improvements to the layouts. The VLSI physical design process
manipulates very simple geometric objects, such as polygons and lines. As a result, physical
design algorithms tend to be very intuitive in nature, and have significant overlap with graph
algorithms and combinatorial optimization algorithms. In view of this observation, many
consider physical design automation the study of graph theoretic and combinatorial
algorithms for manipulation of geometric objects in two and three dimensions. However, a
pure geometric point of view ignores the electrical (both digital and analog) aspect of the
physical design problem. In a VLSI circuit, polygons and lines have inter-related electrical
properties, which exhibit a very complex behavior and depend on a host of variables.
Therefore, it is necessary to keep the electrical aspects of the geometric objects in perspective
while developing algorithms for VLSI physical design automation. With the introduction of
Very Deep Sub-Micron (VDSM), which provides very small features and allows dramatic
increases in the clock frequency, the effect of electrical parameters on physical design will
play a more dominant role in the design and development of new algorithms.
(Source: Algorithms For VLSI Physical Design Automation, by Naveed A. Sherwani).
The exercise should be such that the above objectives are met.
Automation tools such as Synopsis/ Cadence are available in the area. However, to begin, the
students shall be assigned exercises on route optimization, placement & floor planning. Small
circuits may be taken & algorithms implemented. At a later stage, the students may use tools
and design more complex circuits.
11. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
7CS9 COMPILER DESIGN LAB (Comp. Engg.)
Class: VII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Four (4) Hours
Schedule per Week Maximum Marks = 100
Practical Hrs : 3 [Sessional/Mid-term (60) & End-term (40)]
Objectives: At the end of the semester, the students should have clearly understood and
implemented the following:
1. Develop an in depth understanding of system programming concept. Lexical analysis, syntax
analysis, semantics analysis, code optimization, code generation. Language specification and
processing
2. Develop an Understanding of Scanning by using concept of Finite state automaton. Parse tree
and syntax tree, Top down parsing (recursive decent parsing, LL (1) parser) Bottom up parsing
(operator precedence parsing) .Managing symbol table, opcode table, literal table, pool table
3. Develop an Understanding of Intermediate code form: Three address code, Polish notation
(Postfix strings)
4. Develop an Understanding of Allocation data structure. Heaps
5. Develop an Understanding about Language processor development tools: LEX, YACC.
Language processing activities (Program generation and execution)
It is expected that each laboratory assignments to given to the students with an aim to In order to
achieve the above objectives
Indicative List of exercises:
1. Write grammar for a fictitious language and create a lexical analyzer for the same.
2. Develop a lexical analyzer to recognize a few patterns in PASCAL and C (ex: identifiers,
constants, comments, operators etc.)
3. Write a program to parse using Brute force technique of Top down parsing
4. Develop on LL (1) parser (Construct parse table also).
5. Develop an operator precedence parser (Construct parse table also)
6. Develop a recursive descent parser
7. Write a program for generating for various intermediate code forms
i) Three address code ii) Polish notation
8. Write a program to simulate Heap storage allocation strategy
9. Generate Lexical analyzer using LEX
10. Generate YACC specification for a few syntactic categories
11. Given any intermediate code form implement code optimization techniques
Reference
V.V Das, Compiler Design using FLEX and YACC, PHI
12. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
8CS1 MOBILE COMPUTING (Comp. Engg.)
Units Contents of the subject
Class: VIII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Mobile computing: Definitions, adaptability issues (transparency, Environmental
Constraints, application aware adaptation), mechanisms for adaptation and incorporating
adaptations.
I
Mobility management: mobility management, location management principle and
techniques, Energy efficient network protocols, PCS location management Scheme,
Energy efficient indexing on air and algorithm.
Data dissemination and management: challenges, Data dissemination, bandwidth
allocation for publishing, broadcast disk scheduling, mobile cache maintenance schemes,
Mobile Web Caching.
II Introduction to mobile middleware, Middleware for application development:
adaptation. Mobile Agents- introduction, mobile agent computing, model, technologies,
application to DBMS, Mobile Agent Security and Fault Tolerance using Distributed
Transactions, Reliable Agent Transfer, Architecture of a Secure Agent System, Network
Security Testing Using Mobile Agents, Network Security Testing Using Mobile Agents.
Service Discovery Middleware: Service Discovery & standardization Methods
(Universally Unique Identifiers, Textual Description & using interfaces), unicast
III
Discovery, Multicast Discovery & advertisement, service catalogs, Garbage Collection,
Eventing, security. Universal Plug and Play, Jini, Salutation.
Pervasive computing: Introduction, Principles–Decentralization, Diversification,
computing:
Connectivity, Simplicity, Pervasive Information Technology, Mobile Devices –
IV
Classification, Characteristics, Limitations, Smart Identification – Smart Card, Smart
Label, Smart Tokens, Smart Sensors and Actuators, Smart Home.
Web Services, Web Service Architecture, WSDL, UDDI, SOAP, Web Service Security,
Web Services for Remote Portals. Internet Portals – Functional Overview, Type – B2E
V Portals, Portal Infrastructure.
Standards: DECT, TETRA, UMTS, IMT-2000, IrDA-Architecture & protocol stacks.
Text/References:
1. Frank Adelstein, Sandeep Gupta, Golden Richard III, Loren Schwiebert, Fundamentals of
Mobile and Pervasive Computing, TMH.
2. Principles of mobile computing Hansmann & Merk., Springer
3. Mobile communications Jochen Schiller , Pearson
4. 802.11 wireless networks Matthew S.Gast, O’REILLY.
13. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
8CS2 INFORMATION SYSTEM SECURITY (Common to Comp. Engg. & Info. Tech)
Class: VIII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Elements of Number Theory: Divisibility and Euclid Algorithm, Primes and the Sieve of
Eratosthenes, testing for primes, Prime Number Theorem, Euler’s, Fermat’s Little theorems,
Congruences, Computing Inverse in Congruences, Legendre and Jacobi Symbols, Chinese
Remainder Theorem,
I Algebraic Structures in Computing (Definitions, properties and Elementary Operations
Only): Groups, subgroup, order of group, cyclic group, ring, field, division algorithm,
polynomial over a field. Galois Field
Elements of Information Theory: Entropy, redundancy of language, Key Equivocation &
Unicity Distance, equivocation of a simple cryptographic system
Security Attacks: Active V/S Passive, Security Services, Security Mechanisms.
Symmetric Cipher Model, Types of attacks on Encrypted messages.
Classical Cipher Techniques: Caeser, Affine, Mono-alphabetic, Transposition, Poly-
alphabetic Ciphers
Private Key Cryptosystems: Block Cipher Principles, Fiestel Cipher, Concept of
II ‘Confusion’ and “Diffusion’ in block ciphers, Product Ciphers, Lucifer Algorithm.
DES Algorithm, DES modes of operations, IDEA.
Differential & Linear Cryptanalysis (Introduction Only).
S-box theory: Boolean Function, S-box design criteria, Bent functions, Propagation and
nonlinearity, construction of balanced functions, S-box design.
Link Vis End-to-End Encryption, Key Distribution in Symmetric Encryption
Public Key Cryptosystems: Principles of Public Key Cryptosystems, Factorization, RSA
Algorithm, security analysis of RSA, Exponentiation in Modular Arithmetic.
III Key Management in Public Key Cryptosystems: Distribution of Public Keys, Distribution of
Secret keys using Public Key Cryptosystems. Discrete Logarithms, Diffie-Hellman Key
Exchange.
Message Authentication & Hashing: Birthday Paradox and General case of Duplications,
Basic functions of Message Authentication and Hashing, Introduction to Hash & MAC
algorithms.
IV Digital Signatures: RSA Based, ElGamal Signatures, Undeniable Signatures.
Authentication: Model of Authentication Systems, Impersonation, Substitution and spoofing
games, Authentication schemes for mutual authentication based on shared secret, two-way
public key, one-way public key, Mediated Authentication, One way Authentication.
X.509 Authentication Service: Certificates, Authentication Procedure, X.509 Version 3.
E-Mail Security: PGP including management of keys in PGP, S/MIME.
Network Security: IPSec, AH & ESP in Transport and Tunnel mode with multiple security
V associations (Key Management not Included). SSL (Protocols Only)
Intrusion Detection: Audit Reports, Statistical Anomaly Detection, Rule based detection,
honeypots, intrusion detection exchange formats.
Password Protection: Lamport Hash, EKE Protocol.
Text/References:
1. Stalling Williams: Cryptography and Network Security: Principles and Practices, 4th Edition,
Pearson Education, 2006.
2. Kaufman Charlie et.al; Network Security: Private Communication in a Public World, 2nd Ed.,
PHI/Pearson.
3. Pieprzyk Josef and et.al; Fundamentals of Computer Security, Springer-Verlag, 2008.
4. Trappe & Washington, Introduction to Cryptography, 2nd Ed. Pearson.
14. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
8CS3 DISTRIBUTED SYSTEMS (Comp. Engg.)
Class: VIII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Distributed Systems: Features of distributed systems, nodes of a distributed system, Distributed
computation paradigms, Model of distributed systems, Types of Operating systems:
Centralized Operating System, Network Operating Systems, Distributed Operating Systems
and Cooperative Autonomous Systems, design issues in distributed operating systems.
I Systems Concepts and Architectures: Goals, Transparency, Services, Architecture Models,
Distributed Computing Environment (DCE).[1.2]
Theoretical issues in distributed systems: Notions of time and state, states and events in a
distributed system, time, clocks and event precedence, recording the state of distributed
systems.[2]
Concurrent Processes and Programming: Processes and Threads, Graph Models for Process
Representation, Client/Server Model, Time Services, Language Mechanisms for
II Synchronization, Object Model Resource Servers, Characteristics of Concurrent Programming
Languages (Language not included).[1]
Inter-
Inter-process Communication and Coordination: Message Passing, Request/Reply and
Transaction Communication, Name and Directory services, RPC and RMI case studies.[1]
Distributed Process Scheduling: A System Performance Model, Static Process Scheduling with
Communication, Dynamic Load Sharing and Balancing, Distributed Process
Implementation.[1]
Distributed File Systems: Transparencies and Characteristics of DFS, DFS Design and
Systems:
III
implementation, Transaction Service and Concurrency Control, Data and File
Replication.[1,2]
Case studies: Sun network file systems, General Parallel file System and Window’s file
systems. Andrew and Coda File Systems [2,3]
Distributed Shared Memory: Non-Uniform Memory Access Architectures, Memory
Consistency Models, Multiprocessor Cache Systems, Distributed Shared Memory,
Implementation of DSM systems.[1]
IV
Models of Distributed Computation: Preliminaries, Causality, Distributed Snapshots, Modeling
Computation:
a Distributed Computation, Failures in a Distributed System, Distributed Mutual Exclusion,
Election, Distributed Deadlock handling, Distributed termination detection. [1]
Distributed Agreement: Concept of Faults, failure and recovery, Byzantine Faults, Adversaries,
Agreement:
Byzantine Agreement, Impossibility of Consensus and Randomized Distributed Agreement.[1]
V Replicated Data Management: concepts and issues, Database Techniques, Atomic Multicast,
and Update Propagation.[1]
CORBA case study: Introduction, Architecture, CORBA RMI, CORBA Services.[3]
Text Books:
1. Distributed operating systems and algorithm analysis by Randy Chow and T. Johnson,
Pearson
2. Operating Systems A concept based approach by DM Dhamdhere, TMH
3. Distributed Systems- concepts and Design, Coulouris G., Dollimore J, and Kindberg T.,
Pearson
15. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
8CS4.1 Hardware Testing and Fault Tolerance (Comp. Engg.)
Class: VIII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Overview of hardware testing. Reliability and Testing, Difference between Verification and
Testing, Concepts of fault models, test pattern generation and fault coverage. Types of tests
– exhaustive testing, pseudo-exhaustive testing, pseudo-random testing, and deterministic
I
testing. Test Application. Design for Test. Testing Economics. Defects, Failures and Faults.
How are physical defects modeled as faults. Stuck-at faults, Single stuck-at-faults multiple
stuck-at faults, bridging faults, delay faults, transient faults.
Relation between VLSI Design and Testing.
a) Design Representation for the purpose of testing – Representation in the form of
mathematical equations, tabular format, graphs, Binary Decision Diagrams, Netlists, or
HDL descriptions.
II
b) Recap of VLSI Design Flow and where testing fits in the flow. Importance of
Simulation and Fault Simulation. Compiled and event-driven simulation. Parallel and
deductive fault simulation. Using fault simulation to estimate fault coverage and
building a fault dictionary
Combinational Test Pattern Generation. D-algorithm. Critical Path Tracking. PODEM
algorithm for test generation. Testing sequential circuits. Functional and deterministic ATPG
for sequential circuits and the associated challenges. Motivation for Design for Testability.
III
Test Points, Partitioning for Testability. Scan Testing. Scan Architectures. Cost of Scan
Testing. Boundary Scan Testing. Board-level testing. Boundary-scan Architecture and
various modes of operation.
a) Built-in Self Test. Pseudo-random test generation. Response Compaction. Random
pattern-resistant faults. BIST architectures – Circular BIST, BILBO, STUMPS.
IV
b) Testing of Memories – Fault models, Functional tests for memories, Memory BIST.
c) Testing of microprocessors.
Hardware fault tolerance. Failure Rate, Reliability, Mean Time to Failure. Different kinds of
redundancy schemes for fault-tolerance (Space, Time, and Information Redundancy). N-
V modular Redundancy. Watch Dog Processors, Byzantine Failures. Information Redundancy
– parity codes, checksums, m-of-n codes. RAID architectures for disk storage systems. Fault
tolerance in interconnection networks. Fault-tolerant routing techniques.
Text Book:
1. Samiha Mourad and Yervant Zorian. Principles of Electronic Systems. Wiley Student
Editon. [Available in Indian Edition].
2. Koren and C. Mani Krishna. Fault-Tolerant Systems. Elsevier. (Indian Edition Available.)
Text/References:
1. Abramovici, M., Breuer, M. A. and Friedman, A. D. Digital systems testing and testable
design. IEEE press (Indian edition available through Jayco Publishing house), 2001.
16. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
2. Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits by
Bushnell and Agrawal, Springer, 2000.
17. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
8CS4.2 REAL TIME SYSTEMS (Comp. Engg.)
Class: VIII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Introduction: Definition, Typical Real Time Applications, concept of tasks, types of
tasks and real time systems, block diagram of RTS, and tasks parameters -Release
I
Times, execution time, period, Deadlines, and Timing Constraints etc. RTS
requirements.
Reference Models for Real Time Systems: processors and Resources, Temporal
Parameters of Real-Time Workload, Periodic and Aperiodic Task Model, Precedence
Constrains and Data Dependency, Other Types of Dependencies, Functional
Parameters, Resource Parameters.
II
Real Time Scheduling: classification of Real Time Scheduling, scheduling criteria,
performance metrics, schedulability analysis, Introduction to Clock Driven
scheduling, Weighted Round Robin Approach and Priority Driven Approach.
Dynamic Versus Static systems, Offline Versus Online Scheduling.
Periodic tasks scheduling: Clock Driven Scheduling – definition, notations and
assumption, scheduler concepts, general scheduling structure, cyclic executives.
III Priority Driven Scheduling; notations and assumption, fixed priority verses dynamic
priority, fixed priority scheduling algorithms (RM and DM) and their schedulability
analysis, concept of schedulability tests – Inexact and exact schedulability tests for
RM and DM, Optimality of the RM and DM algorithms, practical factors.
Aperiodic task scheduling; assumption and approaches, server based and non-server
based fixed priority scheduling algorithms – polling server, deferrable server , simple
IV sporadic server, priority exchange, extended priority exchange, slack stealing.
Introduction to scheduling of flexible computations –flexible applications, imprecise
computation model and firm deadline model.
Resources Access Control: Assumptions on Resources and their usage, Effect of
Resource Contention and Resource Access Control (RAC), Non-preemptive Critical
Sections, priority inversion problem, need of new resource synchronization
V primitives/protocols for RTS, Basic Priority-Inheritance and Priority-Ceiling
Protocols, Stack Based Priority-Ceiling Protocol, Use of Priority- Ceiling Protocol in
Dynamic Priority Systems, Preemption Ceiling Protocol, Access Control in Multiple-
Unit Resources, Controlling Concurrent Accesses to Data Objects.
Text & References:
1. J.W.S.Liu: Real-Time Systems, Pearson Education Asia
2. P.D.Laurence, K.Mauch: Real-time Microcomputer System Design, An
Introduction, McGraw Hill
3. C.M. Krisna & K. G. Shim- Real time systems- TMH
18. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
8CS4.3 DIGITAL IMAGE PROCESSING (Common to Comp. Engg. & Info. Tech)
Class: VII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Three (3) Hours
Schedule per Week Maximum Marks = 100
Lectures: 3 [Mid-term (20) & End-term (80)]
Units Contents of the subject
Image Representation, Two-Dimensional Systems, Two-Dimensional Fourier
I Transform, Image Stochastic Characterization, Psychophysical Vision Properties, Light
Perception, Eye Physiology, Visual Phenomena, Monochrome Vision Model, Color
Vision Model, photometry.
Image Sampling and Reconstruction Concepts, Image Sampling Systems, Image
Reconstruction Systems, Discrete Image Mathematical Representation, Vector-Space
II Image Representation, Generalized Two-Dimensional Linear Operator, Image Statistical
Characterization, Image Probability Density Models, Linear Operator Statistical
Representation, Image Quantization, Scalar Quantization, Processing Quantized
Variables, Monochrome Image Quantization.
Superposition and Convolution: Finite-Area Superposition and Convolution, Sampled
Image Superposition and Convolution, Superposition and Convolution Operator
III Relationships, 8 Unitary Transforms, General Unitary Transforms, Fourier Transform,
Cosine, Sine, and Hartley Transforms, Hadamard, Haar, Linear Processing Techniques,
Transform Domain Processing, Transform Domain Superposition.
IMAGE IMPROVEMENT: Image Enhancement, Contrast Manipulation, Histogram
Modification, Noise Cleaning, Edge Crispening, Image Restoration Models, General
Image Restoration Models, Optical Systems Models, Photographic Process Models,
IV Discrete Image Restoration Models, Point and Spatial Image Restoration Techniques,
Sensor and Display Point Nonlinearity Correction, Continuous Image Spatial Filtering
Restoration, Statistical Estimation Spatial Image Restoration, Geometrical Image
Modification, Translation, Minification, Magnification, and Rotation, Perspective
Transformation, Camera Imaging Model,
Morphological Image Processing, Binary Image Connectivity, 6 Gray Scale Image
Morphological Operations, Edge Detection, Edge, Line, and Spot Models, First-Order
Derivative Edge Detection, Second-Order Derivative Edge Detection, Image Feature
V Extraction: Image Feature Evaluation, Amplitude Features, Transform Coefficient
Features, Texture Definition, Image Segmentation , Amplitude Segmentation Methods,
Clustering Segmentation Methods, Region Segmentation Methods, Boundary
Detection,
Text/References
1. DIGITAL IMAGE PROCESSING: PIKS Inside, Third Edition, WILLIAM K. PRATT, PixelSoft,
Inc., Los Altos, California, ISBN: 9780471374077
2. Anil Jain: Digital Image Processing,
3. Gonzalez Woods: Image Processing
19. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
8CS5 UNIX NETWORK PROGRAMMING & SIMULATION LAB (Comp. Engg.)
Class: VIII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Four (4) Hours
Schedule per Week Maximum Marks = 100
Practical Hrs.: 3 [Sessional/Mid-term (60) & End-term (40)]
Objectives:
At the end of course, the students should be able to
• Understand various distributions of Unix viz. BSD, POSIX etc.
• Write client/server applications involving unix sockets involving TCP or UDP
involving iterative or concurrent server.
• Understand IPV4 & IPV6 interoperability issues
• Use fork( ) system call.
• Understand the network simulator NS2 and Simulate routing algorithm on NS2
(Available on http://www.isi.edu/nsnam/ns/).
Suggested Platform: For Socket Programming- Linux, For NS2 Any of Microsoft Windows
or Linux (In case of Microsoft, Virtual environment cygwin will also be required).
Suggested Exercises
S.No. List of Experiments
1. Write two programs in C: hello_client and hello_server
• The server listens for, and accepts, a single TCP connection; it reads all the data it
can from that connection, and prints it to the screen; then it closes the connection
• The client connects to the server, sends the string “Hello, world!”, then closes the
connection
2. Write an Echo_Client and Echo_server using TCP to estimate the round trip time
from client to the server. The server should be such that it can accept multiple
connections at any given time.
3. Repeat Exercises 1 & 2 for UDP.
4. Repeat Exercise 2 with multiplexed I/O operations
5. Simulate Bellman-Ford Routing algorithm in NS2
References:
• Stevens, Unix Network Programming, Vol-I
20. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
8CS6 FPGA LAB. (Comp. Engg.)
Class: VIII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Four (4) Hours
Schedule per Week Maximum Marks = 100
Practical Hrs : 3 [Sessional/Mid-term (60) & End-term (40)]
S. No. List of Experiments
Fundamental Theory
Introduction to DSP architectures and programming
Sampling Theory, Analog-to-Digital Converter (ADC), Digital-to-
Analog Converter (DAC), and Quantization;
1. Decimation, Interpolation, Convolution, Simple Moving Average;
Periodic Signals and harmonics;
Fourier Transform (DFT/FFT), Spectral Analysis, and time/spectrum
representations;
FIR and IIR Filters;
Design (Simulation) using MATLAB/ Simulink
2.
Simulate the lab exercises using MATLAB/Simulink
Implementation using pure DSP, pure FPGA and Hybrid DSP/FPGA platforms
Digital Communications: On-Off- Keying (OOK), BPSK modulation,
and a simple transceiver design
Adaptive Filtering: Echo/Noise Cancellation, Least Mean Square (LMS)
3. algorithm (2 weeks)
Wireless Communications: Channel coding/decoding, Equalization,
Simple Detection Algorithm, OFDM
Speech Processing: Prediction Algorithms, Speech Classification and
Synthesis
21. Final 21.07.2010
RAJASTHAN TECHNICAL UNIVERSITY
Detailed Syllabus B.Tech. (Comp. Engg.) VII & VIII Sem. 2011-12 onwards
8CS7 Seminar on Information Technology Acts (Common to Comp. Engg. & Info.
Tech)
Class: VIII Sem. B.Tech. Evaluation
Branch: Computer Engg. Examination Time = Four (2) Hours
Schedule per Week Maximum Marks = 50
Practical Hrs : 2 [Sessional/Mid-term (30) & End-term (20)]
Course Objectives:
1. Study the acts dealing with the cyber crimes in different countries viz., India, USA, European
Union.
2. Study the Intellectual Property Rights and the acts dealing with these rights.
3. Study the Copyright acts with reference to publishing the material on the web.
Students are expected to prepare reports on:
• Various acts dealing with cyber crimes in the countries.
• what constitutes a cyber crime in the country ?
• Definitions of electronic documents, evidences, the approved algorithms etc.
• Investigation methods.
• Intellectual Property, rights of the creator of the property and legal framework dealing with
these rights.
• Similarly on Copyright acts.
Further, every student is required to deliver a seminar on a case study involving cyber crimes/
Intellectual Property, Copyright acts. The seminar shall focus on the “methodology and tools used in
the investigation, and enforcement of the applicable acts.”. The seminar may also be presented on new
ways of committing cyber crimes particularly Phishing, botnet etc.
The corresponding acts are the reference material.