This document outlines a course on learning VHDL and RTL design. The course is intended for those with no prior experience in VHDL and will focus on the VHDL language syntax and designing basic circuits. It will cover topics like combinational and sequential logic, finite state machines, and writing testbenches. Students are expected to be familiar with basic digital concepts. The course will teach through examples, coding exercises, and assignments with the goal of students learning to write VHDL code. It will utilize videos, examples, coding tips and practical exercises for each lesson in the outlined topics.

1. RTL Design
with VHDL
101
O U T L I N E
DIGITAL VLSI TOPICS

2. DESCRI PTI O N
• THI S CO URSE FO R SO M EO NE WI TH NO PREVI O US EXPERI ENCE
WI TH VHDL TO LEARN VHDL LANG UAG E AND WRI TE CO DES
TARG ETI NG HARDWARE.
• THI S CO URSE I S FO CUSI NG O N SYNTAX O F VHDL, BASI C DESI G N
CI RCUI TS .
RTL Design
with VHDL
101

3. PREREQ UI SI TES
I T I S REQ UI RED TO BE FAM I LI AR WI TH:
• LO G I C G ATES, M ULTI PLEXERS, DECO DERS, CO UNTERS, ADDERS,
M ULTI PLI ERS, SHI FT REG I STERS, FLI P FLO PS…
• LATCHES VS. FLI P - FLO PS
• CO M BI NATI O NAL & SEQ UENTI AL LO G I C
• SYNCHRO NO US & ASYNCHRO NO US
• WHAT I S CLO CK & RESET
• PRO G RAM M I NG BASI CS
RTL Design
with VHDL
101

4. 4
Learning VHDL by Example. In each
session, one or two VHDL codes are
represented to show how to describe
your design in HDL.
Example
Design
Learn how to use HDL Simulators,
FPGA Synthesis tools…
Practical
Exercises
Learn coding statements and coding
styles side by side with the example
designs shown in each session.
VHDL Coding
Tips & Tricks
Tasks are assigned to you after
completing each session to be able to
write more VHDL codes.
Assignments
COURSE STRATEGY
Learn by Example

5. 5
What is VLSI, Digital ASIC Design Flow,
Logical Design, Physical Design, What is
HDL, VHDL History…
1 Digital ASIC Flow
First VHDL Code, Entity, Architecture,
Signal Declaration, Signal Assignment,
Operators …
2 Combinational Logic
O U T L I N E
What is Process, D Flip Flop, Register,
Register File, Synchronous, Asynchronous
signals, …
3 Sequential Logic
How to write simple Testbench, Assertions,
Wait statement…
4 Simple TestBench
When-Else, With-Select, If, Case
Statements, Combinational Process …
5 Combinational Circuits
Counters, Signed and Unsigned signals ,
Aggregate…
6 Sequential Circuits
Importance of FSM, Moore state machines,
Mealy state machines…
7 Finite State Machine
Structural designs, components, Port Map,
Configuration, ..
8 Hierarchical Design
Function, Procedure, Read & Write from
files …
9 Write a TestBench
10 Project

6. W W W . Y O U T U B E . C O M / C H A N N E L / U C C E C V 3 G Q L Q C R T 8 M S 3 _ A R N 9 Q
For all course videos and material visit YouTube channel
W W W . L I N K E D I N . C O M / I N / M A H M O U D A B D E L L A T I F

7. S T A Y T U N E D
D I G I T A L V L S I T O P I C S