This document is an employment application form for TCS submitted by Deepak Kumar Jain. It includes personal details like name, date of birth, addresses, academic details of graduation and post-graduation degrees from Govt College of Engineering Jabalpur including subjects, marks/CGPAs obtained. It also includes declarations by the applicant regarding academic details, no pending backlogs or extended education. It lists English and Hindi as languages known along with contact details and references.
Radiation Hardening by Design is one of the hardware based solution to one of the most troublesome problem faced by digital circuits in the space.
RHBD provides varieties of techniques to make the circuit resilient towards such effects and ensures proper malfunctioning of the circuit.
Radiation Hardening by Design is one of the hardware based solution to one of the most troublesome problem faced by digital circuits in the space.
RHBD provides varieties of techniques to make the circuit resilient towards such effects and ensures proper malfunctioning of the circuit.
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Nanometer layout handbook at high speed designMinho Park
I made this contents for whom is about to layout own's IC design. I think it would be helpful to consider layouts about high speed Rx / Tx.
Specially it was aimed giga hertz bandwidth I/O with its ESD protection (I am still working on that items to rearrange with my knowledge to my experiences)
I showed up all references and all images (except originals) are belong to own's copy rights.
Luận văn Nghiên Cứu Tính Chất Tán Xạ Raman Tăng Cường Bề Mặt Của Các Mảng Hạt Nano Bạc Trên Đế Silic Chế Tạo Bằng Phương Pháp Lắng Đọng Điện Hóa.doc,các bạn có thể tham khảo thêm nhiều tài liệu và luận văn ,bài mẫu điểm cao tại teamluanvan.com
Nhận viết luận văn Đại học , thạc sĩ - Zalo: 0917.193.864
Tham khảo bảng giá dịch vụ viết bài tại: vietbaocaothuctap.net
Download luận văn đồ án tốt nghiệp ngành kĩ thuật điện tử với đề tài: Ứng dụng công nghệ Iot giám sát mức tiêu thụ điện – nước, cho các bạn làm luận văn tham khảo
Nhận viết luận văn đại học, thạc sĩ trọn gói, chất lượng, LH ZALO=>0909232620
Tham khảo dịch vụ, bảng giá tại: https://vietbaitotnghiep.com/dich-vu-viet-thue-luan-van
Download luận văn đồ án tốt nghiệp ngành kĩ thuật điện tử với đề tài: Thiết kế và thi công hệ thống giám sát điện năng tiêu thụ trong hộ gia đình, cho các bạn làm luận văn tham khảo
Design of very large scale analog integrated circuit (analog VLSI) is very much complex and requires
much compromising nature to achieve application specific objective. With maximizing the efforts to reduce
power consumption and to reduce W/L ratio, the analog integrated circuit industry is constantly
developing smaller power supplies. Now days, challenges of analog integrated circuit designer are to
make block of small power supplies with little or no reduction in performance. The CMOS OTA is
designed in 25.5nm CMOS technology with 1.0V power supply to observe the configurations. In design of
CMOS OTA TANNER EDA TOOL is used. Coding and simulation is done in T-Spice and layout is
prepared in L-Edit. D.C analysis, A.C analysis, slew rate and analysis of transient response have been
done in T-Spice. Waveforms are observed in W-Edit.
Nhận viết luận văn Đại học , thạc sĩ - Zalo: 0917.193.864
Tham khảo bảng giá dịch vụ viết bài tại: vietbaocaothuctap.net
Download luận văn đồ án tốt nghiệp ngành điện với đề tài: Thiết kế bộ băm xung áp một chiều có đảo chiều, cho các bạn làm luận văn tham khảo
Nanometer layout handbook at high speed designMinho Park
I made this contents for whom is about to layout own's IC design. I think it would be helpful to consider layouts about high speed Rx / Tx.
Specially it was aimed giga hertz bandwidth I/O with its ESD protection (I am still working on that items to rearrange with my knowledge to my experiences)
I showed up all references and all images (except originals) are belong to own's copy rights.
Luận văn Nghiên Cứu Tính Chất Tán Xạ Raman Tăng Cường Bề Mặt Của Các Mảng Hạt Nano Bạc Trên Đế Silic Chế Tạo Bằng Phương Pháp Lắng Đọng Điện Hóa.doc,các bạn có thể tham khảo thêm nhiều tài liệu và luận văn ,bài mẫu điểm cao tại teamluanvan.com
Nhận viết luận văn Đại học , thạc sĩ - Zalo: 0917.193.864
Tham khảo bảng giá dịch vụ viết bài tại: vietbaocaothuctap.net
Download luận văn đồ án tốt nghiệp ngành kĩ thuật điện tử với đề tài: Ứng dụng công nghệ Iot giám sát mức tiêu thụ điện – nước, cho các bạn làm luận văn tham khảo
Nhận viết luận văn đại học, thạc sĩ trọn gói, chất lượng, LH ZALO=>0909232620
Tham khảo dịch vụ, bảng giá tại: https://vietbaitotnghiep.com/dich-vu-viet-thue-luan-van
Download luận văn đồ án tốt nghiệp ngành kĩ thuật điện tử với đề tài: Thiết kế và thi công hệ thống giám sát điện năng tiêu thụ trong hộ gia đình, cho các bạn làm luận văn tham khảo
Design of very large scale analog integrated circuit (analog VLSI) is very much complex and requires
much compromising nature to achieve application specific objective. With maximizing the efforts to reduce
power consumption and to reduce W/L ratio, the analog integrated circuit industry is constantly
developing smaller power supplies. Now days, challenges of analog integrated circuit designer are to
make block of small power supplies with little or no reduction in performance. The CMOS OTA is
designed in 25.5nm CMOS technology with 1.0V power supply to observe the configurations. In design of
CMOS OTA TANNER EDA TOOL is used. Coding and simulation is done in T-Spice and layout is
prepared in L-Edit. D.C analysis, A.C analysis, slew rate and analysis of transient response have been
done in T-Spice. Waveforms are observed in W-Edit.
TAMIL NADU VETERINARY AND ANIMAL SCIENCES UNIVERSITY Recruitment 2019 for Ani...Juan Samsel
The job applications for TANUVAS Jobs 2019 will be accepted as per the attached application format before 31 Jul 2019 05:00 PM.
The Education organization invites applications for System Analyst, Data Entry Operator & Other Posts from eligible candidates having B.Tech, M.Tech, M.Sc, B.Sc, PhD, B.Ed qualifications. These vacancies are in Tamil Nadu Veterinary and Animal Sciences University (TANUVAS), Chennai, Tamil Nadu.
1. TCS EMPLOYMENT APPLICATION FORM
BASIC DETAILS
Reference # CT20130989157
PERSONAL DETAILS
College/Institute Govt College Of Engineering, Jabalpur
Name Mr. Deepak Kumar Jain
Mother's Maiden Name Chanda Jain
Mother's Name Ms.Chanda Jain
Father's Name Mr.Kamal Kumar Jain
Date Of Birth 18/04/1991
Nationality India
Gender Male
Area Of Interest IT Application Development And
Maintainance,Engineering and Industrial
Services,IT Infrastructure Services,Research
CONTACT DETAILS
PERMANENT ADDRESS
House No./Apartment Name/Block No Asati Bard No 2
Road/Street/Lane Near Jain Big Temple
Area/Landmark Citynal
City Damoh
State Mp
PIN Code 470661
Country India
PRESENT ADDRESS
House No./Apartment Name/Block No Asati Bard No 2
Road/Street/Lane Near Jain Big Temple
Area/Landmark Citynal
City Damoh
State Mp
PIN Code 470661
Country India
2. ACADEMIC DETAILS:
Degree Course
Name
Duration
From
Duration
To
Course
Type
University/Institute Board Of
Education
Major Subject CGPA/Marks
Obtained
Total
Marks/CGPA
Percentage
Post Graduate MASTER
OF
COMPUTE
R
APPLICAT
ION
01/08/2012 01/05/2015 Full Time Govt College Of
Engineering, Jabalpur
INFORMATIO
N
TECHNOLOG
Y
8.25 10.0 82.5
Graduate BACHELO
R OF
COMPUTE
R
APPLICAT
ION
01/07/2009 01/08/2012 Full Time Mahakal Institute Of
Technology &
Management, Ujjain
INFORMATIO
N
TECHNOLOG
Y
3742.0 5000.0 74.84
XII higher
secondry
01/07/2008 01/05/2009 Full Time Excellence h. s. school State Board maths, science 391.0 500.0 78.2
X high
education
01/07/2006 01/05/2007 Full Time excellence h. s. school State Board 444.0 500.0 88.8
Are there any break in studies ? No
Rewards Or Scholarships :
Academic Projects Undertaken: computer shop management
Have you done any other course ? No
Do you have any pending backlogs
currently ?
No
3. Declaration
1. You have taken all subject marks into consideration for calculating the obtained/Total Marks/CGPA in each
of the above mentioned academic qualifications :
Yes
2. The "Marks/CGPA Obtained" entered by you for each of the above mentioned academic qualifications has
been secured in the first attempt :
Yes
3. You have considered only the Marks/CGPA obtained during the normal duration of the course for calculating
Obtained/Total Marks/CGPA :
Yes
4. You have completed each of the above mentioned academic courses in the stipulated time as specified by
your University/Institute and as per TCSL selection guidelines and do not have any extended education:
Yes
5. You have declared break in studies/work experience and pending backlogs,if any, during your academics:
No
6. You have not attended the TCSL Selection Process in the last 6 months:
No
7. You have read the TCSL eligibility criteria and understand that your candidature/application/offer/ on
boarding is subject to fulfillment of the specified criteria :
Yes
I Mr. Deepak Kumar Jain solemnly declare that the information in this form is truly stated and correct and I am competent to
furnish as well as verify it with adequate details whenever requested for by TCSL.
4. CONTACT DETAILS
E-mail ID deepakjain18491@gmail.com
Telephone(R) 9074320629
Alternate E-Mail ID deepakeverywear@gmail.com
Telephone(M) 8817519968
LANGUAGE DETAILS:
Language Mother Tongue Read Speak Write
English No Yes Yes Yes
Hindi Yes Yes Yes Yes