The document describes the design and implementation of a measurement system for laser testing of semiconductor memories to analyze single event upsets (SEUs). The system includes hardware connected to a computer running software to configure tests, control the system, visualize results and store data. Testing of a 256Kbit EPROM with laser pulses yielded bit flips and full column errors consistent with other memory radiation studies. The system provides a lower-cost alternative to particle accelerators for ground testing of devices and analysis of sensitivity to radiation effects and fault mitigation techniques.
Intelligent Fault Identification System for Transmission Lines Using Artifici...
Laser Testing Measurement Unit for Semiconductor Memory SEUs
1. Design and Implementation of a Measurement Unit for
Laser Testing of Semiconductor Memories
A. Cedola, I. Garda, M. Cappelletti, F. San Juan y E. Peltzer y Blancá
Abstract
Laser Testing of Integrated Circuits
Measurement System
EPROM Laser Testing Results
Conclusions
GEMyDE Group of Studies about Materials and Electronic Devices – Faculty of Engineering – National University of La Plata
CIOp Optical Research Center - CIC - CONICET
Software
Although charged particles and laser
pulses may generate the same amount of
electron-hole pairs in a semiconductor, the
distribution of these carriers is very
different for each case.
Anyway, laser testing is a reliable
technique that doesn’t replace but
complement particle accelerator testing.
Hardware schematic
Measurement Setup
Laser Equipment
Hardware
EPROM
RAM
EEPROM
In space applications, the impact of an energetic particle may produce an anomalous
behavior on a semiconductor device or circuit, referred as SINGLE EVENT EFFECT (SEE).
This work presents the design, fabrication and testing of a system for the detection and
analysis of pulsed laser induced Single Event Upsets (SEU) on semiconductor
memories. Laser is extremely useful to study radiation effects on electronic devices.
The developed system is a valuable tool for the investigation of microcircuits’ sensitivity
to SEU and the effectiveness of hardware/software fault mitigation techniques.
The hardware works connected to a computer running the software for configuration,
control, visualization and storage of collected data. The system allows to write to and
read the memory cells, and visualize on an intuitive GUI the errors produced as laser
pulses are triggered.
Important: with minor modifications, the system is able to be applied to SEU testing
under heavy-ion irradiation.
An alternative to the use of radiation facilities for ground tests of devices and integrated
circuits is LASER TESTING.
SEE
Soft errors
Hard errors
Single Event Transient (SET)
Single Event Upset (SEU)
SBU
MBU
Single Event Functional Interrupt (SEFI)
Single Event Latchup (SEL)
Single Event Burnout (SEB)
Single Event Gate Rupture (SEGR)
Memories
It brings information about spatial and temporal
dependence of device sensitivity to heavy-ion radiation.
Has lower cost and dangerouness in comparison with
particle accelerators.
Is more accesible.
It is mostly a non-destructive test.
Why LASER?
0 128 256 384 512 640 768 896 1023
0
64
128
192
255
Column number
Rownumber
0 128 256 384 512 640 768 896 1023
0
64
128
192
255
Column number
Rownumber
0 128 256 384 512 640 768 896 1023
0
64
128
192
255
Column number
Rownumber
0 5 10 15 20 25
0
50
100
150
200
250
300
Laser pulse energy [uJ]
Numberofbiterrors
1 to 0 SEU
1 to 0 SEU
0 to 1 SEU
Column errors produced after continuously firing 70
pJ laser pulses with a repetition rate of 10 Hz, with
all cells prefilled with 1’s. The 0’s indicate 1 to 0
transitions induced by laser strikes. The memory
resulted permanently damaged. Posterior tests
demonstrated that continuous irradiation leads to
an accumulation of energy high enough to
permanently disrupt the memory’s functionality.
Errors mapping assuming for the EPROM a 256 row by 1024 column bit distribution:
Experiments carried out with 256 Kbit EPROM model M27C256B, 15 address bits and 8
data bits, are presented.
1) 20 μJ single pulses over a memory fully filled
with 1’s. Red points denote transient 1 to 0
transitions that disappeared by themselves
after memory reading. The blue points indicate
a full column error, a severe error similar to that
found in SEE studies on DRAM devices, after
exposure to laser, heavy ions and protons.
2) The same memory after applying 10 μJ
single pulses at a different location. Green
points represent the induced bit flips (1 to 0).
Blue points are the stable damages produced
by previous 20 μJ irradiation. No transient
errors were detected. The column errors could
be attributed to strikes on an address register.
3) Multiple bit upsets (MBU) observed after 8
μJ pulses irradiation on a memory prefilled with
1’s in the even columns and with 0’s in the odd
columns. All transitions were 0 to 1 in this case.
Only 7 columns were affected: 73, 201 and 329
(separated by 128 columns from each other),
705 and 833 (separated by 128 columns, too),
193 and 449 (separated by 256 columns).
4) Summary of the number of bit errors as a
function of the laser beam energy, in order to
establish a qualitative relation between laser
intensity and damage generation. Transient
and stable errors are included.
Contact information: ariel.cedola@ing.unlp.edu.ar
A Visual Basic app to set the serial port parameters, connect/disconnect
with the main board, choose the type of memory and the operation to
perform (reading or writing), select the bit pattern to write, visualize the
readings on the screen and save the results to a data file.
An instrument for detecting pulsed laser beam induced SEU in semiconductor memories has
been developed and successfully tested with EPROM devices. The system is configured and
controlled from a custom-made software running in a computer attached to the main board.
Testing of a 256 Kbit EPROM with a transparent lid irradiated with 800 nm, 1 ps laser pulses
yielded interesting results, in accordance with published works related to similar studies on
different memories. In particular, severe errors like full column bit flips were observed.
Measurements corroborated that the number of laser induced bit errors is proportional to the
laser beam energy. By separating the DUT stage from the main board, the system would be
able to be used in particle accelerator facilities, for SEU heavy-ion testing.