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射頻電路設計實務
Filter
RF Circuit Design for Systems
(射頻電路設計實務 4D9090)/課程共筆
講師 : 許智威 (owner , IEEE member) Mail :
awei@ieee.org ; 四電通四A ; 教室 : I2603 ;
• Active Filter
• Cable Repeaters
𝐹 𝑇
𝑛
= 10 𝑙𝑜𝑔[ 1 + 𝑛(𝐹 −
1
𝐺
+ ⋯ )
f = 1/𝜋𝑅𝐶𝑖𝑛
Gain [dB] G -G G -G G -G
Noise Figure[dB] F G F G F G
Single-Stage Amplifiers
Single-Stage Amplifiers
Power Amplifiers
•RL=
(𝑉𝑐𝑐 −𝑉𝑠𝑎𝑡)2
2𝑃 𝑜𝑢𝑡
• RL = Load resistance required
at device output
• Vcc = DC supply voltage (V)
• Vsat = device saturation voltage (V)
• Desired RF power output (W)
Power Amplifiers
• RL=
(𝑉𝑐𝑐 −𝑉𝑠𝑎𝑡)2
2𝑃 𝑜𝑢𝑡
• RL = Load resistance required
at device output
• Vcc = DC supply voltage (V)
• Vsat = device saturation voltage (V)
• Desired RF power output (W)
1 . Design a matching network that transforms the system
impedance (50Ω or 75 ) to the required load resistance,
RL , over the required bandwidth. 符合系統阻抗, 操作頻寬
2. Design a conjugate match at the device input when the
output is terminated in the required RL.
3. Verify that the amplifier is stable over temperature and voltage
variations and output voltage standing wave rate (VSWR). This
last task usually takes the most time. The most sensitive
component affecting stability is the collector DC chock. The
impedance of this DC feet circuit must not be too large at low
frequencies.
4. Verify that the device voltage, current and power dissipation
ratings are not exceeded over the operating conditions. The
collector or drain voltage in class-C amplifiers will reach twice the
supply voltage.

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Part 5

  • 1. 射頻電路設計實務 Filter RF Circuit Design for Systems (射頻電路設計實務 4D9090)/課程共筆 講師 : 許智威 (owner , IEEE member) Mail : awei@ieee.org ; 四電通四A ; 教室 : I2603 ;
  • 2. • Active Filter • Cable Repeaters 𝐹 𝑇 𝑛 = 10 𝑙𝑜𝑔[ 1 + 𝑛(𝐹 − 1 𝐺 + ⋯ ) f = 1/𝜋𝑅𝐶𝑖𝑛 Gain [dB] G -G G -G G -G Noise Figure[dB] F G F G F G
  • 5. Power Amplifiers •RL= (𝑉𝑐𝑐 −𝑉𝑠𝑎𝑡)2 2𝑃 𝑜𝑢𝑡 • RL = Load resistance required at device output • Vcc = DC supply voltage (V) • Vsat = device saturation voltage (V) • Desired RF power output (W)
  • 6. Power Amplifiers • RL= (𝑉𝑐𝑐 −𝑉𝑠𝑎𝑡)2 2𝑃 𝑜𝑢𝑡 • RL = Load resistance required at device output • Vcc = DC supply voltage (V) • Vsat = device saturation voltage (V) • Desired RF power output (W) 1 . Design a matching network that transforms the system impedance (50Ω or 75 ) to the required load resistance, RL , over the required bandwidth. 符合系統阻抗, 操作頻寬 2. Design a conjugate match at the device input when the output is terminated in the required RL. 3. Verify that the amplifier is stable over temperature and voltage variations and output voltage standing wave rate (VSWR). This last task usually takes the most time. The most sensitive component affecting stability is the collector DC chock. The impedance of this DC feet circuit must not be too large at low frequencies. 4. Verify that the device voltage, current and power dissipation ratings are not exceeded over the operating conditions. The collector or drain voltage in class-C amplifiers will reach twice the supply voltage.