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Operating Systems
UNIT-IV
Paging
Presented by
Tmt.P.Tharani
AP/CSE
GCE,Salem
1
Paging
 Paging is a memory-management schemes that permits the
physical address space of a process to be noncontiguous.
 Physical memory is broken into fixed –sized blocks called
frames. Logical memory is broken into blocks of same size
called pages.
 The page size and the frame size must be same.
 When a process is to be executed, its pages are loaded into any
available memory frames from the backing store.
 Every address generated by CPU is divided into two parts: a
page number (p) and a page offset/displacement(d).
 The page table contains the base address of each page in
physical memory. This base address is combined with the page
offset to define the physical address.
2
• Paging Hardware
3
• Paging model of logical and physical memory
4
• Paging example for a 32-byte memory with 4-byte pages
5
5*4+0=20
5*4+1=21
6*4+0=24
• Free Frames a)before allocation b)after allocation
6
• Hardware Support
 Each operating system has its own method of storing page
tables.
 The page table is implemented as a set of dedicated registers.
 TLB is associative,high-speed memory.Each entry in the TLB
consists of two parts,key and value.
 The TLB contains only a few of the page-table entries.When a
logical address is generated by the CPU,its page number is
presented to the TLB.
 If a page number is found in TLB- TLB hit
 If a page number is not in TLB-TLB miss
 The percentage of times that a particular page is found in the
TLB is called the hit ratio.
7
• Paging Hardware with TLB
8
• Protection
 Memory protection in a paged environment is accomplished
by protection bits that are associated with each frame.
 One more bit is generally attached to each entry in the page
table:a valid or invalid bit.
 When this bit is set to valid ,this value indicates that the
associated page is in the process logical address space.
 When this bit is set to invalid ,this value indicates that the
associated page is not in the process logical address space.
9
• Valid or invalid bit in a page table
10
• Shared Pages
11
Thank You
12

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Paging.ppt

  • 2. Paging  Paging is a memory-management schemes that permits the physical address space of a process to be noncontiguous.  Physical memory is broken into fixed –sized blocks called frames. Logical memory is broken into blocks of same size called pages.  The page size and the frame size must be same.  When a process is to be executed, its pages are loaded into any available memory frames from the backing store.  Every address generated by CPU is divided into two parts: a page number (p) and a page offset/displacement(d).  The page table contains the base address of each page in physical memory. This base address is combined with the page offset to define the physical address. 2
  • 4. • Paging model of logical and physical memory 4
  • 5. • Paging example for a 32-byte memory with 4-byte pages 5 5*4+0=20 5*4+1=21 6*4+0=24
  • 6. • Free Frames a)before allocation b)after allocation 6
  • 7. • Hardware Support  Each operating system has its own method of storing page tables.  The page table is implemented as a set of dedicated registers.  TLB is associative,high-speed memory.Each entry in the TLB consists of two parts,key and value.  The TLB contains only a few of the page-table entries.When a logical address is generated by the CPU,its page number is presented to the TLB.  If a page number is found in TLB- TLB hit  If a page number is not in TLB-TLB miss  The percentage of times that a particular page is found in the TLB is called the hit ratio. 7
  • 8. • Paging Hardware with TLB 8
  • 9. • Protection  Memory protection in a paged environment is accomplished by protection bits that are associated with each frame.  One more bit is generally attached to each entry in the page table:a valid or invalid bit.  When this bit is set to valid ,this value indicates that the associated page is in the process logical address space.  When this bit is set to invalid ,this value indicates that the associated page is not in the process logical address space. 9
  • 10. • Valid or invalid bit in a page table 10