July 16th 2021 , Friday for our newest workshop with DoMS, IIT Roorkee, Concept to Solutions using OpenPOWER Stack. It's time to discover advances in #DeepLearning tools and techniques from the world's leading innovators across industries, research, and public speakers. Register here: https://lnkd.in/ggxMq2N

1. OpenPOWER Workshop at IIT Roorkee
Concept to Solutions using OpenPOWER Stack
On July 16th July , spend 5 hours learning about Open POWER ISA, POWER
innovations, Processor development, Processor Accelerator Interface, HPC
Solution,Artificial Intelligence's latest solutions and gather the latest cutting-edge
insights from the pioneers in multiple industries
Discover advances in deep learning tools and techniques from the world’s leading
innovators across industry, research and Public Sectors
We’re excited to announce the prominent speakers will be joining us at the
OpenPOWERWorkshop

2. Agenda
5.00 pm IST to 5.15 pm
5.15 pm IST to 6.00 pm IST
6.00 pm IST to 6.45 pm IST
6.45 pm IST to 7.30 pm IST
7.30 pm IST to 8.15 pm IST
8.15 pm IST to 8.30 pm IST
8.30 pm IST to 9.15 pm IST
9.15 pm IST to 9.45 pm IST
9.45 pm IST to 10.00 pm IST
Dr Sateesh Kumar Peddujo and Ganesan Narayanasamy
Introduction about the workshop
Satish Sadasivam, IBM Systems
Title : Open POWER ISA and POWER Innovations
Luke Kenneth Casson Leighton, Libre-soc, Hardware Architect
Title : 180 nmTape out Experience using Open POWER ISA
Dr Pratik Narang , BITS Pilani
Title : Enhancing ComputingVision in Low visibility Conditions
Dr Chekuri Choudary , Lab Architect
Title : BOA and use cases
James Kulina , Executive Director at OpenPOWER Foundation
Title : OpenPOWER foundation and its collaborations
Allan Cantle , CEO Nallasway
Title : Decoupling Compute from Memory, Storage & IO with
OMI, the Open Memory Interface
Varun Mohan , NIELIT India
Title : Open Source tools for logic synthesis and SOC Design
Conclusion talk by Dr Sateesh Kumar Peddujo

3. Organizers
— Prof Sateesh Kumar Peddoju
IIT Roorkee
— Ganesan Narayanasamy
OpenPOWER leader in Education and Research
IBM Systems
— Zoom Link for registration :
https://zoom.us/webinar/register/WN_QA5QKqfAQbSpIOTdcrKEkQ

4. Title: WorkloadTransformation and Innovations in POWER Architecture
Abstract : IT Industry is going through two major transformations. One is adaption of AI and tight integration of the same
in the commercial applications and enterprise workflow.Two the transformation in software architecture through the concepts
like microservices and the cloud native architecture.These transformation alongside the aggressive adaption of IoT/mobile and
5G in all our day today activities is making the world operate in more real time manner which opens-up a new challenge to
improve the hardware architecture to adapt to these requirements.These above two major transformation pushes the
boundary of the entire systems stack making the designer rethink hardware.This talk presents you a picture of how the
enterprise Industry leading POWER architecture is transforming to fulfill the performance demands of these newer generation
workloads with primary focus on the AI acceleration on the chip.
Speaker : Satish Kumar Sadasivam, IBM Systems
Satish Kumar Sadasivam is a Senior Performance Architect who leads the workload characterization and future architecture
design space exploration team in IBM. He currently focuses on exploring architectural and microarchitectural innovations for
Enterprise AI and cloud centric workloads with primary focus towards optimizing the core for single thread, core throughput
and compute performance. He has worked on IBM POWER processor architecture since POWER5+ timeline. He is one of the
key contributors for the POWER10 processor key architecture features like Instruction Fusion, Branch prediction and Matrix
Math Assist (MMA). He has more than 16 years of experience in the areas of workload characterization, microarchitecture
design exploration, compiler code generation and optimization, competitive evaluation, post-silicon hardware bring-up and
validation. He received an MS in computer science from the Madras Institute of Technology. He is an IBM master inventor. He
has filed more than 25+ patents, published several papers and delivered several talks in his field of work

5. Luke Kenneth Casson Leighton specialises in Libre Ethical Technology. He has been using, programming and reverse-engineering
computing devices continuously for 44 years, has a BEng (Hons),ACGI, in Theory of Computing from Imperial College, and
recently put that education to good use in the form of the Libre-SOC Project: an entirely Libre-Licensed 3D Hybrid CPU-VPU-
GPU based on OpenPOWER. He writes poetry and has been developing a HEP Physics theory for the past 36 years in his
spare time.
Title: 180 nmTape out experience using Open POWER ISA
Abstract : The Libre-SOC Project aims to create an entirely Libre-Licensed, transparently-developed fully auditable
Hybrid 3D CPU-GPU-VPU, using the Supercomputer-class OpenPOWER ISA as the foundation.
Our first test ASIC is a 180nm "Fixed-Point" Power ISA v3.0B processor, 5.1mm x 5.9mm, as a proof-of-concept for the team,
whose primary expertise is in Software Engineering. Software Engineering training brings a radically different approach to
Hardware development: extensive unit tests, source code revision control, automated development tools are normal. Libre
Project Management brings even more: bug trackers, mailing lists, auditable IRC logs and a wiki are standard fare for Libre
Projects that are simply not normal Industry-Standard practice.
This talk therefore goes through the workflow, from the original HDL through to the GDS-II layout, showing how we were
able to keep track of the development that led to the IMEC 180nm tape-out in July 2021. In particular, by following a parallel
development process involving "Real" and "Symbolic" Cell Libraries, developed by Chips4Makers, will be shown how our
developers did not need to sign a Foundry NDA, but were still able to work side-by-side with a University that did.With this
parallel development process, the University upheld their NDA obligations, and Libre-SOC were simultaneously able to
honour its Transparency Objectives.
Speaker : Luke Kenneth Casson Leighton

6. Dr. Pratik Narang is an Assistant Professor in the Department of CSIS at BITS Pilani, Rajasthan, India. His research focuses on building
systems using Artificial Intelligence and Machine Learning for improving the existing technologies in Cyber security, ComputerVision,
and Healthcare. Pratik has previously held research positions with the National University of Singapore, Singapore (as a part of his
Post-doctoral research), and The NewYork University,Abu Dhabi campus, UAE (where he carried out a portion of his PhD
research). His PhD research was funded by grants from the Ministry of Electronics & IT, Govt. of India.
Title: Enhancing ComputerVision in low visibility conditions
Abstract : Our recent work with IBM Power9 systems incorporates hyperspectral imagery where we
hypothesize that multi-band information in the reconstructed hyperspectral images can improve the perceptual
quality of images and thereby generate better results in the respective problem domains.The hypothesis has been
experimentally verified in the domain of Image Dehazing and Low-light image enhancement.The experimentations
were performed on the Power9 servers.The approach uses "unsupervised domain adaptation" for mapping 3
channel RGB images to 31 channels Hyperspectral Images.This needs to be achieved in an unsupervised manner
because hyperspectral imagery for all datasets in various domains is not available.This is where GANs come into
the picture.The research extensively focuses on using Generative Adversarial Networks for generating
Hyperspectral Images for the RGB images.The main contribution of the team has been in building novel "deep-
learning" based architectures that make use of advanced techniques like self-supervised learning, domain adaptation,
split-attention, etc.
Speaker : Prof Pratik Narang , BITS Pilani

7. Chekuri S. Choudary is a technical consultant with IBM. He has an application-oriented research background and experience in
multiple areas of computing including multimedia processing and retrieval, high performance computing, hardware design and artificial
intelligence. He acted as a Principal Investigator for multiple SBIR/STTR projects in collaboration with national labs and universities. His
current efforts at IBM involve evangelizing AI adoption in enterprises and cross disciplinary academia, designing AI solutions, and
developing new service offerings catering to the emerging technology landscape.
Title: Bayesian Optimization for optimization of HPC workloads
Abstract : IBM Bayesian Optimization Accelerator (BOA) is a do-it-yourself toolkit to apply state-of-the-art
Bayesian inferencing techniques and obtain optimal solutions for complex, real-world design simulations without
requiring deep machine learning skills.This talk will describe IBM BOA, its differentiation and ease of use, and how
researchers can take advantage of it for optimizing any arbitrary HPC simulation.
Speaker : Dr Chekuri Choudary

8. James is Executive Director of the OpenPower Foundation, with over 10 years of open-source experience across hardware, software,
and network engineering disciplines. James brings a passion for open source and is committed to growing OpenPower Foundation’s
membership, community, and ecosystem.
He is a serial entrepreneur with a background in enterprise technology and has worked in roles spanning operations, business
development, product management, and engineering.
Previously, James was co-founder and COO at Hyper.sh, an open-source cloud-native virtualization startup acquired by Ant Financial.
Prior to that, he led product management in Red Hat’s OpenStack group, and was a product lead on AT&T’s first OpenStack Cloud
Title: OpenPOWER Latest Projects
Speaker : James Kulina

9. Title: Decoupling Compute from Memory, Storage & IO with OMI, the Open
Memory Interface
The inexorable shift to Data Centric computing has led to a conventional wisdom that a given HPC or DataCenter should have one global shared memory
space, accessible by Load Store semantics.The beauty of this idea is in its simplicity, however, in reality Processor & Accelerator roadmaps have their IO split
between Near, Low Latency, Memory and Far memory over the emerging CXL bus.Additionally, Near Memory approaches are also splintering with HBM
and LPDDR increasingly being selected over the standard DDR bus.
Adding to the challenge is that moving the data too and from memory is by far the largest contributor to power consumption that only gets worse
as bandwidths rapidly rise and the memory being accessed becomes more distant.
This presentation will show how the Open Memory Interface, OMI, has the potential to elegantly solve this external memory unification challenge
supporting the lowest possible latency for near memory while also supporting the graceful addition of latency and power as the memory becomes more
distant from a given processor.A fully Modular, Flexible and Composable HPC Architecture will also be presented that can support this unified memory
vision
Allan Cantle, CEO Nallasway Inc andTechnical Director of OpenCAPI Consortium
Allan Cantle is CEO of Nallasway, consulting on Heterogeneous, High Performance Computing Solutions. He is also the OpenCAPI Consortium
Technical Director and Board Advisor. Previously,Allan was the founder of Nallatech, which, during his 25-year tenure, became widely known as a pioneer in
FPGA Accelerated Computing. Before founding Nallatech;Allan was an Electronics Systems Engineer at BAE systems, developing real-time heterogeneous
high-performance computers. He holds a degree in Electrical and Electronics Engineering from the University of Plymouth
Speaker : Allan Cantle

10. Varun Mohan is a CS graduate, currently pursuing MTech ECE(Embedded Systems) at national institute of electronic and
information technology. He is interested in RTL Design and building systems and accelerators with FPGAs. He is also very keen
about bare metal c programming, HW/SW Co design and computer architecture.
Title: Open-Source tools for logic synthesis and SOC Design
Abstract : The talk goes through an overview of a completely open-source flow to
synthesize and verify logic designs. Starting from writing simpleVerilog code, it then
covers ways to simulate your design and then to synthesize it targeting the sky130 pdk
followed by a quick demo on how to use the tools for a complete FPGA flow.The talk
also covers Litex,An open source SOC builder, specifically on how to install it and get
started and how to build a soc with microwatt as the CPU and simulate it.
Speaker : Varun Mohan , NIELIT India