Multiclet Corp is developing multicellular processors based on a new architecture with high performance cores and very low power consumption. The processors are intended for applications in space equipment, including satellites for GPS, GLONASS and Galileo systems. The key advantages of the multicellular processors are fault tolerance, ability to use chips with defects, and gradual degradation resistance. Research and development has been completed on two initial multicellular processor core models. Testing has confirmed the promised low energy consumption and high performance. The multicellular architecture was validated through FPGA modeling and initial processor core synthesis. Further research is needed to develop an engineering solution for a radiation-hardened fault-tolerant multicellular processor for the space market.

1. Multiclet Corp.
Multicellular processors on the basis of principally new architecture.
PRODUCT
Multicellular processors constructed on the basis of highly
performance processor cores with principally new architecture and
minimal power consumption.
Application: development and introduction into the present space
equipment (‘on-board’ and mobile applications with ultralow
consumption; equipment for highly reliable space applications; on-
board computers of a long-life service on the orbit; GLONASS
satellite equipment (Global Navigation Satellite
System), GLONASS/GPS/Galileo receivers; security
systems, automatically identifying ‘friend’ or ‘foe’).
COMPETITIVE STRENGTHS
- Usage of fault tolerant chip based on multicellular architecture
will be financially and technically profitable;
-There are no such fault tolerant processors on the market for
space applications;
-There are no competitors to mathematical core of multicellular
processor since the vast majority of existing processors today have
von Neumann architecture (CISC, RISC, VLIW, и пр.);
- Core area which is equal, correspondingly, when using a
technological process of 90 (180) nm to 1.25 (5) sq. m for the core
with a fixed point and 5 (20) sq. m for the core with a floating
point;
- Performance – not less than 600 MIPS
- Low power consumption – 1,5 W.
THE ESSENCE OF THE INNOVATION put forward in this project, is
development and introduction into the existing space equipment
multicellular processors built on the basis of processor cores with a
brand new architecture.
As for the multicellular architecture, it applies a conceptually
different information exchange scheme – a direct exchange which
serves the starting point for the development of a whole family of
post-Neumann processors. The first one of them is a multicellular
processor.:
- Particularly there appears a possibility to use processor chips with
manufacturing defects and to realize a methodology of gradual
processor degradation in case its separate devices (cells) fail. The
given property improves processor ‘liveness’ manifold.
Current stage
For the time being R&D of two models of multicellular
processor core have been finished. The first one is
oriented towards achieving the highest efficiency, the
second one – the ultimately low energy consumption. A
range of tests has been conducted, in the course of which
the previously claimed microprocessor characteristics
(energy consumption, efficiency) have been confirmed.
Operability of the multicellular architecture has been
confirmed by the experimental model development and
tests. Testing on the FPGA-model, processor core
synthesis and its implementation in SoC have
demonstrated the efficiency and energy consumption
parameters planned at R&D stage. For achieving the
specific fault tolerant radiation resistant multicellular
processor oriented towards the space market sector it is
necessary to conduct R&D which includes development of
engineering solutions, their adjustment as well as
development of construction documentation, conduct of
test program and tests of fault tolerant multicellular
processor with low energy consumption for its
subsequent implementation in ‘Space’ version.
CONTACTS :
Ekaterinburg
Zyryanov Boris Anatolyevich, СEO
micron@uats.ru
+ 7 912 03 777 75
620014, International Business Center MICRON, Chelyuskintsev
street 2, office 135, Ekaterinburg, Russia
www.multiclet.com
TEAM
1. Zyryanov Boris Anatolyevich - Project organizer,
Doctor of Engineering Science in the sphere of system-level
engineering (2010).
PhD in Technical Science in the sphere of automatic
recognition (1983).
Corresponding member of the Academy of Engineering
Science named after Prokhorov (2005). An author of more
than 70 scientific works, several monographs and teaching
aids, including the teaching aids on applied software
development and FFT applications.
2. Streltsov Nikolay Viktorovich -Technical management of
the project, development of processor architectures.
Competences and achievements:
Creation of multicellular processors, system of processor
architectures classification, сoncept of multicellular
design, аrchitecture and schematic and technical realization
of synergetic computer system (synputer), specification
(Technical Inquiry) for synergetic computing machine
(hardware and software).
3. Kukushkin Dmitriy Vladislavovich - Head of development
of MP-core surrounding and integration of all hardware
modules into the system.
Competences and achievements:
A new software platform for gas analyzers for company
SenseAir (Sweden) was developed. It was made for products
of mass production.
2-channel digital current meter and meter of voltage for work
with high voltage.
Jam-proof management controller for application in power
units.
Conference-hall system with automatized management not
more than 25 participants.