Netcope Technologies offers low-latency FPGA-based solutions for algorithmic and high-frequency trading, emphasizing flexibility and ease of use. Their platform supports various trading protocols and ensures minimal tick-to-trade latency while allowing users to implement custom trading strategies. Key features include pre-trade risk checks and customizable monitoring capabilities, enabling efficient and secure trading operations with multiple exchanges.

1. Milan Dvorak
Tradecope
dvorak@netcope.com
Low-latency solution for algorithmic and high frequency trading

2. • European vendor of FPGA-based network solutions
• Formerly FPGA department of Invea-Tech
• First to introduce 100GE NIC (PCI-E form factor)
 Vast experience with FPGA technology since 2002
 Xilinx Alliance program partner
 PCI-SIG® member company
• Primary focus
 Low-latency electronic trading
 High-speed packet capture
 Smart traffic filtering
 FPGA firmware development kit
Company introduction

3. • An ideal algorithmic trading platform
 Handles all communication with an exchange transparently
to the user
 User simply injects specific trading strategy and initiate
trading
• Requirements
 Exchange/protocol independent
 Minimal technical knowledge required to write trading
strategies
 Flexible (new message types, protocol changes…)
 Low latency, high speed, (first come first serve)
Challenge

4. • Programmable hardware
 Flexibility of software
 New functionality does not require hardware modifications
 Performance of hardware
 Massive parallelism (tenths of parallel CPU-like single thread
computations)
 Deterministic, cycle accurate
 Low latency (measure in ns)
• Drawbacks
 Hardware designer expertise required
 Longer time to market compared to software
 Hardware development from scratch is generally expensive
FPGA technology

5. • FPGA based low latency trading solution
 Pre-built blocks for communication with an exchange
 FIX/FAST and binary
market data protocols
 Full order book,
aggregated level book
 Order sessions
management (FIX,
ArcaDirect, OUCH, …)
 User trading strategy
in C/C++ (optional)
 Latency optimized API
Tradecope

6. • Minimal tick-to-trade latency in HW:
 Processing pipeline completely in FPGA hardware
 Wire-to-wire sub-microsecond latency
 Significantly Improved hit-rate
• Flexibility
 One piece of hardware communicates with multiple
exchanges, supporting various protocols
 All major US exchanges supported
 New markets support ready within few weeks
• Easy to use
 User just takes care about trading strategy
 No need for FPGA specialist to harness its power
Tradecope – key features

7. • Pre-trade risk check in Tradecope
 Limits for price and size
 Limited number of orders
in time
• Custom risk checks
 Written in C/C++
 Fully customizable by user
• Monitoring in SW
 Every order passed to user
 Order generation can be
disabled from SW
Risk checks

8. • FPGA connected as bump-in-the-wire
 Risk-check is running transparently to the user
 FPGA can drop packets and report back to the trading
system
 Low additional latency (less than 1usec)
 Parallel processing – multiple risk checks at once
Transparent risk-check
FPGA
Risk check
Trading system Exchange

9. Netcope Technologies a.s.
U Vodárny 2965/2
616 00 Brno, Czech Republic
www.netcope.com
Accelerating your success
Contacts
Milan Dvorak
dvorak@netcope.com
+420 511 205 378